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    • 61. 发明申请
    • OPTICAL TOUCH APPARATUS AND OPERATING METHOD THEREOF
    • 光触摸装置及其操作方法
    • US20100259507A1
    • 2010-10-14
    • US12718643
    • 2010-03-05
    • Meng-Shin YenWilliam WangChung-Cheng Chou
    • Meng-Shin YenWilliam WangChung-Cheng Chou
    • G06F3/042
    • G06F3/0421
    • An optical touch apparatus and operating method thereof are disclosed. The optical touch apparatus comprises an optical module, a light sensing module, and a processing module. The optical module and the light sensing module are set at a first side and an opposite second side of a surface of the optical touch apparatus respectively. The optical module receives a light source and uniformly emits a plurality of lights. When at least one of the plurality of lights is blocked by an object above the surface, the light sensing module generates a sensing result based on the condition of receiving the plurality of lights. The processing module determines a touch point location corresponding to the object on the surface based on the sensing result.
    • 公开了一种光学触摸装置及其操作方法。 光学触摸装置包括光学模块,光感测模块和处理模块。 光学模块和感光模块分别设置在光学触摸装置的表面的第一侧和相对的第二侧。 光学模块接收光源并均匀地发射多个光。 当多个光中的至少一个光被表面上方的物体阻挡时,光感测模块基于接收多个光的条件产生感测结果。 处理模块基于感测结果确定与表面上的对象相对应的触摸点位置。
    • 62. 发明申请
    • Apparatus for driving fluid
    • 驱动液体的装置
    • US20080302664A1
    • 2008-12-11
    • US12155274
    • 2008-06-02
    • Cheng-Hsien LiuLong HsuKuang-Han ChuWilliam WangChung-Cheng Chou
    • Cheng-Hsien LiuLong HsuKuang-Han ChuWilliam WangChung-Cheng Chou
    • C02F1/469
    • G01N27/44713C02F1/469C02F2001/46152C02F2201/4613G01N2030/285
    • An apparatus for driving a fluid includes a substrate, at least one electrode group and a controlling unit. The substrate has at least one plane. The electrode group is disposed on the substrate and includes a first electrode, a second electrode and a third electrode. A projecting position of the second electrode on the plane is disposed between that of the first electrode and that of the third electrode. The controlling unit electrically connected to electrode group is for driving the first to third electrodes. When the controlling unit drives the first to third electrodes to make the first and third electrodes have opposite polarities and to make the second and third electrodes have the same polarity, an electric field produced by the electrode group enables the fluid on the substrate to flow from the first electrode to the third electrode.
    • 用于驱动流体的装置包括基板,至少一个电极组和控制单元。 衬底具有至少一个平面。 电极组设置在基板上,并且包括第一电极,第二电极和第三电极。 平面上的第二电极的突出位置设置在第一电极和第三电极的突出位置之间。 电连接到电极组的控制单元用于驱动第一至第三电极。 当控制单元驱动第一至第三电极以使第一和第三电极具有相反的极性并且使得第二和第三电极具有相同的极性时,由电极组产生的电场使得基板上的流体能够从 第一电极到第三电极。
    • 65. 发明申请
    • MICROINJECTION APPARATUS WITH THERMOCHROMIC INDICATOR
    • 微电子显微照相装置
    • US20070091133A1
    • 2007-04-26
    • US11536148
    • 2006-09-28
    • Chung-Cheng ChouWilliam WangChen Peng
    • Chung-Cheng ChouWilliam WangChen Peng
    • B41J29/38
    • B41J29/393B41J2/14137B41J2/14153B41J2/1606
    • The invention provides a microinjection apparatus for a fluid. The microinjection apparatus comprises a substrate, a manifold, at least one fluid chamber, and at least one thermal sensing film. The manifold is formed on the substrate for containing the fluid therein. The at least one fluid chamber is also formed on the substrate and in communication with the manifold. Furthermore, the fluid chamber has a respective orifice and a respective heater disposed adjacent to the orifice. In addition, the thermal sensing film corresponds to the fluid chamber and is formed on a surface adjacent to the orifice. It should be noticed that the thermal sensing film has a respective color changeable in response to a heat generated during operation of the corresponding heater.
    • 本发明提供一种用于流体的显微注射装置。 显微注射装置包括基板,歧管,至少一个流体室和至少一个热敏膜。 歧管形成在基板上,用于在其中容纳流体。 至少一个流体室也形成在基板上并与歧管连通。 此外,流体室具有相应的孔口和邻近孔口设置的相应加热器。 此外,热敏膜对应于流体室,并且形成在与孔口相邻的表面上。 应该注意的是,热敏膜具有响应于相应加热器的操作期间产生的热而可以变化的相应颜色。
    • 66. 发明授权
    • SRAM write assist apparatus
    • SRAM写入辅助装置
    • US08724420B2
    • 2014-05-13
    • US13105382
    • 2011-05-11
    • Chiting ChengChung-Cheng ChouTsung-yung Jonathan Chang
    • Chiting ChengChung-Cheng ChouTsung-yung Jonathan Chang
    • G11C11/413
    • G11C11/419G11C11/41G11C29/021G11C29/023G11C29/028
    • An SRAM write assist apparatus comprises a timer unit and a voltage divider. The voltage divider unit is configured to divide a voltage potential down to a lower level. The output of the voltage divider is connected to a memory cell in a write operation. The timer unit is configured to generate a pulse having a width inversely proportional to the voltage potential applied to a memory chip. Furthermore, the timer unit controls the period in which a lower voltage from the output of the voltage divider is applied to the memory cell. Moreover, external level and timing programmable signals can be used to further adjust the voltage divider's ratio and the pulse width from the timer unit. By employing the SRAM write assist apparatus, a memory chip can perform a reliable and fast write operation.
    • SRAM写入辅助装置包括定时器单元和分压器。 分压器单元被配置为将电压电位分压到较低电平。 在写入操作中,分压器的输出连接到存储单元。 定时器单元被配置为产生具有与施加到存储芯片的电压电位成反比的宽度的脉冲。 此外,定时器单元控制将来自分压器的输出的较低电压施加到存储单元的周期。 此外,可以使用外部电平和定时可编程信号来进一步调整分压器的比例和来自定时器单元的脉冲宽度。 通过采用SRAM写入辅助装置,存储器芯片可以执行可靠且快速的写入操作。
    • 67. 发明授权
    • Internal clock gating apparatus
    • 内部时钟选通装置
    • US08575965B2
    • 2013-11-05
    • US13118060
    • 2011-05-27
    • Chi-Lin LiuChung-Cheng ChouYangsyu LinHsiao Wen Lu
    • Chi-Lin LiuChung-Cheng ChouYangsyu LinHsiao Wen Lu
    • H03K19/096
    • G06F1/3287G06F1/3237Y02D10/128Y02D10/171
    • An internal clock gating apparatus comprises a static logic block and a domino logic block. The static logic block is configured to receive a clock signal and a clock enable signal. The domino logic block is configured to receive the clock signal and a control signal from an output of the static logic block. The static logic block and the domino logic block are further configured such that an output of the domino logic block generates a signal similar to the clock signal in phase when the clock enable signal has a logic high state. On the other hand, the output of the domino logic block generates a logic low signal when the clock enable signal has a logic low state. Furthermore, the static logic block and the domino logic block can reduce the setup time and delay time of the internal clock gating apparatus respectively.
    • 内部时钟选通装置包括静态逻辑块和多米诺逻辑块。 静态逻辑块被配置为接收时钟信号和时钟使能信号。 多米诺骨牌逻辑块被配置为从静态逻辑块的输出接收时钟信号和控制信号。 静态逻辑块和多米诺逻辑块进一步被配置为使得当时钟使能信号具有逻辑高状态时,多米诺骨牌逻辑块的输出产生类似时钟信号的相位信号。 另一方面,当时钟使能信号具有逻辑低电平状态时,多米诺逻辑块的输出产生逻辑低电平信号。 此外,静态逻辑块和多米诺逻辑块可以分别减少内部时钟门控装置的建立时间和延迟时间。
    • 68. 发明申请
    • Internal Clock Gating Apparatus
    • 内部时钟门控器
    • US20120299622A1
    • 2012-11-29
    • US13118060
    • 2011-05-27
    • Chi-Lin LiuChung-Cheng ChouYangsyu LinHsiao Wen Lu
    • Chi-Lin LiuChung-Cheng ChouYangsyu LinHsiao Wen Lu
    • H03K19/096
    • G06F1/3287G06F1/3237Y02D10/128Y02D10/171
    • An internal clock gating apparatus comprises a static logic block and a domino logic block. The static logic block is configured to receive a clock signal and a clock enable signal. The domino logic block is configured to receive the clock signal and a control signal from an output of the static logic block. The static logic block and the domino logic block are further configured such that an output of the domino logic block generates a signal similar to the clock signal in phase when the clock enable signal has a logic high state. On the other hand, the output of the domino logic block generates a logic low signal when the clock enable signal has a logic low state. Furthermore, the static logic block and the domino logic block can reduce the setup time and delay time of the internal clock gating apparatus respectively.
    • 内部时钟选通装置包括静态逻辑块和多米诺逻辑块。 静态逻辑块被配置为接收时钟信号和时钟使能信号。 多米诺骨牌逻辑块被配置为从静态逻辑块的输出接收时钟信号和控制信号。 静态逻辑块和多米诺逻辑块进一步被配置为使得当时钟使能信号具有逻辑高状态时,多米诺骨牌逻辑块的输出产生类似时钟信号的相位信号。 另一方面,当时钟使能信号具有逻辑低电平状态时,多米诺逻辑块的输出产生逻辑低电平信号。 此外,静态逻辑块和多米诺逻辑块可以分别减少内部时钟门控装置的建立时间和延迟时间。
    • 69. 发明申请
    • Flip-Flop Circuit Design
    • 触发器电路设计
    • US20120098582A1
    • 2012-04-26
    • US12908602
    • 2010-10-20
    • Chi-Lin LiuChung-Cheng ChouYi-Tzu Chen
    • Chi-Lin LiuChung-Cheng ChouYi-Tzu Chen
    • H03K3/356H03K3/01
    • H03K3/356121
    • A flip-flop circuit includes a precharge circuit that outputs a charge signal high when a received clock signal is LOW. A delay clock input circuit generates a delayed clock input controlled signal with the same value as an input signal when the clock signal is HIGH. A charge keeper circuit, upon receiving the charge signal and the delayed clock input controlled signal, generates a charge keeping signal, which equals the charged signal when the clock signal is LOW and equals the delayed clock input controlled signal when the clock signal is HIGH. A separator circuit can receive the charge keeping signal and clock signal and generate an inverted charge keeping signal. A storage circuit is configured to receive the inverted charge keeping signal, a present state signal, and inverted present state signal, and to generate a present state signal and an inverted present state signal.
    • 触发器电路包括预充电电路,当接收到的时钟信号为低电平时,该充电电路输出高电平信号。 当时钟信号为高电平时,延迟时钟输入电路产生与输入信号相同值的延迟时钟输入受控信号。 充电保持器电路在接收到充电信号和延迟的时钟输入受控信号时产生一个充电保持信号,当时钟信号为低电平时,该充电信号等于充电信号,并且当时钟信号为高电平时等于延迟的时钟输入受控信号。 分离器电路可以接收电荷保持信号和时钟信号并产生反向电荷保持信号。 存储电路被配置为接收反转的保持电荷信号,当前状态信号和反相的当前状态信号,并且生成当前状态信号和反相的当前状态信号。