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61. 发明授权

US06559469B1 Ferroelectric and high dielectric constant transistors 失效
标题翻译：铁电和高介电常数晶体管
公开(公告)号：US06559469B1
公开(公告)日：2003-05-06
申请号：US09686552
申请日：2000-10-11
申请人： Carlos A. Paz de Araujo , Larry D. McMillan , Vikram Joshi , Narayan Solayappan , Joseph D. Cuchiaro
发明人： Carlos A. Paz de Araujo , Larry D. McMillan , Vikram Joshi , Narayan Solayappan , Joseph D. Cuchiaro
IPC分类号： H01L2972
CPC分类号： H01L27/11502 , C23C16/448 , C23C16/45561 , C23C18/1216 , C23C18/14 , C30B7/00 , C30B7/005 , C30B29/68 , G11C11/22 , G11C11/223 , H01L21/31691 , H01L27/10805 , H01L28/55 , H01L28/60
摘要： An integrated circuit includes a layered superlattice material having the formula A1w1+a1A2w2+a2 . . . Ajwj+ajS1x1+s1S2x2+s2 . . . Skxk+skB1y1+b1B2y2+b2 . . . Blyl+blQz−q, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . B1 represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in ferroelectric FETs in non-volatile memories. Others are high dielectric constant materials that do not degrade or break down over long periods of use and are applied as the gate insulator in volatile memories.
摘要翻译：集成电路包括具有公式A1w1 + a1A2w2 + a2的分层超晶格材料。。。 Ajwj + ajS1x1 + s1S2x2 + s2。。。 Skxk + skB1y1 + b1B2y2 + b2。。。 Blyl + blQz-q，其中A1，A2。。。 Aj代表钙钛矿结构中的A位元素，S1，S2。。。 Sk代表超晶格发生器元件B1，B2。。。 B1表示钙钛矿结构中的B位元素，Q表示阴离子，上标表示各元素的化合价，下标表示单元中元素的原子数，并且至少w1和y1为非零。这些材料中的一些是非常低的疲劳铁电体，并且被应用在非易失性存储器中的铁电FET中。其他的是高介电常数材料，其在长期使用中不会劣化或分解，并且作为在绝缘体中的栅绝缘体。

62. 发明授权

US06245580B1 Low temperature process for fabricating layered superlattice materials and making electronic devices including same 有权
标题翻译：用于制造分层超晶格材料的低温工艺和制造包括它们的电子器件
公开(公告)号：US06245580B1
公开(公告)日：2001-06-12
申请号：US09228907
申请日：1999-01-11
申请人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo
发明人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , C30B7/005 , H01L21/31691
摘要： A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300° C. for five minutes, then RTP annealed at 675° C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700° C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 100 nm. A second electrode is applied to form a capacitor, and a second anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700° C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8≦u≦1.0, 2.0≦v≦2.3, and 1.9≦w≦2.1.
摘要翻译：将包含金属的液体前体涂层施加到第一电极，在氧气环境中在不超过300℃的温度下在热板上烘烤5分钟，然后在675℃下RTP退火30秒。然后将涂层在氧气或氮气环境中在700℃下退火1小时，以形成厚度不超过100nm的层状超晶格材料的薄膜。施加第二电极以形成电容器，并且在氧气或氮气环境中在不超过700℃的温度下进行第二次退火。如果该材料是钽酸铋锶，则该前体含有痣相当于的锶，v摩尔铋的等价物和钽的摩尔当量，其中0.8 <= u <= 1.0,2.0 <= v <= 2.3和1.9 <= w <= 2.1。

63. 发明授权

US06171934B2 Recovery of electronic properties in process-damaged ferroelectrics by voltage-cycling 失效
标题翻译：通过电压循环恢复工艺损坏的铁电体中的电子特性
公开(公告)号：US06171934B2
公开(公告)日：2001-01-09
申请号：US09144297
申请日：1998-08-31
申请人： Vikram Joshi , Narayan Solayappan , Walter Hartner , G{umlaut over (u)}nther Schindler
发明人： Vikram Joshi , Narayan Solayappan , Walter Hartner , G{umlaut over (u)}nther Schindler
IPC分类号： H01L21326
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： An integrated circuit is formed containing a metal-oxide ferroelectric thin film. An voltage-cycling recovery process is conducted to reverse the degradation of ferroelectric properties caused by hydrogen. The voltage-cycling recovery process is conducted by applying from 104 to 1011 voltage cycles with a voltage amplitude of from 1 to 15 volts. Conducting voltage-cycling at a higher temperature in the range 30-200° C. enhances recovery. Preferably the metal oxide thin film comprises layered superlattice material. Preferably the layered superlattice material comprises strontium bismuth tantalate or strontium bismuth tantalum niobate. If the integrated circuit manufacture includes a forming-gas anneal, then the voltage-cycling recovery process is performed after the forming-gas anneal. The voltage-cycling recovery process obviates oxygen-recovery annealing, and it allows continued use of conventional hydrogen-rich plasma processes and forming-gas anneals without the risk of permanent damage to the ferroelectric thin film.
摘要翻译：形成含有金属氧化物铁电体薄膜的集成电路。进行电压循环恢复处理以逆转由氢引起的铁电性能的降低。通过施加电压幅度为1至15伏特的104至1011个电压周期来执行电压循环恢复过程。在30-200℃范围内的较高温度下进行电压循环，提高了回收率。优选地，金属氧化物薄膜包括层状超晶格材料。优选地，层状超晶格材料包括钽酸铋钽铋或铌酸铋钽酸铋。如果集成电路制造包括成形气体退火，则在成形气体退火之后执行电压循环恢复过程。电压循环恢复过程避免氧回收退火，并且其允许继续使用常规富氢等离子体工艺和形成气体退火，而不会对铁电薄膜造成永久损坏的风险。

64. 发明授权

US6104049A Ferroelectric memory with ferroelectric thin film having thickness of 90 nanometers or less, and method of making same 有权
标题翻译：具有厚度为90纳米或更小的铁电薄膜的铁电存储器及其制造方法
公开(公告)号：US6104049A
公开(公告)日：2000-08-15
申请号：US228578
申请日：1999-01-11
申请人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo , Larry D. McMillan , Shinichiro Hayashi , Tatsuo Otsuki
发明人： Narayan Solayappan , Vikram Joshi , Carlos A. Paz de Araujo , Larry D. McMillan , Shinichiro Hayashi , Tatsuo Otsuki
IPC分类号： G11C11/22 , H01L21/02 , H01L21/316 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/11502 , H01L28/55 , H01L28/60 , H01L21/768
摘要： A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300.degree. C. for five minutes, then RTP annealed at 675.degree. C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700.degree. C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 90 nm. A second electrode is applied to form a capacitor, and a post-anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700.degree. C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8.ltoreq.u.ltoreq.1.0, 2.0.ltoreq.v.ltoreq.2.3, and 1.9.ltoreq.w.ltoreq.2.1.
摘要翻译：将包含金属的液体前体涂层施加到第一电极，在氧气环境中在不高于300℃的温度下在热板上烘烤五分钟，然后在675℃下进行RTP退火30秒。然后将涂层在氧气或氮气环境中在700℃下退火1小时，以形成厚度不超过90nm的层状超晶格材料薄膜。施加第二电极以形成电容器，并且在氧气或氮气环境中在不超过700℃的温度下进行后退火。如果该材料是钽酸铋锶，则该前体含有痣的锶，v 铋的摩尔当量和钽的摩尔当量，其中0.8为2.0，2.0

65. 发明授权

US09003104B2 Systems and methods for a file-level cache 有权
标题翻译：文件级缓存的系统和方法
公开(公告)号：US09003104B2
公开(公告)日：2015-04-07
申请号：US13287998
申请日：2011-11-02
申请人： Vikram Joshi , Yang Luan , Michael F. Brown , Hrishikesh A. Vidwans
发明人： Vikram Joshi , Yang Luan , Michael F. Brown , Hrishikesh A. Vidwans
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F3/0613 , G06F3/0667 , G06F3/0688 , G06F12/0811 , G06F12/0866 , G06F12/0888 , G06F12/0897 , G06F2212/151 , G06F2212/152 , G06F2212/222 , G06F2212/283 , G06F2212/311 , G06F2212/463
摘要： A multi-level cache comprises a plurality of cache levels, each configured to cache I/O request data pertaining to I/O requests of a different respective type and/or granularity. The multi-level cache may comprise a file-level cache that is configured to cache I/O request data at a file-level of granularity. A file-level cache policy may comprise file selection criteria to distinguish cacheable files from non-cacheable files. The file-level cache may monitor I/O requests within a storage stage, and may service I/O requests from a cache device.
摘要翻译：多级缓存包括多个高速缓存级别，每个高速缓存级别被配置为高速缓存与不同类型和/或粒度的I / O请求有关的I / O请求数据。多级缓存可以包括文件级高速缓存，其被配置为以粒度的文件级缓存I / O请求数据。文件级缓存策略可以包括用于区分可缓存文件与不可缓存文件的文件选择标准。文件级缓存可以监视存储阶段内的I / O请求，并且可以从缓存设备服务I / O请求。

66. 发明授权

US08861218B2 Device containing plurality of smaller MEMS devices in place of a larger MEMS device 有权
标题翻译：装置包含多个较小的MEMS器件代替较大的MEMS器件
公开(公告)号：US08861218B2
公开(公告)日：2014-10-14
申请号：US12614929
申请日：2009-11-09
申请人： Charles Gordon Smith , Richard L. Knipe , Vikram Joshi , Roberto Gaddi , Anartz Unamuno , Robertus Petrus Van Kampen
发明人： Charles Gordon Smith , Richard L. Knipe , Vikram Joshi , Roberto Gaddi , Anartz Unamuno , Robertus Petrus Van Kampen
IPC分类号： H05K1/18 , H01G5/40 , G01P15/135 , H01G5/18 , B81B7/04 , G01P15/125 , G01P15/08
CPC分类号： B81B7/04 , B81B2201/0221 , B81B2201/0235 , B81B2207/053 , G01P15/0802 , G01P15/125 , G01P15/135 , H01G5/18 , H01G5/40
摘要： Embodiments disclosed herein generally include using a large number of small MEMS devices to replace the function of an individual larger MEMS device or digital variable capacitor. The large number of smaller MEMS devices perform the same function as the larger device, but because of the smaller size, they can be encapsulated in a cavity using complementary metal oxide semiconductor (CMOS) compatible processes. Signal averaging over a large number of the smaller devices allows the accuracy of the array of smaller devices to be equivalent to the larger device. The process is exemplified by considering the use of a MEMS based accelerometer switch array with an integrated analog to digital conversion of the inertial response. The process is also exemplified by considering the use of a MEMS based device structure where the MEMS devices operate in parallel as a digital variable capacitor.
摘要翻译：本文公开的实施例通常包括使用大量的小MEMS器件来代替单个更大的MEMS器件或数字可变电容器的功能。大量较小的MEMS器件具有与较大器件相同的功能，但是由于尺寸较小，因此可以使用互补金属氧化物半导体（CMOS）兼容工艺封装在腔中。通过大量较小器件的信号平均，允许较小器件阵列的精度等同于较大的器件。通过考虑使用具有惯性响应的集成模数转换的基于MEMS的加速度计开关阵列来举例说明该过程。还通过考虑使用MEMS器件结构（其中MEMS器件并行地作为数字可变电容器）来使用该过程。

67. 发明申请

US20140300249A1 MEMS DEVICE ANCHORING 有权
标题翻译： MEMS器件安装
公开(公告)号：US20140300249A1
公开(公告)日：2014-10-09
申请号：US14342387
申请日：2012-08-31
申请人： Robertus Petrus Van Kampen , Mickael Renault , Vikram Joshi , Richard L. Knipe , Anartz Unamuno
发明人： Robertus Petrus Van Kampen , Mickael Renault , Vikram Joshi , Richard L. Knipe , Anartz Unamuno
IPC分类号： B81B7/00
CPC分类号： B81B7/00 , B81B2201/016 , B81B2203/0307 , B81C1/00039 , B81C2203/0136 , H01G5/16 , H01H59/0009 , Y10T29/49105
摘要： Embodiments of the present invention generally relate to a MEMS device that is anchored using the layer that is deposited to form the cavity sealing layer and/or with the layer that is deposited to form the pull-off electrode. The switching element of the MEMS device will have a flexible or movable portion and will also have a fixed or anchor portion that is electrically coupled to ground. The layer that is used to seal the cavity in which the switching element is disposed can also be coupled to the fixed or anchor portion of the switching element to anchor the fixed or anchor portion within the cavity. Additionally, the layer that is used to form one of the electrodes may be used to provide additional leverage for anchoring the fixed or anchor portion within the cavity. In either situation, the movement of the flexible or movable portion is not hindered.
摘要翻译：本发明的实施例通常涉及使用沉积以形成空腔密封层和/或沉积以形成拉出电极的层来锚定的MEMS器件。 MEMS器件的开关元件将具有柔性或可移动部分，并且还将具有电耦合到地的固定或锚定部分。用于密封其中设置有开关元件的空腔的层也可以联接到开关元件的固定部分或锚固部分，以将固定部分或锚固部分锚固在腔体内。另外，用于形成电极之一的层可以用于提供用于将固定或锚定部分锚定在腔内的额外的杠杆作用。在这两种情况下，柔性或可移动部分的运动不受阻碍。

68. 发明申请

US20140223096A1 SYSTEMS AND METHODS FOR STORAGE VIRTUALIZATION 审中-公开
标题翻译：用于存储虚拟化的系统和方法
公开(公告)号：US20140223096A1
公开(公告)日：2014-08-07
申请号：US14245893
申请日：2014-04-04
申请人： Jerene Zhe Yang , Brent Lim Tze Hao , Vikram Joshi , Michael Brown , Prashanth Radhakrishnan , David Flynn , Bhavesh Mehta
发明人： Jerene Zhe Yang , Brent Lim Tze Hao , Vikram Joshi , Michael Brown , Prashanth Radhakrishnan , David Flynn , Bhavesh Mehta
IPC分类号： G06F3/06
CPC分类号： G06F3/0665 , G06F3/0619 , G06F3/0689 , G06F12/0871 , G06F2212/151
摘要： An I/O manager may be configured to service I/O requests pertaining to ephemeral data of a virtual machine using a storage device that is separate from and/or independent of a primary storage resource to which the I/O request is directed. Ephemeral data may be removed from ephemeral storage in response to a removal condition and/or trigger, such as a virtual machine reboot. The I/O manager may manage transfers of ephemeral virtual machine data in response to virtual machines migrating between host computing devices. The I/O manager may be further configured to cache virtual machine data, and/or manage shared file data that is common to two or more virtual machines operating on a host computing device.
摘要翻译：可以将I / O管理器配置为使用与I / O请求所针对的主存储资源分离和/或独立的存储设备来维护关于虚拟机的临时数据的I / O请求。响应于移除条件和/或触发器（例如虚拟机重新启动），临时数据可以从临时存储器中移除。 I / O管理器可以管理临时虚拟机数据的传输，以响应在主机计算设备之间迁移的虚拟机。 I / O管理器可以被进一步配置为缓存虚拟机数据，和/或管理在主机计算设备上操作的两个或多个虚拟机通用的共享文件数据。

69. 发明申请

US20120181638A1 METHOD FOR MEMS DEVICE FABRICATION AND DEVICE FORMED 有权
标题翻译：用于MEMS器件制造的方法和形成的器件
公开(公告)号：US20120181638A1
公开(公告)日：2012-07-19
申请号：US13349696
申请日：2012-01-13
申请人： Mickael Renault , Joseph Damian Gordon Lacey , Vikram Joshi , Thomas L. Maguire
发明人： Mickael Renault , Joseph Damian Gordon Lacey , Vikram Joshi , Thomas L. Maguire
IPC分类号： H01L29/84 , H01L21/00
CPC分类号： B81B3/0072 , B81B2203/0118 , B81B2203/0307 , B81B2207/096 , B81C1/00039 , B81C1/00333 , B81C1/00476 , B81C2201/0132 , B81C2201/014 , B81C2203/0145 , B81C2203/0714
摘要： The present invention generally relates to methods for producing MEMS or NEMS devices and the devices themselves. A thin layer of a material having a lower recombination coefficient as compared to the cantilever structure may be deposited over the cantilever structure, the RF electrode and the pull-off electrode. The thin layer permits the etching gas introduced to the cavity to decrease the overall etchant recombination rate within the cavity and thus, increase the etching rate of the sacrificial material within the cavity. The etchant itself may be introduced through an opening in the encapsulating layer that is linearly aligned with the anchor portion of the cantilever structure so that the topmost layer of sacrificial material is etched first. Thereafter, sealing material may seal the cavity and extend into the cavity all the way to the anchor portion to provide additional strength to the anchor portion.
摘要翻译：本发明一般涉及用于生产MEMS或NEMS装置和装置本身的方法。与悬臂结构相比，具有较低复合系数的材料的薄层可以沉积在悬臂结构，RF电极和拉出电极上。薄层允许引入空腔的蚀刻气体降低空腔内的整体蚀刻剂复合速率，从而提高空腔内的牺牲材料的蚀刻速率。蚀刻剂本身可以通过与悬臂结构的锚固部分线性对准的封装层中的开口引入，使得首先蚀刻最顶层的牺牲材料。此后，密封材料可以密封空腔并且一直延伸到空腔中，以锚定部分，以向锚固部分提供额外的强度。

70. 发明授权

US08124527B2 CMP process flow for MEMS 有权
标题翻译： MEMS工艺流程
公开(公告)号：US08124527B2
公开(公告)日：2012-02-28
申请号：US13036201
申请日：2011-02-28
申请人： Joseph Damian Gordon Lacey , Thomas L. Maguire , Vikram Joshi , Dennis J. Yost
发明人： Joseph Damian Gordon Lacey , Thomas L. Maguire , Vikram Joshi , Dennis J. Yost
IPC分类号： H01L21/4763
CPC分类号： B81C1/00095 , B81B2203/04 , B81B2207/07 , B81C1/00611 , B81C2201/0104
摘要： The present invention generally relates to the formation of a micro-electromechanical system (MEMS) cantilever switch in a complementary metal oxide semiconductor (CMOS) back end of the line (BEOL) process. The cantilever switch is formed in electrical communication with a lower electrode in the structure. The lower electrode may be either blanket deposited and patterned or simply deposited in vias or trenches of the underlying structure. The excess material used for the lower electrode is then planarized by chemical mechanical polishing or planarization (CMP). The cantilever switch is then formed over the planarized lower electrode.
摘要翻译：本发明一般涉及在线路（BEOL）工艺的互补金属氧化物半导体（CMOS）后端中形成微机电系统（MEMS）悬臂开关。悬臂开关形成为与结构中的下电极电连通。下电极可以是毯式沉积和图案化或简单地沉积在底层结构的通孔或沟槽中。然后通过化学机械抛光或平面化（CMP）将用于下电极的多余材料平坦化。然后在平坦化的下电极上形成悬臂开关。

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