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    • 69. 发明授权
    • Multi-bit per cycle successive approximation register ADC
    • 每个周期多位逐次逼近寄存器ADC
    • US08570206B1
    • 2013-10-29
    • US13455515
    • 2012-04-25
    • Jin-Fu Lin
    • Jin-Fu Lin
    • H03M1/34
    • H03M1/144
    • A main digital-to-analog converter (DAC) receives at least one input and generates an adjusted input. A SAR unit generates a code for controlling the main DAC based on a comparison output of a comparing unit that receives the adjusted input. A reference generator, under control of the generated code, generates at least one reference voltage, which is then forwarded to the comparing unit in each corresponding cycle for defining a search range of each cycle, wherein an absolute value of the reference voltage of a latter cycle is less than the reference voltage of a former cycle such that the search range of the latter cycle is smaller than the search range of the former cycle, and search ranges of all the cycles are centered at a base voltage.
    • 主数字模拟转换器(DAC)接收至少一个输入并产生经调整的输入。 SAR单元基于接收经调整的输入的比较单元的比较输出产生用于控制主DAC的代码。 参考发生器在产生的代码的控制下产生至少一个参考电压,然后在每个相应周期中转发给比较单元,用于定义每个周期的搜索范围,其中后者的参考电压的绝对值 周期小于前一周期的参考电压,使得后一周期的搜索范围小于前一周期的搜索范围,并且所有周期的搜索范围以基极电压为中心。