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61. 发明申请

US20060239623A1 Bi-directional optical modules package 审中-公开
标题翻译：双向光模块封装
公开(公告)号：US20060239623A1
公开(公告)日：2006-10-26
申请号：US10566290
申请日：2004-07-28
申请人： Hyun-Jae Yoon
发明人： Hyun-Jae Yoon
IPC分类号： G02B6/36
CPC分类号： G02B6/4246
摘要： Provided is a bi-directional optical module package having an optical module unit comprising a substrate member, an optical filter installed on the substrate member to be inclined with respect to an optical fiber, a first holder supported by the substrate member on one side of the optical filter and having a laser diode and a lens for transmitting an optical signal to the optical fiber through one side of the optical filter, and a second holder supported by the substrate member on the other side of the optical filter and having a photodiode and a lens for receiving the optical signal received through the optical fiber through the optical filter.
摘要翻译：本发明提供一种双向光模块封装，其具有光模块单元，该光模块单元包括：基板构件;安装在基板构件上的相对于光纤倾斜的滤光器;第一保持器，具有激光二极管和透镜，用于通过所述滤光器的一侧将光信号传输到所述光纤，以及由所述基板部件支撑在所述滤光器的另一侧上并具有光电二极管和透镜，用于接收通过光学滤波器通过光纤接收的光信号。

62. 发明申请

US20060183296A1 Isolation method for semiconductor device 审中-公开
公开(公告)号：US20060183296A1
公开(公告)日：2006-08-17
申请号：US11398536
申请日：2006-04-06
申请人： Jae-yoon Yoo , Moon-han Park , Dong-ho Ahn , Sug-hun Hong , Kyung-won Park , Jeong-soo Lee
发明人： Jae-yoon Yoo , Moon-han Park , Dong-ho Ahn , Sug-hun Hong , Kyung-won Park , Jeong-soo Lee
IPC分类号： H01L21/76
CPC分类号： H01L21/76232
摘要： An isolation method for a semiconductor device where an insulating mask layer is formed on desired regions of a semiconductor substrate. A trench is formed to a desired depth in the semiconductor substrate using the insulating mask layer as a mask. An oxide layer is formed on the insulating mask layer and on the sidewall of the trench. A trench liner layer is formed on the oxide layer. An insulating filler layer is formed in the trench in the semiconductor substrate, on which the trench liner layer is formed, so as to fill the trench. The insulating mask layer is removed. According to the isolation method for a semiconductor device, it is possible to reduce dents from occurring along the edge of the trench, reduce a bird's beak type oxide layer from occurring at an interface between the insulating mask layers, decrease the leakage current, or improve the electrical characteristics, such as threshold voltage.

63. 发明授权

US07033895B2 Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process 有权
标题翻译：使用选择性外延生长工艺制造具有升高的源极/漏极结构的MOS晶体管的方法
公开(公告)号：US07033895B2
公开(公告)日：2006-04-25
申请号：US10823420
申请日：2004-04-13
申请人： Seung-hwan Lee , Moon-han Park , Hwa-sung Rhee , Ho Lee , Jae-yoon Yoo
发明人： Seung-hwan Lee , Moon-han Park , Hwa-sung Rhee , Ho Lee , Jae-yoon Yoo
IPC分类号： H01L21/336
CPC分类号： H01L29/7834 , H01L29/42376 , H01L29/66477 , H01L29/665 , H01L29/6656 , H01L29/66628
摘要： In a metal-oxide semiconductor (MOS) transistor with an elevated source/drain structure and in a method of fabricating the MOS transistor with the elevated source/drain structure using a selective epitaxy growth (SEG) process, a source/drain extension junction is formed after an epi-layer is formed, thereby preventing degradation of the source/drain junction region. In addition, the source/drain extension junction is partially overlapped by a lower portion of the gate layer, since two gate spacers are formed and two elevated source/drain layers are formed in accordance with the SEG process. This mitigates the short channel effect and reduces sheet resistance in the source/drain layers and the gate layer.
摘要翻译：在具有升高的源极/漏极结构的金属氧化物半导体（MOS）晶体管中，并且使用选择性外延生长（SEG）工艺制造具有升高的源极/漏极结构的MOS晶体管的方法中，源极/漏极延伸结是在形成外延层之后形成，从而防止源极/漏极结区域的劣化。此外，源极/漏极延伸结部分由栅极层的下部部分地重叠，因为形成了两个栅极间隔物，并且根据SEG工艺形成两个升高的源极/漏极层。这减轻了短沟道效应并降低了源极/漏极层和栅极层中的薄层电阻。

64. 发明申请

US20060040695A1 Method of group call service using push to talk scheme in mobile communication terminal 审中-公开
标题翻译：在移动通信终端中使用一键通方案的群呼服务方法
公开(公告)号：US20060040695A1
公开(公告)日：2006-02-23
申请号：US11206763
申请日：2005-08-19
申请人： Sung-Jae Yoon , Chang-Min Oh
发明人： Sung-Jae Yoon , Chang-Min Oh
IPC分类号： H04B7/00 , H04Q7/20
CPC分类号： H04L65/4061 , H04L65/1016 , H04W4/10 , H04W4/12 , H04W76/45
摘要： A method for performing a Push To Talk (PTT) group communication using a PTT scheme in a mobile communication terminal is disclosed. The method includes the steps of selecting one called user with whom a calling user wants to communicate through one-to-one communication from a PTT communication group of members that are taking part in the PTT group communication, performing a voice-record operation, if a predetermined Push To Data (PTD)-sending operation is executed for the one-to-one communication, and transmitting the voice-recorded PTD data to a PTT server which then transfers the voice-recorded PTD data to a called mobile communication terminal of the selected called user for the one-to-one communication. The PTT group communication allows two terminals to communicate with each other by a one-two-one scheme even while the PTT group communication is progressing.
摘要翻译：公开了一种在移动通信终端中使用PTT方式进行一键通（PTT）组通信的方法。该方法包括以下步骤：从正在参与PTT组通信的成员的PTT通信组中选择与主叫用户想通过一对一通信通话的一个被叫用户，执行语音记录操作，如果对于一对一通信执行预定的推送数据（PTD）发送操作，并将语音记录的PTD数据发送到PTT服务器，PTT服务器然后将语音记录的PTD数据传送到被叫移动通信终端所选择的被叫用户进行一对一通信。即使PTT组通信正在进行，PTT组通信也允许两个终端通过一对二的方式进行通信。

65. 发明授权

US07002872B2 Semiconductor memory device with a decoupling capacitor 失效
标题翻译：具有去耦电容器的半导体存储器件
公开(公告)号：US07002872B2
公开(公告)日：2006-02-21
申请号：US10676996
申请日：2003-09-30
申请人： Hyong-ryol Hwang , Young-hun Seo , Jae-yoon Sim
发明人： Hyong-ryol Hwang , Young-hun Seo , Jae-yoon Sim
IPC分类号： G11C8/00
CPC分类号： G11C5/063
摘要： A semiconductor memory device includes a core block having sub-arrays and sense amplifier regions. First and second charge storing regions are disposed at sides of the core block. First and second decoupling capacitors are formed at the first and second charge storing regions, respectively. A plurality of first voltage supply lines are disposed to supply a power supply voltage to the sense amplifier regions and are connected to one electrode of each of the first and second decoupling capacitors. A plurality of second voltage supply lines are disposed to supply a ground voltage to the sense amplifier regions and are connected to the other electrode of each of the first and second decoupling capacitors.
摘要翻译：半导体存储器件包括具有子阵列和读出放大器区域的核心块。第一和第二电荷存储区域设置在芯块的侧面。分别在第一和第二电荷存储区域形成第一和第二去耦电容器。设置多个第一电压供应线，以将电源电压提供给感测放大器区域，并且连接到第一和第二去耦电容器中的每一个的一个电极。设置多个第二电压供给线，以将接地电压提供给读出放大器区域，并连接到第一和第二去耦电容器中的每一个的另一个电极。

66. 发明申请

US20060032262A1 Icemaker 审中-公开
标题翻译：制冰器
公开(公告)号：US20060032262A1
公开(公告)日：2006-02-16
申请号：US11165242
申请日：2005-06-24
申请人： Kook-jeong Seo , Jae-seung Lee , Won-jae Yoon
发明人： Kook-jeong Seo , Jae-seung Lee , Won-jae Yoon
IPC分类号： F25C1/00
CPC分类号： F25C1/20 , F25C1/10 , F25C5/06 , F25C2305/022
摘要： An icemaker to freeze water into ice, includes an ice cube tray formed with cubes to be filled with the water. The icemaker also includes an ultrasonic vibrator attached to the ice cube tray, to apply ultrasonic vibration to the ice cube tray to undulate the water filled in the cubes. Thus, air included in water filled in cubes of an ice cube tray is uniformly removed.
摘要翻译：将冰箱冻结成冰的制冰机包括形成有待充满水的立方体的冰块托盘。制冰机还包括附接到冰块托盘的超声波振动器，以将超声波振动施加到冰块托盘以使填充在立方体中的水波动。因此，均匀地除去包含在装在冰块托盘的立方体中的水中的空气。

67. 发明授权

US06983010B1 High frequency equalizer using a demultiplexing technique and related semiconductor device 有权
标题翻译：使用解复用技术的高频均衡器和相关的半导体器件
公开(公告)号：US06983010B1
公开(公告)日：2006-01-03
申请号：US09542042
申请日：2000-03-31
申请人： Jae-yoon Sim , Hong-joon Park , Soo-in Cho , Jung-bae Lee
发明人： Jae-yoon Sim , Hong-joon Park , Soo-in Cho , Jung-bae Lee
IPC分类号： H03H7/30
CPC分类号： G11C7/1057 , G11C7/1012 , G11C7/1051 , G11C7/22 , G11C7/222 , H01L27/088 , H04L27/01
摘要： A high frequency equalizer using a demultiplexing technique and a semiconductor device using the same are provided. The high frequency equalizer demultiplexes input data input through an input and output terminal into a plurality of input data items, each having a time difference that is the same as the period of the input data. The equalizer restores the lost high frequency data components of the plurality of demultiplexed input data items, multiplexes the restored plurality of data items, and sequentially outputs the restored data items one by one. Therefore, using this high frequency equalizer, it is possible to allow enough time to restore the lost high frequency component even though the period of the input data is reduced by an increase of the data transmission speed. Using this high frequency equalizer, it is possible to correctly restore the lost high frequency component even at a high data transmission speed. Therefore, according to the semiconductor device including the high frequency equalizer, the lost high frequency component of data can be restored even at a high data transmission speed.
摘要翻译：提供了使用解复用技术的高频均衡器和使用其的半导体器件。高频均衡器将通过输入和输出端输入的输入数据解复用为多个输入数据项，每个具有与输入数据周期相同的时间差。均衡器恢复多路复用输入数据项的丢失的高频数据分量，复用恢复的多个数据项，并逐个依次输出恢复的数据项。因此，即使通过数据传输速度的增加来减少输入数据的周期，也可以使用这种高频均衡器来允许足够的时间来恢复丢失的高频分量。使用该高频均衡器，即使在高数据传输速度下也可以正确地恢复丢失的高频分量。因此，根据包括高频均衡器的半导体器件，即使在高数据传输速度下也可以恢复数据的丢失高频分量。

68. 发明申请

US20050256922A1 System and method for calculating real-time voltage stability risk index in power system using time series data 有权
标题翻译：使用时间序列数据计算电力系统实时电压稳定性风险指数的系统和方法
公开(公告)号：US20050256922A1
公开(公告)日：2005-11-17
申请号：US11113048
申请日：2005-04-25
申请人： Dong Kim , Young Moon , Ho Kim , Jae Yoon
发明人： Dong Kim , Young Moon , Ho Kim , Jae Yoon
IPC分类号： G06F19/00 , G06G7/00 , H02J3/00
CPC分类号： H02J3/00 , H02J2003/007 , Y02E60/76 , Y04S40/22
摘要： A system and method for calculating a real time voltage stability risk index in a power system are disclosed. The disclosed system comprises a real time phasor measurement device for calculating a voltage stability risk index using RMS voltage and an upper voltage stability monitoring system for collecting and sequencing the voltage stability risk index transferred from the real time phasor measurement device. The disclosed method comprises calculating RMS voltage by using bus voltage measured; calculating an N moving average voltage for the RMS voltages; calculating a % diversity between the bus voltage measured and the N moving average voltage; calculating a voltage stability risk index by dividing the area constructed by the % diversity by the number of sections; transferring the voltage stability risk index from a real time phasor measurement device to an upper voltage stability monitoring system; acquiring and sequencing the voltage stability risk indexes transferred.
摘要翻译：公开了一种用于计算电力系统中的实时电压稳定性风险指数的系统和方法。所公开的系统包括用于使用RMS电压计算电压稳定性风险指数的实时相量测量装置和用于收集和排序从实时相量测量装置传送的电压稳定性风险指数的上电压稳定性监测系统。所公开的方法包括通过使用测量的母线电压来计算RMS电压; 计算RMS电压的N移动平均电压; 计算总线电压和N移动平均电压之间的百分比; 通过将由％多样性构成的面积除以截面数来计算电压稳定性风险指数; 将电压稳定性风险指数从实时相量测量装置转移到上电压稳定监测系统; 获取和排序转移的电压稳定性风险指数。

69. 发明授权

US06937087B2 Temperature sensor and method for detecting trip temperature of a temperature sensor 有权
公开(公告)号：US06937087B2
公开(公告)日：2005-08-30
申请号：US10928498
申请日：2004-08-30
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G01K7/22 , G01K3/00 , G01K7/24 , G11C11/401 , G11C11/407 , G11C29/00 , G11C29/12 , H03K17/94 , H01L35/00
CPC分类号： G01K7/015 , G01K3/005
摘要： A comparator circuit of a temperature sensor includes an output node and a variable current node. The output node is a first voltage at a given temperature when a current at the variable current node is less than a threshold current, and a different second voltage at the given temperature when the current at the variable current node is more than the threshold current. A variable resistance circuit includes at least n resistors of different resistive values connected in series between the variable current node of the comparator and a supply voltage, where n is an integer of 4 or more. A switching circuit is provided to selectively bypasses individual ones of the n resistors during a test sequence to determine a trip temperature of the sensor.

70. 发明申请

US20050170620A1 Transistors for semiconductor device and methods of fabricating the same 有权
标题翻译：用于半导体器件的晶体管及其制造方法
公开(公告)号：US20050170620A1
公开(公告)日：2005-08-04
申请号：US11045060
申请日：2005-01-31
申请人： Jae-Yoon Yoo , Hwa-Sung Rhee , Tetsuji Ueno , Ho Lee , Seung-Hwan Lee , Hyun-Suk Kim , Moon-Han Park
发明人： Jae-Yoon Yoo , Hwa-Sung Rhee , Tetsuji Ueno , Ho Lee , Seung-Hwan Lee , Hyun-Suk Kim , Moon-Han Park
IPC分类号： H01L21/00 , H01L21/336 , H01L29/10 , H01L29/78
CPC分类号： H01L29/66537 , H01L29/1083 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/6659 , H01L29/7833
摘要： The present invention discloses a transistor for a semiconductor device capable of preventing the generation of a depletion capacitance in a gate pattern due to the diffusion of impurity ions. The present invention also discloses a method of fabricating the transistor.
摘要翻译：本发明公开了一种用于半导体器件的晶体管，其能够防止由于杂质离子的扩散而产生栅极图案中的耗尽电容。本发明还公开了一种制造晶体管的方法。

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