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51. 发明授权

US08201324B2 Method of manufacturing electronic component embedded circuit board 有权
标题翻译：电子元件嵌入式电路板的制造方法
公开(公告)号：US08201324B2
公开(公告)日：2012-06-19
申请号：US12359416
申请日：2009-01-26
申请人： Byoung-Chan Kim , Young-Hwan Shin , Jong-Jin Lee
发明人： Byoung-Chan Kim , Young-Hwan Shin , Jong-Jin Lee
IPC分类号： H05K3/36
CPC分类号： H01L24/91 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2224/04105 , H01L2224/16 , H01L2224/24227 , H01L2224/32145 , H01L2224/73267 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/18162 , H05K1/187 , H05K3/205 , H05K3/4602 , H05K2201/10515 , H05K2201/10674 , H05K2203/0376 , H05K2203/1469 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49133 , Y10T29/49155 , Y10T29/49165 , H01L2224/82 , H01L2224/0401
摘要： An electronic component embedded printed circuit board and a method for manufacturing the same are disclosed. The method includes: providing a first carrier having a first circuit pattern formed on one surface thereof; providing a second carrier having a second circuit pattern formed on one surface thereof; flip-chip bonding an electronic component to the first circuit pattern; stacking one side of an insulator on one side of the first carrier to cover the electronic component; compressing the second carrier having the second circuit pattern formed on one surface thereof on an other side of the insulator; and removing the first carrier and the second carrier. The method can improve the degree of conformation for an electrical component by embedding the electrical component using a flip-chip bonding method and can improve the yield by simplifying the production process.
摘要翻译：公开了电子部件嵌入式印刷电路板及其制造方法。该方法包括：提供具有形成在其一个表面上的第一电路图案的第一载体; 提供具有形成在其一个表面上的第二电路图案的第二载体; 将电子部件倒装成第一电路图案; 将绝缘体的一侧堆叠在第一载体的一侧以覆盖电子部件; 在绝缘体的另一侧上压制在其一个表面上形成有第二电路图案的第二载体; 以及去除所述第一载体和所述第二载体。该方法可以通过使用倒装芯片接合方法嵌入电子部件来提高电气部件的构造程度，并且可以通过简化制造工艺来提高成品率。

52. 发明申请

US20120134125A1 METHOD OF MANUFACTURING ELECTRONIC COMPONENT EMBEDDED CIRCUIT BOARD 审中-公开
标题翻译：制造电子元件嵌入式电路板的方法
公开(公告)号：US20120134125A1
公开(公告)日：2012-05-31
申请号：US13364104
申请日：2012-02-01
申请人： Byoung-Chan Kim , Young-Hwan Shin , Jong-Jin Lee
发明人： Byoung-Chan Kim , Young-Hwan Shin , Jong-Jin Lee
IPC分类号： H05K1/18
CPC分类号： H01L24/91 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2224/04105 , H01L2224/16 , H01L2224/24227 , H01L2224/32145 , H01L2224/73267 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/18162 , H05K1/187 , H05K3/205 , H05K3/4602 , H05K2201/10515 , H05K2201/10674 , H05K2203/0376 , H05K2203/1469 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49133 , Y10T29/49155 , Y10T29/49165 , H01L2224/82 , H01L2224/0401
摘要： An electronic component embedded printed circuit board and a method for manufacturing the same are disclosed. The method includes: providing a first carrier having a first circuit pattern formed on one surface thereof; providing a second carrier having a second circuit pattern formed on one surface thereof; flip-chip bonding an electronic component to the first circuit pattern; stacking one side of an insulator on one side of the first carrier to cover the electronic component; compressing the second carrier having the second circuit pattern formed on one surface thereof on an other side of the insulator; and removing the first carrier and the second carrier. The method can improve the degree of conformation for an electrical component by embedding the electrical component using a flip-chip bonding method and can improve the yield by simplifying the production process.
摘要翻译：公开了电子部件嵌入式印刷电路板及其制造方法。该方法包括：提供具有形成在其一个表面上的第一电路图案的第一载体; 提供具有形成在其一个表面上的第二电路图案的第二载体; 将电子部件倒装成第一电路图案; 将绝缘体的一侧堆叠在第一载体的一侧以覆盖电子部件; 在绝缘体的另一侧上压制在其一个表面上形成有第二电路图案的第二载体; 以及去除所述第一载体和所述第二载体。该方法可以通过使用倒装芯片接合方法嵌入电子部件来提高电气部件的构造程度，并且可以通过简化制造工艺来提高成品率。

53. 发明授权

US08187920B2 Integrated circuit micro-module 有权
标题翻译：集成电路微模块
公开(公告)号：US08187920B2
公开(公告)日：2012-05-29
申请号：US13022392
申请日：2011-02-07
申请人： Anuraag Mohan , Peter Smeys
发明人： Anuraag Mohan , Peter Smeys
IPC分类号： H01L21/50 , H01L21/48 , H01L21/44 , H01L21/66
CPC分类号： H01L24/97 , H01L21/4853 , H01L21/486 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5385 , H01L23/5389 , H01L23/66 , H01L24/24 , H01L24/82 , H01L25/0652 , H01L25/16 , H01L2221/68377 , H01L2223/6677 , H01L2224/24137 , H01L2224/24227 , H01L2224/2518 , H01L2224/32225 , H01L2224/73267 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/1461 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3025 , H05K1/165 , H05K1/185 , H05K2201/10098 , H05K2203/1469 , H01L2224/82 , H01L2924/00
摘要： One aspect of the present invention relates to an integrated circuit package that includes multiple layers of a planarizing, photo-imageable epoxy that are formed over a substrate. In some designs, the substrate is a silicon wafer. An integrated circuit is embedded in the epoxy. An antenna, which is electrically coupled to the active face of the integrated circuit through an interconnect layer, is formed over one of the epoxy layers. In various embodiments, at least some of the epoxy layers are positioned between the substrate and the antenna such that there is a distance of at least approximately 100 microns between the substrate and the antenna.
摘要翻译：本发明的一个方面涉及一种集成电路封装，该集成电路封装包括在衬底上形成的多层平坦化，光可成像环氧树脂。在一些设计中，衬底是硅晶片。集成电路嵌入在环氧树脂中。通过互连层电耦合到集成电路的有源面的天线在一个环氧树脂层上形成。在各种实施例中，环氧树脂层中的至少一些位于衬底和天线之间，使得在衬底和天线之间存在至少约100微米的距离。

54. 发明申请

US20120037404A1 PACKAGING SUBSTRATE HAVING A PASSIVE ELEMENT EMBEDDED THEREIN AND METHOD OF FABRICATING THE SAME 有权
标题翻译：具有嵌入式被动元件的包装基板及其制造方法
公开(公告)号：US20120037404A1
公开(公告)日：2012-02-16
申请号：US13208745
申请日：2011-08-12
申请人： Shih- Ping Hsu , Zhao-Chong Zeng
发明人： Shih- Ping Hsu , Zhao-Chong Zeng
IPC分类号： H05K7/20 , H05K1/16 , B23K1/19 , B32B38/10 , B23K1/00
CPC分类号： H05K3/4644 , H01L23/49822 , H01L23/50 , H01L2924/0002 , H05K1/113 , H05K1/183 , H05K1/185 , H05K1/187 , H05K3/0097 , H05K3/4038 , H05K3/4602 , H05K3/4679 , H05K2201/0129 , H05K2201/10636 , H05K2203/1469 , H05K2203/1536 , Y02P70/611 , Y10T29/4913 , Y10T29/49146 , H01L2924/00
摘要： A packaging substrate includes: a dielectric layer unit having top and bottom surfaces; a positioning pad embedded in the bottom surface of the dielectric layer unit; at least a passive element having a plurality of electrode pads disposed on upper and lower surfaces thereof, the passive element being embedded in the dielectric layer unit and corresponding to the positioning pad; a first circuit layer disposed on the top surface of the dielectric layer unit, the first circuit layer having first conductive vias electrically connected to the electrode pads disposed on the upper surface of the passive element; and a second circuit layer disposed on the bottom surface of the dielectric layer unit, the second circuit layer having second conductive vias electrically connected to the electrode pads disposed on the lower surface of the passive element. Through the embedding of the passive element, the overall structure may have a reduced height.
摘要翻译：包装基板包括：具有顶表面和底表面的电介质层单元; 位于所述电介质层单元的底表面中的定位焊盘; 至少一个无源元件，其具有设置在其上表面和下表面上的多个电极焊盘，所述无源元件嵌入在所述电介质层单元中并对应于所述定位焊盘; 设置在电介质层单元的顶表面上的第一电路层，第一电路层具有电连接到设置在无源元件的上表面上的电极焊盘的第一导电通孔; 以及设置在所述电介质层单元的底表面上的第二电路层，所述第二电路层具有电连接到设置在所述无源元件的下表面上的电极焊盘的第二导电通孔。通过嵌入无源元件，整体结构可以具有减小的高度。

55. 发明申请

US20120006464A1 FLEXIBLE ELECTRONIC PRODUCT AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：柔性电子产品及其制造方法
公开(公告)号：US20120006464A1
公开(公告)日：2012-01-12
申请号：US13140387
申请日：2009-12-16
申请人： Jeroen van den Brand , Andreas Heinrich Dietzel
发明人： Jeroen van den Brand , Andreas Heinrich Dietzel
IPC分类号： B32B37/12 , B32B37/00
CPC分类号： H05K1/185 , H01L21/486 , H01L23/49827 , H01L23/4985 , H01L23/5389 , H01L24/19 , H01L24/76 , H01L24/97 , H01L2224/04105 , H01L2224/32245 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01078 , H01L2924/01082 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H05K1/0269 , H05K1/186 , H05K1/189 , H05K3/0032 , H05K3/0035 , H05K3/105 , H05K3/107 , H05K3/1258 , H05K3/32 , H05K2201/0108 , H05K2201/10674 , H05K2203/107 , H05K2203/1469 , H05K2203/1545 , H05K2203/1581 , Y10T29/49117 , Y10T29/49126 , Y10T29/49144 , H01L2924/00
摘要： A method is described for manufacturing a flexible electronic product, the method comprising the steps of—providing (S1) a flexible foil (10; 110) with a first and a second, mutually opposite main side (11, 12; 111, 112),—placing (S2) a component (30; 130) at the first foil at the first main side (11; 111), the component having at least one electrical terminal (31; 131) facing towards the second main side (12; 112)—estimating (S3) a position of the at least one electrical terminal (131),—adaptively forming (S4) a conductive path (40A, 40B, 40C) to the at least one electrical terminal, based on said estimated position.
摘要翻译：描述了一种用于制造柔性电子产品的方法，所述方法包括以下步骤：（S1）具有第一和第二相互相对的主侧（11,12; 111,112）的柔性箔（10; 110）在第一主侧（11; 111）的第一箔处放置（S2）部件（30; 130），所述部件具有面向第二主侧（12; 111）的至少一个电端子（31; 131） 112） - 确定所述至少一个电气端子（131）的位置（S3）， - 基于所述估计位置自适应地形成（S4）导电路径（40A，40B，40C）到所述至少一个电气终端。

56. 发明申请

US20110247210A1 PROCESS FOR THE WAFER-SCALE FABRICATION OF ELECTRONIC MODULES FOR SURFACE MOUNTING 有权
标题翻译：用于表面安装的电子模块的尺寸制造工艺
公开(公告)号：US20110247210A1
公开(公告)日：2011-10-13
申请号：US13140637
申请日：2009-12-18
申请人： Christian Val , Pascal Couderc , Alexandre Val
发明人： Christian Val , Pascal Couderc , Alexandre Val
IPC分类号： H05K3/30
CPC分类号： H01L21/6835 , H01L24/29 , H01L24/81 , H01L24/83 , H01L24/96 , H01L2221/68377 , H01L2224/04105 , H01L2224/13139 , H01L2224/16 , H01L2224/2919 , H01L2224/29298 , H01L2224/81201 , H01L2224/81801 , H01L2224/838 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01058 , H01L2924/01061 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/1461 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H05K1/141 , H05K1/185 , H05K3/321 , H05K2203/1469 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929 , H01L2224/0401
摘要： A process for the wafer-scale fabrication of CMS electronic modules starts from a wafer with metallized outputs, comprising electronic components molded in resin and, on one side, the external outputs of the electronic components on which a nonoxidizable metal or alloy is deposited, and of a printed circuit provided with oxidizable metal or alloy contact pads. In the process, the wafer is cut in predetermined patterns for obtaining reconfigured molded components that include at least one electronic component; the reconfigured components are assembled on the printed circuit, the metallized external outputs of the reconfigured components being placed opposite the metallized contact pads of the printed circuit; and these external outputs are connected solderlessly to the metallized contact pads of the printed circuit by means of a material based on an electrically conductive adhesive or ink.
摘要翻译：用于晶片尺寸制造CMS电子模块的工艺从具有金属化输出的晶片开始，包括以树脂模制的电子部件，以及在一侧上沉积有不可氧化的金属或合金的电子部件的外部输出，以及设置有可氧化金属或合金接触垫的印刷电路。在该过程中，以预定图案切割晶片以获得包括至少一个电子部件的重新配置的模制部件; 重新配置的组件被组装在印刷电路上，重新配置的组件的金属化的外部输出与印刷电路的金属化接触焊盘相对放置; 并且这些外部输出通过基于导电粘合剂或墨水的材料无焊地连接到印刷电路的金属化接触焊盘。

57. 发明申请

US20110169191A1 SEALING FRAME AND METHOD FOR COVERING A COMPONENT 有权
标题翻译：密封框架和覆盖组件的方法
公开(公告)号：US20110169191A1
公开(公告)日：2011-07-14
申请号：US12737524
申请日：2009-07-06
申请人： Stephan Geise
发明人： Stephan Geise
IPC分类号： B29C45/14 , B29C39/10
CPC分类号： H05K3/284 , H05K5/065 , H05K2203/1316 , H05K2203/1469
摘要： A sealing frame for delimiting a surface of a component which is to be covered with a molding compound includes an upper frame part and a lower frame part which may be detachably joined together. The component to be covered with the molding compound is enclosable by the upper frame part and the lower frame part in such a way that a cavity is formed by the sealing frame and the component. The component is inserted into the upper frame par and lower frame part, and the upper and lower frame part are joined to form the sealing frame, so that the cavity is formed which is enclosed by the component and the upper frame part, and a molding compound is introduced into the cavity and cured to form a cover.
摘要翻译：用于限定待被模制化合物覆盖的部件的表面的密封框架包括可以可拆卸地接合在一起的上框架部分和下框架部分。用模制化合物覆盖的部件可以由上框架部分和下框架部分封闭，使得由密封框架和部件形成空腔。将该部件插入上框架部分和下框架部分中，并且将上框架部分和下框架部分接合以形成密封框架，从而形成由部件和上框架部分包围的模腔，以及模制件将化合物引入空腔中并固化以形成覆盖物。

58. 发明申请

US20110141711A1 ELECTRONIC COMPONENT EMBEDDED PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：电子元件嵌入式印刷电路板及其制造方法
公开(公告)号：US20110141711A1
公开(公告)日：2011-06-16
申请号：US12967585
申请日：2010-12-14
申请人： Seung-Hyun SOHN , Yul-Kyo Chung , Dae-Jung Byun , Moon-II Kim
发明人： Seung-Hyun SOHN , Yul-Kyo Chung , Dae-Jung Byun , Moon-II Kim
IPC分类号： H05K1/18 , H05K3/30
CPC分类号： H01L23/5389 , H01L23/5383 , H01L24/24 , H01L2224/04105 , H01L2224/73267 , H01L2924/01029 , H05K1/185 , H05K2201/09063 , H05K2203/1469 , H05K2203/166 , Y10T29/4913
摘要： An electronic component embedded printed circuit board and a method of manufacture the same are disclosed. The electronic component embedded printed circuit board in accordance with an embodiment of the present invention can include a dielectric core substrate, which has a cavity formed therein, an electronic component, which is housed in the cavity and has an electrode formed on one surface thereof, an insulation layer, which is formed on both surface of the dielectric core substrate, a via, which is formed in the insulation layer such that the via is electrically connected to the electrode, and a first circuit pattern, which is formed on the insulation layer such that the first circuit pattern is electrically connected to the via.
摘要翻译：公开了电子部件嵌入式印刷电路板及其制造方法。根据本发明的实施例的电子部件嵌入式印刷电路板可以包括其中形成有腔的电介质芯基板，容纳在空腔中并具有形成在其一个表面上的电极的电子部件，形成在介质芯基板的两个表面上的绝缘层，形成在绝缘层中的通孔，使得通孔电连接到电极;以及第一电路图案，其形成在绝缘层上使得第一电路图案电连接到通孔。

59. 发明授权

US07955797B2 Fluid storage and dispensing system including dynamic fluid monitoring of fluid storage and dispensing vessel 有权
标题翻译：流体储存和分配系统包括流体储存和分配容器的动态流体监测
公开(公告)号：US07955797B2
公开(公告)日：2011-06-07
申请号：US10972542
申请日：2004-10-25
申请人： James V. McManus , James A. Dietz , Steven M. Lurcott
发明人： James V. McManus , James A. Dietz , Steven M. Lurcott
IPC分类号： C12Q1/68
CPC分类号： G01N33/00 , F17C11/00 , G01F15/063 , G01F22/02 , G01F23/0076 , G01M3/32 , G01M3/3236 , G06Q10/087 , G06Q30/04 , G06Q50/04 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L22/10 , H01L23/5389 , H01L24/24 , H01L24/48 , H01L24/82 , H01L25/03 , H01L25/0652 , H01L25/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/24011 , H01L2224/2518 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01058 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19042 , H05K1/185 , H05K3/4602 , H05K2203/0165 , H05K2203/085 , H05K2203/1469 , Y02P90/30 , Y10T29/4913 , Y10T29/49133 , Y10T29/49165 , Y10T29/53183 , H01L2224/45099
摘要： A monitoring system for monitoring fluid in a fluid supply vessel during operation including dispensing of fluid from the fluid supply vessel. The monitoring system includes (i) one or more sensors for monitoring a characteristic of the fluid supply vessel or the fluid dispensed therefrom, (ii) a data acquisition module operatively coupled to the one or more sensors to receive monitoring data therefrom and responsively generate an output correlative to the characteristic monitored by the one or more sensors, and (iii) a processor and display operatively coupled with the data acquisition module and arranged to process the output from the data acquisition module and responsively output a graphical representation of fluid in the fluid supply vessel.
摘要翻译：一种用于在操作期间监测流体供应容器中的流体的监测系统，包括从流体供应容器分配流体。监测系统包括（i）用于监测流体供应容器或从其分配的流体的特性的一个或多个传感器，（ii）可操作地耦合到所述一个或多个传感器以从其接收监测数据的数据采集模块，并且响应地生成输出与由一个或多个传感器监测的特性相关联，以及（iii）处理器和显示器，其与数据采集模块可操作地耦合并被布置成处理来自数据采集模块的输出并且响应地输出流体在流体中的图形表示供应船。

60. 发明申请

US20110126408A1 Method of making high density interposer and electronic package utilizing same 有权
标题翻译：制造高密度插入件的方法和使用其的电子封装
公开(公告)号：US20110126408A1
公开(公告)日：2011-06-02
申请号：US12592734
申请日：2009-12-01
申请人： Timothy Antesberger , Frank D. Egitto , Voya R. Markovich , William E. Wilson
发明人： Timothy Antesberger , Frank D. Egitto , Voya R. Markovich , William E. Wilson
IPC分类号： H05K3/20 , H05K3/10
CPC分类号： H05K3/4623 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L24/19 , H01L24/20 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01067 , H01L2924/01075 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H05K3/0035 , H05K3/305 , H05K2201/0154 , H05K2201/10378 , H05K2201/10674 , H05K2203/061 , H05K2203/1469 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , H01L2924/00012 , H01L2924/00
摘要： A method of making an electronic package designed for interconnecting high density patterns of conductors of an electronic device (e.g., semiconductor chip) and less dense patterns of conductors of hosting circuitized substrates (e.g., chip carriers, PCBs). In one embodiment, the method includes bonding a chip to a single dielectric layer, forming a high density pattern of conductors on one surface of the layer, forming openings in the layer and then depositing metallurgy to form a desired circuit pattern which is then adapted for engaging and being electrically coupled to a corresponding pattern on yet another hosting substrate. According to another embodiment of the invention, an electronic package using a dual layered interposer is provided. Also provided are methods of making circuitized substrate assemblies using the electronic packages made using the invention's teachings.
摘要翻译：一种制造电子封装的方法，其设计用于互连电子器件（例如，半导体芯片）的导体的高密度图案和托管电路化基板（例如，芯片载体，PCB）的导体的较不致密的图案。在一个实施例中，该方法包括将芯片接合到单个电介质层，在该层的一个表面上形成高密度图案的导体，在该层中形成开口，然后沉积冶金以形成期望的电路图案，接合并且电耦合到另一托管基板上的对应图案。根据本发明的另一个实施例，提供了一种使用双层插入器的电子封装。还提供了使用根据本发明的教导制造的电子封装制造电路化基板组件的方法。

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