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    • 55. 发明授权
    • Partial edge bead removal to allow improved grounding during e-beam mask writing
    • 部分边缘珠去除以允许在电子束掩模写入期间改进接地
    • US07338609B2
    • 2008-03-04
    • US11333678
    • 2006-01-17
    • J. Brett Rolfson
    • J. Brett Rolfson
    • B44C1/22C25F3/00G03F1/00
    • G03F1/40G03F1/86
    • A method to provide a ground point for second, or subsequent, e-beam mask-writing steps by selectively removing the photoresist edge bead of a photomask substrate to expose the underlying chrome layer. The selective removal leaves at least one tab of photoresist edge bead over the chrome layer. After the first e-beam mask writing step and subsequent etch, the tab can be removed to expose a portion of the chromium layer that can act as a new ground point for a second e-beam etch. Also, a nozzle for use in selectively removing the edge bead to leave a tab of photoresist edge bead.
    • 通过选择性地去除光掩模衬底的光致抗蚀剂边缘以暴露下面的铬层来为第二或随后的电子束掩模写入步骤提供接地点的方法。 选择性去除在铬层上留下光致抗蚀剂边缘珠的至少一个突片。 在第一电子束掩模写入步骤和随后的蚀刻之后,可以去除突片以暴露可以充当第二电子束蚀刻的新接地点的铬层的一部分。 而且,用于选择性地去除边缘珠以留下光致抗蚀剂边缘珠的突片的喷嘴。
    • 56. 发明授权
    • Modification of mask blank to avoid charging effect
    • 修改面罩空白以避免充电效果
    • US07226706B2
    • 2007-06-05
    • US10441888
    • 2003-05-20
    • Cheng-ming Lin
    • Cheng-ming Lin
    • G03F1/00G03C5/00
    • G03F1/40C23C14/048G03F1/54G03F1/78
    • A blank mask for photomasking patterns on an integrated circuit comprises a non-conductive substrate and a layer of conductive material deposited on the substrate covering substantially the entire surface of said substrate. Methods for preventing charge accumulation on a non-conductive region of a mask, which is not covered by a layer of conductive material, are provided. One method comprises controlling electron beams to prevent the beams from striking an outer region for an area more than 90 percent of the outer region when patterning a predetermined feature on the mask. The outer region comprises an area beginning from an edge of the mask and ending at 2 to 6 mm inward from the edge. Another method comprises using a blocker to prevent electron beams from hitting the outer region for an area more than 90 percent of the outer region when patterning a predetermined feature on the substrate.
    • 用于集成电路上的光掩模图案的空白掩模包括非导电衬底和沉积在衬底上的基本覆盖所述衬底的整个表面的导电材料层。 提供了防止未被导电材料层覆盖的掩模的非导电区域上的电荷积聚的方法。 一种方法包括在图案化掩模上的预定特征时,控制电子束以防止光束撞击外部区域超过外部区域的90%以上的区域。 外部区域包括从掩模的边缘开始并从边缘向内延伸2至6mm的区域。 另一种方法包括当图案化衬底上的预定特征时,使用阻挡剂来防止电子束撞击外部区域超过外部区域的90%的面积。
    • 58. 发明申请
    • Method of mask making and structure thereof for improving mask ESD immunity
    • 掩模制造方法及其结构,用于提高掩模的ESD抗扰度
    • US20060216614A1
    • 2006-09-28
    • US11089061
    • 2005-03-24
    • Shyh-Jen GuoYu Lo
    • Shyh-Jen GuoYu Lo
    • G03C5/00G03F1/00
    • G03F1/40G03F1/50G03F1/62
    • A method for fabricating a mask (or reticle) to improve the mask ESD immunity is provided. A substrate having an upper surface is substantially transparent to a selected radiation. A light sensitive layer is formed over the substrate. The light sensitive layer is patterned and etched to form a pattern of openings in the light sensitive layer. The substrate is etched according to the pattern of openings in the light sensitive layer. The light sensitive layer is stripped. An opaque layer is then deposited on the upper surface and in the openings of the patterned substrate. The substrate is planarized by removing excess opaque layer from over the upper surface of the substrate. A pellicle is then mounted outstretched on the upper surface of the substrate.
    • 提供了制造掩模(或掩模版)以提高掩模ESD抗扰度的方法。 具有上表面的基底对所选择的辐射基本上是透明的。 在衬底上形成光敏层。 对感光层进行图案化和蚀刻,以在光敏层中形成开口图案。 根据光敏层中的开口图案蚀刻衬底。 剥去光敏层。 然后在图案化衬底的上表面和开口中沉积不透明层。 通过从衬底的上表面上去除多余的不透明层来平坦化衬底。 然后将防护薄膜组件伸出到衬底的上表面上。