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51. 发明授权

US08295001B2 Systems and methods for low latency noise cancellation 有权
标题翻译：用于低延迟噪声消除的系统和方法
公开(公告)号：US08295001B2
公开(公告)日：2012-10-23
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： G11B5/09 , G11B27/36
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

52. 发明申请

US20120068752A1 Systems and Methods for Low Latency Noise Cancellation 有权
标题翻译：低延迟噪声消除系统和方法
公开(公告)号：US20120068752A1
公开(公告)日：2012-03-22
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： H03H11/26 , H03K5/01
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

53. 发明申请

US20120033323A1 Systems and Methods for Servo Data Based Harmonics Calculation 有权
标题翻译：基于伺服数据的谐波计算系统与方法
公开(公告)号：US20120033323A1
公开(公告)日：2012-02-09
申请号：US12851455
申请日：2010-08-05
申请人： George Mathew , Xun Zhang , Hongwei Song
发明人： George Mathew , Xun Zhang , Hongwei Song
IPC分类号： G11B21/02 , G11B5/127 , G01R23/00
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a circuit for determining harmonics is disclosed that includes an analog to digital conversion circuit that provides a series of digital samples corresponding to a pattern within a servo data region of a storage medium, and a harmonic calculation circuit. The harmonic calculation circuit is operable to calculate a first harmonic value for the series of digital samples, calculate a second harmonic value for the series of digital samples, and calculate a ratio of the first harmonic value to the second harmonic value.
摘要翻译：本发明的各种实施例提供了用于基于伺服数据的谐波计算的系统和方法。例如，公开了一种用于确定谐波的电路，其包括提供与存储介质的伺服数据区域内的模式相对应的一系列数字样本的模数转换电路和谐波计算电路。谐波计算电路可操作地计算一系列数字采样的一次谐波值，计算一系列数字采样的二次谐波值，并计算一次谐波值与二次谐波值的比值。

54. 发明申请

US20120056612A1 Systems and Methods for Phase Compensated Harmonic Sensing in Fly Height Control 有权
标题翻译：飞行高度控制中相位补偿谐波检测的系统与方法
公开(公告)号：US20120056612A1
公开(公告)日：2012-03-08
申请号：US12875734
申请日：2010-09-03
申请人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
发明人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
IPC分类号： G01R25/00
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic.
摘要翻译：本发明的各种实施例提供了用于相位补偿谐波感测的系统和方法。例如，公开了一种用于谐波计算的电路，其包括相位差估计电路和相位偏移补偿电路。谐波计算电路可操作以基于周期性数据模式和基于周期性数据模式的二次谐波计算第一谐波。所述相位差估计电路可操作以计算所述一次谐波和所述第二谐波之间的相位差。相位偏移补偿电路可操作以将二次谐波与第一谐波对准以产生对准的谐波。

55. 发明授权

US08605381B2 Systems and methods for phase compensated harmonic sensing in fly height control 有权
标题翻译：飞行高度控制中相位补偿谐波感测的系统和方法
公开(公告)号：US08605381B2
公开(公告)日：2013-12-10
申请号：US12875734
申请日：2010-09-03
申请人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
发明人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
IPC分类号： G11B21/02 , G11B27/36
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic.
摘要翻译：本发明的各种实施例提供了用于相位补偿谐波感测的系统和方法。例如，公开了一种用于谐波计算的电路，其包括相位差估计电路和相位偏移补偿电路。谐波计算电路可操作以基于周期性数据模式和基于周期性数据模式的二次谐波计算第一谐波。所述相位差估计电路可操作以计算所述一次谐波和所述第二谐波之间的相位差。相位偏移补偿电路可操作以将二次谐波与第一谐波对准以产生对准的谐波。

56. 发明授权

US08325432B2 Systems and methods for servo data based harmonics calculation 有权
标题翻译：基于伺服数据的谐波计算的系统和方法
公开(公告)号：US08325432B2
公开(公告)日：2012-12-04
申请号：US12851455
申请日：2010-08-05
申请人： George Mathew , Xun Zhang , Hongwei Song
发明人： George Mathew , Xun Zhang , Hongwei Song
IPC分类号： G11B27/36 , G11B21/02
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a circuit for determining harmonics is disclosed that includes an analog to digital conversion circuit that provides a series of digital samples corresponding to a pattern within a servo data region of a storage medium, and a harmonic calculation circuit. The harmonic calculation circuit is operable to calculate a first harmonic value for the series of digital samples, calculate a second harmonic value for the series of digital samples, and calculate a ratio of the first harmonic value to the second harmonic value.
摘要翻译：本发明的各种实施例提供了用于基于伺服数据的谐波计算的系统和方法。例如，公开了一种用于确定谐波的电路，其包括提供与存储介质的伺服数据区域内的模式相对应的一系列数字样本的模数转换电路和谐波计算电路。谐波计算电路可操作地计算一系列数字采样的一次谐波值，计算一系列数字采样的二次谐波值，并计算一次谐波值与二次谐波值的比值。

57. 发明申请

US20110209026A1 Systems and Methods for Data Recovery Using Enhanced Sync Mark Location 有权
标题翻译：使用增强型同步标记位置进行数据恢复的系统和方法
公开(公告)号：US20110209026A1
公开(公告)日：2011-08-25
申请号：US12887317
申请日：2010-09-21
申请人： Haitao Xia , Shaohua Yang , George Mathew
发明人： Haitao Xia , Shaohua Yang , George Mathew
IPC分类号： G06F17/30 , H03M13/05 , G06F11/10
CPC分类号： G11B20/1403 , G11B5/59616 , G11B20/1217 , G11B2020/1287 , G11B2020/1294 , G11B2020/1476 , G11B2020/185 , H03M13/33
摘要： Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value.
摘要翻译：本发明的各种实施例提供用于识别存储介质上的可再现位置的系统和方法。作为示例，讨论了包括数据存储电路，模式比较电路和阈值比较电路的电路。数据存储电路可操作以存储对应于感兴趣区域的第一组数据样本。模式比较电路可操作以将第一组数据样本的子集与对应于感兴趣区域的第二组数据样本的子集进行比较。模式比较电路可操作以产生与第一组数据样本与第二组数据样本的子集之间的相似度对应的匹配值。阈值比较电路可操作以至少部分地基于相对于阈值的匹配值的大小来指示锚定点。

58. 发明授权

US08669891B2 Systems and methods for ADC based timing and gain control 有权
标题翻译：基于ADC的定时和增益控制的系统和方法
公开(公告)号：US08669891B2
公开(公告)日：2014-03-11
申请号：US13186267
申请日：2011-07-19
申请人： Haitao Xia , George Mathew , Shaohua Yang
发明人： Haitao Xia , George Mathew , Shaohua Yang
IPC分类号： H03M3/00
CPC分类号： H03M1/1028 , H03M1/12
摘要： Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output.
摘要翻译：本发明的各种实施例提供用于数据处理的电路，系统和方法。例如，讨论了一种数据处理电路，其包括：模数转换器电路，目标响应电路和定时电路。模数转换器电路可操作以接收数据输入并提供与采样相位同步的相应数字采样。采样相位对应于相位反馈。目标响应电路可操作以提供对应于已知输入的预期输出。定时电路可操作以至少部分地基于从预期输出导出的值来产生相位反馈。

59. 发明申请

US20130021187A1 Systems and Methods for ADC Based Timing and Gain Control 有权
标题翻译：基于ADC的时序和增益控制的系统和方法
公开(公告)号：US20130021187A1
公开(公告)日：2013-01-24
申请号：US13186267
申请日：2011-07-19
申请人： Haitao Xia , George Mathew , Shaohua Yang
发明人： Haitao Xia , George Mathew , Shaohua Yang
IPC分类号： H03M1/12
CPC分类号： H03M1/1028 , H03M1/12
摘要： Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output.
摘要翻译：本发明的各种实施例提供用于数据处理的电路，系统和方法。例如，讨论了一种数据处理电路，其包括：模数转换器电路，目标响应电路和定时电路。模数转换器电路可操作以接收数据输入并提供与采样相位同步的相应数字采样。采样相位对应于相位反馈。目标响应电路可操作以提供对应于已知输入的预期输出。定时电路可操作以至少部分地基于从预期输出导出的值来产生相位反馈。

60. 发明授权

US08773794B2 Systems and methods for block-wise inter-track interference compensation 有权
标题翻译：用于块式轨道间干扰补偿的系统和方法
公开(公告)号：US08773794B2
公开(公告)日：2014-07-08
申请号：US13186213
申请日：2011-07-19
申请人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
发明人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
IPC分类号： G11B5/09
CPC分类号： G11B20/10046 , G11B5/012 , G11B5/09 , G11B19/045 , G11B20/10398 , G11B20/1217 , G11B2020/10759 , G11B2020/1232 , G11B2020/1298 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。数据缓冲器可操作以存储对应于块的先前轨道数据集。轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰。

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