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    • 1. 发明授权
    • Systems and methods for ADC based timing and gain control
    • 基于ADC的定时和增益控制的系统和方法
    • US08669891B2
    • 2014-03-11
    • US13186267
    • 2011-07-19
    • Haitao XiaGeorge MathewShaohua Yang
    • Haitao XiaGeorge MathewShaohua Yang
    • H03M3/00
    • H03M1/1028H03M1/12
    • Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output.
    • 本发明的各种实施例提供用于数据处理的电路,系统和方法。 例如,讨论了一种数据处理电路,其包括:模数转换器电路,目标响应电路和定时电路。 模数转换器电路可操作以接收数据输入并提供与采样相位同步的相应数字采样。 采样相位对应于相位反馈。 目标响应电路可操作以提供对应于已知输入的预期输出。 定时电路可操作以至少部分地基于从预期输出导出的值来产生相位反馈。
    • 2. 发明申请
    • Systems and Methods for ADC Based Timing and Gain Control
    • 基于ADC的时序和增益控制的系统和方法
    • US20130021187A1
    • 2013-01-24
    • US13186267
    • 2011-07-19
    • Haitao XiaGeorge MathewShaohua Yang
    • Haitao XiaGeorge MathewShaohua Yang
    • H03M1/12
    • H03M1/1028H03M1/12
    • Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output.
    • 本发明的各种实施例提供用于数据处理的电路,系统和方法。 例如,讨论了一种数据处理电路,其包括:模数转换器电路,目标响应电路和定时电路。 模数转换器电路可操作以接收数据输入并提供与采样相位同步的相应数字采样。 采样相位对应于相位反馈。 目标响应电路可操作以提供对应于已知输入的预期输出。 定时电路可操作以至少部分地基于从预期输出导出的值来产生相位反馈。
    • 3. 发明申请
    • Systems and Methods for Data Recovery Using Enhanced Sync Mark Location
    • 使用增强型同步标记位置进行数据恢复的系统和方法
    • US20110209026A1
    • 2011-08-25
    • US12887317
    • 2010-09-21
    • Haitao XiaShaohua YangGeorge Mathew
    • Haitao XiaShaohua YangGeorge Mathew
    • G06F17/30H03M13/05G06F11/10
    • G11B20/1403G11B5/59616G11B20/1217G11B2020/1287G11B2020/1294G11B2020/1476G11B2020/185H03M13/33
    • Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value.
    • 本发明的各种实施例提供用于识别存储介质上的可再现位置的系统和方法。 作为示例,讨论了包括数据存储电路,模式比较电路和阈值比较电路的电路。 数据存储电路可操作以存储对应于感兴趣区域的第一组数据样本。 模式比较电路可操作以将第一组数据样本的子集与对应于感兴趣区域的第二组数据样本的子集进行比较。 模式比较电路可操作以产生与第一组数据样本与第二组数据样本的子集之间的相似度对应的匹配值。 阈值比较电路可操作以至少部分地基于相对于阈值的匹配值的大小来指示锚定点。
    • 5. 发明授权
    • Systems and methods for data recovery using enhanced sync mark location
    • 使用增强的同步标记位置进行数据恢复的系统和方法
    • US08345369B2
    • 2013-01-01
    • US12887317
    • 2010-09-21
    • Haitao XiaShaohua YangGeorge Mathew
    • Haitao XiaShaohua YangGeorge Mathew
    • G11B5/09
    • G11B20/1403G11B5/59616G11B20/1217G11B2020/1287G11B2020/1294G11B2020/1476G11B2020/185H03M13/33
    • Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value.
    • 本发明的各种实施例提供用于识别存储介质上的可再现位置的系统和方法。 作为示例,讨论了包括数据存储电路,模式比较电路和阈值比较电路的电路。 数据存储电路可操作以存储对应于感兴趣区域的第一组数据样本。 模式比较电路可操作以将第一组数据样本的子集与对应于感兴趣区域的第二组数据样本的子集进行比较。 模式比较电路可操作以产生与第一组数据样本与第二组数据样本的子集之间的相似度对应的匹配值。 阈值比较电路可操作以至少部分地基于相对于阈值的匹配值的大小来指示锚定点。
    • 6. 发明申请
    • Systems and Methods for Sync Mark Detection
    • 用于同步标记检测的系统和方法
    • US20120236428A1
    • 2012-09-20
    • US13050048
    • 2011-03-17
    • Haitao XiaShaohua YangGeorge Mathew
    • Haitao XiaShaohua YangGeorge Mathew
    • G11B5/09G01R25/00G06F19/00
    • G11B5/59616
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括均衡器电路和数据检测电路的数据处理电路。 均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波,并提供相应的一系列滤波样本。 数据检测电路包括:核心数据检测器电路和系数确定电路。 核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理,并提供最可能的路径和下一个最可能的路径。 系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。
    • 8. 发明授权
    • Systems and methods for sync mark detection
    • 用于同步标记检测的系统和方法
    • US08749908B2
    • 2014-06-10
    • US13050048
    • 2011-03-17
    • Haitao XiaShaohua YangGeorge Mathew
    • Haitao XiaShaohua YangGeorge Mathew
    • G11B5/09
    • G11B5/59616
    • Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括均衡器电路和数据检测电路的数据处理电路。 均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波,并提供相应的一系列滤波样本。 数据检测电路包括:核心数据检测器电路和系数确定电路。 核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理,并提供最可能的路径和下一个最可能的路径。 系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。