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    • 51. 发明授权
    • Liquid crystal display
    • 液晶显示器
    • US08994903B2
    • 2015-03-31
    • US13483909
    • 2012-05-30
    • Seung-Suk YangHo-Jun LeeSang Ho KimSang Yeoul LimYoung-Min JungHo Kyung KimSung Hoon Kim
    • Seung-Suk YangHo-Jun LeeSang Ho KimSang Yeoul LimYoung-Min JungHo Kyung KimSung Hoon Kim
    • G02F1/1337G02F1/1333G02F1/1335
    • G02F1/133371G02F1/133514G02F1/133707
    • A liquid crystal display includes a display panel having a plurality of pixels. The display panel includes a first substrate and a second substrate opposing each other. A liquid crystal layer is positioned between the first substrate and the second substrate. A pixel electrode is positioned on the first substrate and positioned in one pixel of the plurality of pixels. An opposing electrode faces the pixel electrode with the liquid crystal layer interposed therebetween. At least one of the pixel electrode and the opposing electrode includes a liquid crystal inclination direction determining member. A transmission region of the pixel includes a first region and a second region that have different cell gaps of the liquid crystal layer from each other and extension directions of the liquid crystal inclination direction determining member in the first region and the second region are different from each other.
    • 液晶显示器包括具有多个像素的显示面板。 显示面板包括彼此相对的第一基板和第二基板。 液晶层位于第一基板和第二基板之间。 像素电极位于第一基板上并且位于多个像素的一个像素中。 相对电极面对像素电极,其间插入液晶层。 像素电极和对置电极中的至少一个包括液晶倾斜方向确定部件。 像素的透射区域包括第一区域和第二区域,第一区域和第二区域具有液晶层彼此不同的单元间隙,并且第一区域和第二区域中的液晶倾斜方向确定构件的延伸方向各自不同 其他。
    • 54. 发明授权
    • Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel
    • 用于显示面板的薄膜晶体管阵列基板和用于制造用于显示面板的薄膜晶体管阵列基板的方法
    • US08476633B2
    • 2013-07-02
    • US12560652
    • 2009-09-16
    • Hyeong-Suk YooHo-Jun LeeSung-ryul KimO-Sung SeoHong-Kee Chin
    • Hyeong-Suk YooHo-Jun LeeSung-ryul KimO-Sung SeoHong-Kee Chin
    • H01L29/786
    • H01L27/1288H01L27/1214H01L27/124H01L27/1248
    • A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer.
    • 公开了一种能够简化衬底结构和制造工艺的制造薄膜晶体管的方法。 制造包括三掩模工艺的薄膜晶体管阵列基板的方法。 3掩模工艺包括:在衬底上形成栅极图案,在衬底上形成栅极绝缘膜,在衬底上形成源极/漏极图案和半导体图案,在第一,第二和第三钝化膜上依次形成第一,第二和第三钝化膜 基质。 在上述多层钝化膜上形成第一光致抗蚀剂图案,该第一光致抗蚀剂图案包括形成在漏电极的一部分上和在像素区域上的第一部分,以及第二部分,其中第二部分比第一部分厚, 使用第一光致抗蚀剂图案的第三钝化膜,通过去除第一光致抗蚀剂图案的第一部分形成第二光致抗蚀剂图案,在基板上形成透明电极膜,去除第二光致抗蚀剂图案和设置在第二光致抗蚀剂上的透明电极膜 模式; 以及在所述第二钝化层上形成透明电极图案。
    • 57. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL
    • 薄膜晶体管阵列
    • US20120007082A1
    • 2012-01-12
    • US13072962
    • 2011-03-28
    • Yeo-Geon YOONHyoung-Wook LEEMi-Ae LEEHo-Jun Lee
    • Yeo-Geon YOONHyoung-Wook LEEMi-Ae LEEHo-Jun Lee
    • H01L29/04
    • H01L27/124H01L27/1214H01L27/1248
    • A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line.
    • 薄膜晶体管阵列面板包括绝缘基板,以行和列布置在绝缘基板上的多个像素电极,分别与多个像素电极连接的多个薄膜晶体管,以及多个栅极线和 多个数据线与多个薄膜晶体管连接。 将与单个薄膜晶体管连接的一个数据线和一个像素电极分别称为连接的数据线和连接的像素电极时,多个薄膜晶体管位于连接的数据线的同一侧 在两个相邻的行中,并且在每隔一个两个相邻行中连接的数据线的交替侧。 连接的像素电极的两条边界线与连接的数据线重叠。