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1. 发明授权

US08334538B2 Thin film transistor array panel and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08334538B2
公开(公告)日：2012-12-18
申请号：US12875228
申请日：2010-09-03
申请人： Ho-Jun Lee , Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee
发明人： Ho-Jun Lee , Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee
IPC分类号： H01L33/00 , H01L21/84
CPC分类号： H01L27/124 , H01L27/1244 , H01L27/1288
摘要： A thin film transistor array panel includes: an insulation substrate; a gate line disposed on the insulation substrate and including a compensation pattern protruding from the gate line; a first data line and a second data line both intersecting the gate line; a first thin film transistor connected to the gate line and the first data line; a second thin film transistor connected to the gate line and the second data line; and a first pixel electrode and a second pixel electrode connected to the first thin film transistor and the second thin film transistor, respectively. The first pixel electrode and the second pixel electrode share the compensation pattern.
摘要翻译：薄膜晶体管阵列面板包括：绝缘基板; 栅极线，设置在所述绝缘基板上并且包括从所述栅极线突出的补偿图案; 第一数据线和第二数据线都与所述栅极线相交; 连接到栅极线和第一数据线的第一薄膜晶体管; 连接到栅极线和第二数据线的第二薄膜晶体管; 以及分别连接到第一薄膜晶体管和第二薄膜晶体管的第一像素电极和第二像素电极。第一像素电极和第二像素电极共享补偿图案。

2. 发明申请

US20110089422A1 THIN FILM TRANSISTOR ARRAY PANEL 有权
标题翻译：薄膜晶体管阵列
公开(公告)号：US20110089422A1
公开(公告)日：2011-04-21
申请号：US12785969
申请日：2010-05-24
申请人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
发明人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
IPC分类号： H01L33/00 , H01L27/088 , H01L29/786
CPC分类号： H01L27/124 , H01L27/1214 , H01L29/41733
摘要： A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode.
摘要翻译：薄膜晶体管（TFT）阵列面板包括：彼此相邻的第一和第二像素电极; 在第一和第二像素电极之间延伸的数据线; 第一和第二栅极线垂直于数据线延伸; 第一TFT，包括连接到第一栅极线的第一栅极电极，连接到数据线的第一源电极和面对第一源极并连接到第一像素电极的第一漏电极; 以及第二TFT，包括连接到第二栅极线的第二栅电极，连接到数据线的第二源电极和面对第二源电极并连接到第二像素电极的第二漏电极。第一源电极相对于作为第二源极的第一漏电极相对于第二漏电极具有相同的相对位置。

3. 发明授权

US08525180B2 Thin film transistor array panel 有权
公开(公告)号：US08525180B2
公开(公告)日：2013-09-03
申请号：US12785969
申请日：2010-05-24
申请人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
发明人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
IPC分类号： H01L33/00 , H01L27/088 , H01L29/786
CPC分类号： H01L27/124 , H01L27/1214 , H01L29/41733
摘要： A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode.

4. 发明申请

US20120007082A1 THIN FILM TRANSISTOR ARRAY PANEL 有权
标题翻译：薄膜晶体管阵列
公开(公告)号：US20120007082A1
公开(公告)日：2012-01-12
申请号：US13072962
申请日：2011-03-28
申请人： Yeo-Geon YOON , Hyoung-Wook LEE , Mi-Ae LEE , Ho-Jun Lee
发明人： Yeo-Geon YOON , Hyoung-Wook LEE , Mi-Ae LEE , Ho-Jun Lee
IPC分类号： H01L29/04
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1248
摘要： A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line.
摘要翻译：薄膜晶体管阵列面板包括绝缘基板，以行和列布置在绝缘基板上的多个像素电极，分别与多个像素电极连接的多个薄膜晶体管，以及多个栅极线和多个数据线与多个薄膜晶体管连接。将与单个薄膜晶体管连接的一个数据线和一个像素电极分别称为连接的数据线和连接的像素电极时，多个薄膜晶体管位于连接的数据线的同一侧在两个相邻的行中，并且在每隔一个两个相邻行中连接的数据线的交替侧。连接的像素电极的两条边界线与连接的数据线重叠。

5. 发明授权

US08665405B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US08665405B2
公开(公告)日：2014-03-04
申请号：US13072962
申请日：2011-03-28
申请人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
发明人： Yeo-Geon Yoon , Hyoung-Wook Lee , Mi-Ae Lee , Ho-Jun Lee
IPC分类号： G02F1/1343 , G02F1/136
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1248
摘要： A thin film transistor array panel includes an insulating substrate, a plurality of pixel electrodes arranged on the insulating substrate in rows and columns, a plurality of thin film transistors connected with the plurality of pixel electrodes, respectively, and a plurality of gate lines and a plurality of data lines connected with the plurality of thin film transistors. When one data line and one pixel electrode which are connected with a single thin film transistor are referred to as a connected data line and a connected pixel electrode, respectively, the plurality of thin film transistors are positioned on a same side of the connected data line in two adjacent rows, and on alternating sides of the connected data line in every other two adjacent rows. Two boundary lines of the connected pixel electrode are overlapped with the connected data line.
摘要翻译：薄膜晶体管阵列面板包括绝缘基板，以行和列布置在绝缘基板上的多个像素电极，分别与多个像素电极连接的多个薄膜晶体管，以及多个栅极线和多个数据线与多个薄膜晶体管连接。将与单个薄膜晶体管连接的一个数据线和一个像素电极分别称为连接的数据线和连接的像素电极时，多个薄膜晶体管位于连接的数据线的同一侧在两个相邻的行中，并且在每隔一个两个相邻行中连接的数据线的交替侧。连接的像素电极的两条边界线与连接的数据线重叠。

6. 发明授权

US09884469B2 Laminated plastic substrate, and a production method for the same 有权
公开(公告)号：US09884469B2
公开(公告)日：2018-02-06
申请号：US13130015
申请日：2009-11-19
申请人： Seung-Lac Ma , Dong-Ryul Kim , Gi-Cheul Kim , Sang-Uk Ryu , Ho-Jun Lee , Eun-Sil Lee , Jang-Yeon Hwang
发明人： Seung-Lac Ma , Dong-Ryul Kim , Gi-Cheul Kim , Sang-Uk Ryu , Ho-Jun Lee , Jang-Yeon Hwang
IPC分类号： B32B27/08 , B32B27/18 , B32B27/32 , B32B27/36 , C08J7/12 , B32B7/12 , B32B27/28 , B32B27/30 , B32B27/38 , B32B27/42 , G02F1/1333
CPC分类号： B32B27/08 , B32B7/12 , B32B27/18 , B32B27/281 , B32B27/286 , B32B27/308 , B32B27/32 , B32B27/36 , B32B27/365 , B32B27/38 , B32B27/42 , B32B2250/40 , B32B2264/10 , B32B2270/00 , B32B2307/306 , B32B2307/7242 , B32B2307/734 , B32B2457/00 , B32B2457/202 , C08J7/123 , G02F2001/133302 , Y10T428/24802 , Y10T428/24975 , Y10T428/26 , Y10T428/31504 , Y10T428/31507 , Y10T428/31511 , Y10T428/31721 , Y10T428/31786
摘要： The present invention provides a multilayered plastic substrate that simultaneously satisfies improvement in high temperature thermal deformation according to low linear expansion coefficient and excellent dimensional stability and excellent gas barrier property, and is capable of being used instead of a glass substrate that has brittleness and heavy disadvantages without a problem caused by a difference in linear expansion coefficient between layers, and a method for manufacturing the same.

7. 发明授权

US09007344B2 Touch screen panel and method of manufacturing the same 有权
标题翻译：触摸屏面板及其制造方法
公开(公告)号：US09007344B2
公开(公告)日：2015-04-14
申请号：US12631511
申请日：2009-12-04
申请人： Sang-Youn Han , Woong-Kwon Kim , Dae-Cheol Kim , Ho-Jun Lee , Kyung-Ho Park
发明人： Sang-Youn Han , Woong-Kwon Kim , Dae-Cheol Kim , Ho-Jun Lee , Kyung-Ho Park
IPC分类号： G06F3/042 , G06F3/041
CPC分类号： G06F3/041 , G06F3/042 , G06F2203/04103
摘要： Provided are a touch screen panel and a method of manufacturing the same. The touch screen panel comprises: a substrate; a first reflection-preventing film formed on the substrate; a first gate wiring formed on the first reflection-preventing film; and a sensing wiring formed above the first gate wiring to be insulated from the first gate wiring and to cross the first gate wiring.
摘要翻译：提供一种触摸屏面板及其制造方法。触摸屏面板包括：基板; 形成在基板上的第一防反射膜; 形成在第一防反射膜上的第一栅极布线; 以及形成在所述第一栅极布线上方以与所述第一栅极布线绝缘并跨越所述第一栅极布线的感测布线。

8. 发明授权

US08158501B2 Compound semiconductor substrate grown on metal layer, method of manufacturing the same, and compound semiconductor device using the same 有权
标题翻译：在金属层上生长的化合物半导体衬底，其制造方法和使用其的化合物半导体器件
公开(公告)号：US08158501B2
公开(公告)日：2012-04-17
申请号：US12967897
申请日：2010-12-14
申请人： Yong-Jin Kim , Doo-Soo Kim , Ho-Jun Lee , Dong-Kun Lee
发明人： Yong-Jin Kim , Doo-Soo Kim , Ho-Jun Lee , Dong-Kun Lee
IPC分类号： H01L21/02
CPC分类号： H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/02573 , H01L21/02639 , H01L21/02642 , H01L21/02647 , H01L33/20 , H01L33/38
摘要： The present invention relates to a compound semiconductor substrate and a method for manufacturing the same. The present invention provides the manufacturing method which coats spherical balls on a substrate, forms a metal layer between the spherical balls, removes the spherical balls to form openings, and grows a compound semiconductor layer from the openings. According to the present invention, the manufacturing method can be simplified and grow a high quality compound semiconductor layer rapidly, simply and inexpensively, as compared with a conventional ELO (Epitaxial Lateral Overgrowth) method or a method for forming a compound semiconductor layer on a metal layer. And, the metal layer serves as one electrode of a light emitting device and a light reflecting film to provide a light emitting device having reduced power consumption and high light emitting efficiency.
摘要翻译：化合物半导体基板及其制造方法技术领域本发明涉及化合物半导体基板及其制造方法。本发明提供一种制造方法，其在基板上涂布球形球，在球形球之间形成金属层，去除球形球以形成开口，并从开口生长化合物半导体层。根据本发明，与传统的ELO（外延横向生长）方法或在金属上形成化合物半导体层的方法相比，可以简化和简单且廉价地生产高质量的化合物半导体层层。并且，金属层用作发光器件和光反射膜的一个电极，以提供具有降低的功率消耗和高发光效率的发光器件。

9. 发明授权

US08153463B2 Method of manufacturing thin film transistor substrate 有权
标题翻译：制造薄膜晶体管基板的方法
公开(公告)号：US08153463B2
公开(公告)日：2012-04-10
申请号：US12729172
申请日：2010-03-22
申请人： Hong-Kee Chin , Yunjong Yeo , Sanggab Kim , Junho Song , Kyehun Lee , Ho-Jun Lee
发明人： Hong-Kee Chin , Yunjong Yeo , Sanggab Kim , Junho Song , Kyehun Lee , Ho-Jun Lee
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214
摘要： A method of manufacturing a thin film transistor substrate includes a first process in which a gate line pattern including a gate line and a gate electrode is formed with a first conductive material on a substrate using a first mask, a second process in which a first insulating layer is formed on the substrate and a data line pattern including a data line, a source electrode, and a drain electrode is formed with a second conductive material using a second mask, and a third process in which a second insulating layer is formed on the substrate and a pixel electrode connected to the drain electrode is formed on the second insulating layer with a third conductive material.
摘要翻译：制造薄膜晶体管基板的方法包括第一工艺，其中包括栅极线和栅电极的栅极线图案使用第一掩模在基板上形成第一导电材料;第二工艺，其中第一绝缘在衬底上形成层，并且使用第二掩模，用第二导电材料形成包括数据线，源电极和漏电极的数据线图案，以及在第二掩模上形成第二绝缘层的第三工艺连接到漏极的衬底和像素电极用第三导电材料形成在第二绝缘层上。

10. 发明申请

US20110287221A1 MULTILAYER FILM AND A PRODUCTION METHOD FOR SAME 审中-公开
标题翻译：多层薄膜及其生产方法
公开(公告)号：US20110287221A1
公开(公告)日：2011-11-24
申请号：US13130008
申请日：2009-11-19
申请人： Seung-Lac Ma , Dong-Ryul Kim , Gi-Cheul Kim , Sang-Uk Ryu , Ho-Jun Lee , Eun-Sil Lee , Jang-Yeon Hwang
发明人： Seung-Lac Ma , Dong-Ryul Kim , Gi-Cheul Kim , Sang-Uk Ryu , Ho-Jun Lee , Eun-Sil Lee , Jang-Yeon Hwang
IPC分类号： B32B27/08 , B32B27/36 , B32B27/38 , C08L63/06 , B05D3/06 , B32B38/00 , C08L63/00 , B32B27/32 , B32B3/00
CPC分类号： B32B27/08 , B32B7/12 , B32B27/18 , B32B27/281 , B32B27/286 , B32B27/308 , B32B27/32 , B32B27/36 , B32B27/365 , B32B27/38 , B32B27/42 , B32B2250/02 , B32B2250/40 , B32B2262/101 , B32B2264/10 , B32B2270/00 , B32B2307/306 , B32B2307/7242 , B32B2307/734 , B32B2457/00 , C08J7/123 , C08K5/0025 , Y10T428/24355 , Y10T428/264 , Y10T428/31507 , Y10T428/31515 , Y10T428/31721 , Y10T428/31786 , Y10T428/31938
摘要： Disclosed is a multi-layer film including a polymer substrate and buffer layers formed on the top surface and the bottom surface of the polymer substrate using a UV-cured and thermally cured product of a UV-curable and thermally curable buffer composition. A method for producing the multi-layer film is also disclosed.
摘要翻译：公开了一种多层膜，其包括聚合物基材和使用UV固化和热固化的UV固化和可热固化的缓冲组合物的聚合物基材的顶表面和底表面上形成的缓冲层。还公开了一种多层膜的制造方法。

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