专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明申请

US20080187564A1 Pest-Control Member 审中-公开
标题翻译：害虫控制成员
公开(公告)号：US20080187564A1
公开(公告)日：2008-08-07
申请号：US11885910
申请日：2006-03-07
申请人： Hidekazu Momiyama , Toru Sako , Hitoshi Kobayashi
发明人： Hidekazu Momiyama , Toru Sako , Hitoshi Kobayashi
IPC分类号： A01M3/04 , A01N25/00
CPC分类号： A01M29/34
摘要： A pest-control member used to prevent equipment from pest damage by being attached to a target that becomes a migration path for pests entering the equipment, the pest-control member being configured so that it is entirely made of resin, its diameter is located perpendicular to the target when attached to the target, and it is formed in a shape to become an obstacle to the pests migrating along the target; the pest-control member including a target-receiving space for receiving the target and an opening for allowing the target to be placed in the target-receiving space; wherein when the target is placed via the opening into the target-receiving space, the pest-control member elastically changes its shape to close the opening and keeps its closed shape.
摘要翻译：一种害虫控制构件，用于通过附着到成为用于害虫进入设备的迁移路径的目标来防止设备受到害虫损害，害虫控制构件构造成使其完全由树脂制成，其直径位于垂直到目标附近，并且形成为成为沿着目标迁移的害虫的障碍物的形状; 害虫控制构件包括用于接收目标的目标接收空间和用于允许目标放置在目标接收空间中的开口; 其特征在于，当通过所述开口将所述目标物放置在所述目标容纳空间内时，所述害虫控制部件弹性地变形以闭合所述开口并保持其封闭形状。

52. 发明申请

US20080054716A1 BRAKE CONTROL APPARATUS 审中-公开
标题翻译：制动控制装置
公开(公告)号：US20080054716A1
公开(公告)日：2008-03-06
申请号：US11846709
申请日：2007-08-29
申请人： Akihiro SATO , Toshiyuki Innami , Hitoshi Kobayashi , Katsuhiko Wakabayashi , Katsuya Iwasaki
发明人： Akihiro SATO , Toshiyuki Innami , Hitoshi Kobayashi , Katsuhiko Wakabayashi , Katsuya Iwasaki
IPC分类号： B60T7/12 , F16D65/14 , G06F7/70
CPC分类号： B60T7/042 , B60T1/10 , B60T7/22 , B60T8/368 , B60T8/4081
摘要： A brake control apparatus includes an actuator configured to generate a braking force of road wheel; a first control unit configured to calculate a target braking controlled variable in accordance with an amount of brake manipulation of a driver; and a second control unit including a backup calculation section configured to calculate a backup target braking controlled variable, by receiving the amount of brake manipulation separately from the first control unit. The second control unit selects one of the target braking controlled variable and the backup target braking controlled variable in accordance with operating conditions of the first control unit and the second control unit. The second control unit outputs a drive signal to the actuator so as to bring the braking force of road wheel closer to the selected one of the target braking controlled variable and the backup target braking controlled variable.
摘要翻译：一种制动控制装置，包括：致动器，被构造成产生车轮的制动力; 第一控制单元，被配置为根据驾驶员的制动操作量来计算目标制动控制变量; 以及第二控制单元，其包括备用计算部，其被配置为通过分别接收与所述第一控制单元相关的制动操作量来计算备用目标制动控制变量。第二控制单元根据第一控制单元和第二控制单元的运行条件选择目标制动控制变量和备用目标制动控制变量中的一个。第二控制单元向致动器输出驱动信号，使得车轮的制动力更接近目标制动控制变量和备用目标制动控制变量中的所选择的一个。

53. 发明申请

US20080012141A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080012141A1
公开(公告)日：2008-01-17
申请号：US11901477
申请日：2007-09-17
申请人： Kimihiro Maemura , Hitoshi Kobayashi , Tadatoshi Nakajima , Satoru Kodaira
发明人： Kimihiro Maemura , Hitoshi Kobayashi , Tadatoshi Nakajima , Satoru Kodaira
IPC分类号： H01L23/52
CPC分类号： H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor layer having a shading target region; a semiconductor element provided on the semiconductor layer in the shading target region; a first interlayer dielectric provided on the semiconductor element; a plurality of first shading layers provided on the first interlayer dielectric; a second interlayer dielectric provided on at least the first shading layers; and a second shading layer provided on the second interlayer dielectric and having a predetermined pattern. The second shading layer has such a pattern that the second shading layer is positioned at least between the adjacent first shading layers.
摘要翻译：半导体器件包括：具有阴影目标区域的半导体层; 设置在阴影对象区域的半导体层上的半导体元件; 设置在所述半导体元件上的第一层间电介质; 设置在所述第一层间电介质上的多个第一遮光层; 至少设置在第一遮光层上的第二层间电介质; 以及设置在第二层间电介质上并具有预定图案的第二遮光层。第二遮光层具有使第二遮光层至少位于相邻的第一遮光层之间的图案。

54. 发明申请

US20070236286A1 Pulse modulation type electric power amplifier 失效
标题翻译：脉冲调制型电力放大器
公开(公告)号：US20070236286A1
公开(公告)日：2007-10-11
申请号：US11712230
申请日：2007-02-28
申请人： Hitoshi Kobayashi , Kenji Okamoto
发明人： Hitoshi Kobayashi , Kenji Okamoto
IPC分类号： H03F3/38
CPC分类号： H03F3/2173 , H03F1/52 , H03F3/217
摘要： A pulse modulation type electric power amplifier includes a pulse modulator that receives as input a clock and an input signal, and converts the input signal to a pulse train, an output control circuit that receives as input the pulse train output by the pulse modulator, and controls output of the pulse train, an output circuit that performs switching according to the pulse train output by the output control circuit, a comparator that converts an output terminal voltage of the output circuit to a high or a low digital value, and a short-circuit determination circuit that determines whether an output short circuit has occurred based on a state of an output signal of the comparator, and outputs an output prohibition signal to the output control circuit when an output short circuit is detected. The output control circuit controls output of the pulse train when the output prohibition signal is input, so that the output circuit stops the switching operation. An output short-circuit protection circuit can thereby be configured simply with little circuitry, and is thus small, low power, and integrated easily.
摘要翻译：脉冲调制型电力放大器包括脉冲调制器，其接收时钟和输入信号作为输入，并将输入信号转换为脉冲串;输出控制电路，接收由脉冲调制器输出的脉冲序列作为输入;以及控制脉冲串的输出，根据输出控制电路输出的脉冲序列进行切换的输出电路，将输出电路的输出端子电压转换为高或低数字值的比较器，电路确定电路，其基于比较器的输出信号的状态确定是否发生了输出短路，并且当检测到输出短路时，将输出禁止信号输出到输出控制电路。当输出禁止信号被输入时，输出控制电路控制脉冲序列的输出，使得输出电路停止切换操作。因此，输出短路保护电路可以简单地配置很少的电路，因此能够小型化，低功率化，并且容易集成。

55. 发明授权

US07227223B2 Power MOS transistor having trench gate 失效
标题翻译：功率MOS晶体管具有沟槽栅极
公开(公告)号：US07227223B2
公开(公告)日：2007-06-05
申请号：US10618624
申请日：2003-07-15
申请人： Noboru Matsuda , Hitoshi Kobayashi , Masaru Kawakatsu , Akihiko Osawa
发明人： Noboru Matsuda , Hitoshi Kobayashi , Masaru Kawakatsu , Akihiko Osawa
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/4232 , H01L29/4238 , H01L29/456 , H01L29/7802
摘要： A semiconductor device, and particularly an MOS transistor device, wherein in order to increase a channel region density and to achieve a low resistance of a transistor device there is provided a first gate electrode group having a plurality of gate electrodes formed on a semiconductor substrate to be away from each other at first equal spacings, a second gate electrode group having a plurality of gate electrodes formed on the semiconductor substrate to be away from each other at the first equal spacings, a source contact portion formed away from the first or the second gate electrode group at a second spacing, and source regions for electrically interconnecting the first gate electrode group and the source contact. The source regions are connected to each other at one end of the first gate electrode group, and separated at the other end of the first gate electrode group. In addition, the gate electrodes of the first group are connected each other at the other end. The second spacing is greater than the first spacing.
摘要翻译：一种半导体器件，特别是MOS晶体管器件，其中为了增加沟道区密度并实现晶体管器件的低电阻，提供了一种第一栅极电极组，其具有形成在半导体衬底上的多个栅极电极在第一等间隔处彼此远离的第二栅极电极组，具有形成在半导体衬底上的多个栅电极以彼此间隔开的第一等间距彼此远离的第二栅电极组;远离第一或第二第二间隔的栅极电极组和用于将第一栅极电极组和源极接触电互连的源极区域。源极区域在第一栅电极组的一端彼此连接，并在第一栅电极组的另一端分离。此外，第一组的栅电极在另一端彼此连接。第二个间距大于第一个间距。

56. 发明申请

US20070108254A1 Circuit board 有权
标题翻译：电路板
公开(公告)号：US20070108254A1
公开(公告)日：2007-05-17
申请号：US10580157
申请日：2004-11-19
申请人： Hitoshi Kobayashi , Mitsunori Nagashima
发明人： Hitoshi Kobayashi , Mitsunori Nagashima
IPC分类号： A47J36/02
CPC分类号： H05K3/4015 , H01L2924/0002 , H05K3/222 , H05K3/328 , H05K2201/10962 , H01L2924/00
摘要： A circuit board (A1) comprises an insulating base board (1), a conductive pad (4a) provided on the base board, and a metal member (3) bonded to the pad via a solder layer (6). The metal member (3) includes a welding portion (3a) to be welded to a terminal (5) for external connection. An air gap (7) exists between the welding portion (3a) and the base board (1). The welding portion (3a) and the solder layer (6) are spaced from each other via the air gap (7).
摘要翻译：电路板（A 1）包括绝缘基板（1），设置在基板上的导电焊盘（4a）和通过焊料层（6）接合到焊盘的金属构件（3）。金属构件（3）包括焊接到用于外部连接的端子（5）的焊接部分（3a）。在焊接部（3a）和基板（1）之间存在气隙（7）。焊接部分（3a）和焊料层（6）经由气隙（7）彼此间隔开。

57. 发明授权

US07084797B2 Delta sigma modulating apparatus 有权
标题翻译：三角Σ调制装置
公开(公告)号：US07084797B2
公开(公告)日：2006-08-01
申请号：US10973254
申请日：2004-10-27
申请人： Akio Yokoyama , Hitoshi Kobayashi , Fumihito Inukai
发明人： Akio Yokoyama , Hitoshi Kobayashi , Fumihito Inukai
IPC分类号： H03M3/00
CPC分类号： H03M3/418
摘要： A first second- or higher-order delta sigma modulator and a second second- or higher-order delta sigma modulator having a notch characteristic are cascaded together, and a delayed signal of the output of the first delta sigma modulator and a differential signal of the output of the second delta sigma modulator are added together. The amount of feedback from the output portion to the input portion of the first delta sigma modulator and the amount of feedback from the output portion to the input portion of the second delta sigma modulator are made the same.
摘要翻译：具有陷波特性的第一第二或更高阶ΔΣ调制器和第二二阶或更高阶ΔΣ调制器级联在一起，并且第一ΔΣ调制器的输出的延迟信号和将第二ΔΣ调制器的输出相加在一起。使得从第一Δ-Σ调制器的输出部分到输入部分的反馈量和从第二ΔΣ调制器的输出部分到输入部分的反馈量相同。

58. 发明申请

US20060055044A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060055044A1
公开(公告)日：2006-03-16
申请号：US11223679
申请日：2005-09-09
申请人： Kimihiro Maemura , Hitoshi Kobayashi , Tadatoshi Nakajima , Satoru Kodaira
发明人： Kimihiro Maemura , Hitoshi Kobayashi , Tadatoshi Nakajima , Satoru Kodaira
IPC分类号： H01L23/52
CPC分类号： H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor layer having a shading target region; a semiconductor element provided on the semiconductor layer in the shading target region; a first interlayer dielectric provided on the semiconductor element; a plurality of first shading layers provided on the first interlayer dielectric; a second interlayer dielectric provided on at least the first shading layers; and a second shading layer provided on the second interlayer dielectric and having a predetermined pattern. The second shading layer has such a pattern that the second shading layer is positioned at least between the adjacent first shading layers.
摘要翻译：半导体器件包括：具有阴影目标区域的半导体层; 设置在阴影对象区域的半导体层上的半导体元件; 设置在所述半导体元件上的第一层间电介质; 设置在所述第一层间电介质上的多个第一遮光层; 至少设置在第一遮光层上的第二层间电介质; 以及设置在第二层间电介质上并具有预定图案的第二遮光层。第二遮光层具有使第二遮光层至少位于相邻的第一遮光层之间的图案。

59. 发明申请

US20050216111A1 Planning operation management support system, and planning operation management support program 有权
标题翻译：规划运营管理支持系统，规划运营管理支持方案
公开(公告)号：US20050216111A1
公开(公告)日：2005-09-29
申请号：US11086226
申请日：2005-03-23
申请人： Nobuhiro Ooshima , Hitoshi Kobayashi , Katsutoshi Nishiguchi , Hirokatsu Matsudaira
发明人： Nobuhiro Ooshima , Hitoshi Kobayashi , Katsutoshi Nishiguchi , Hirokatsu Matsudaira
IPC分类号： G05B19/418 , G06F19/00 , G06Q10/00 , G06Q10/06 , G06Q50/00
CPC分类号： G06Q10/06
摘要： A project template information management database 1 of a planning operation management support system includes: database groups from 20 to 23 saving setting information of planning operations performed in the past, names of process flows in the respective layers (task name), lead times (lead time) required for the respective process flows (task), and dependency relations between the process flows (task), as templates by the respective customers; a result database 15 storing trading results with customers in the past; and a calendar database 16 storing calendar information setting actual working days when workers in charge of the respective process flows carry on a work, and holidays. A client terminal 4 includes: an input device 35 inputting new project names, customer names, and delivery dates; and a CPU41 calling a corresponding customer's template from the project template information management database 1 by inputting the customer name, the name of the new project, and the delivery date, creating a new project information, and displaying the Gantt chart on the screen.
摘要翻译：规划运行管理支援系统的项目模板信息管理数据库1包括：20〜23个数据库组，保存过去执行的规划操作的设定信息，各层的处理流程名称（任务名称），交货时间时间）以及流程（任务）之间的依赖关系，作为各个客户的模板; 结果数据库15存储过去客户的交易结果; 以及日历数据库16，其存储设定各工序流程的工人进行工作的假日的设定实际工作日的日历信息。客户终端4包括：输入设备35，输入新的项目名称，客户名称和交货日期; 以及通过输入客户名称，新项目名称和交货日期，从项目模板信息管理数据库1中调用相应客户模板的CPU 41，创建新的项目信息，以及在该屏幕上显示甘特图。

60. 发明授权

US06740931B2 Semiconductor device 失效
公开(公告)号：US06740931B2
公开(公告)日：2004-05-25
申请号：US10417110
申请日：2003-04-17
申请人： Shigeo Kouzuki , Hideki Okumura , Hitoshi Kobayashi , Satoshi Aida , Masaru Izumisawa , Akihiko Osawa
发明人： Shigeo Kouzuki , Hideki Okumura , Hitoshi Kobayashi , Satoshi Aida , Masaru Izumisawa , Akihiko Osawa
IPC分类号： H01L2994
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/0696
摘要： A semiconductor device which comprises a semiconductor substrate, semiconductor pillar regions each having first and second semiconductor pillar portions, the second semiconductor pillar portion being sandwiched by the first semiconductor pillar portions, a base layer formed in the second semiconductor pillar portion, a source diffusion layer formed in the base layer, a gate insulating film formed on a portion of the base layer, a gate electrode formed on the gate insulating film, and isolation regions which isolates the semiconductor pillar regions from each other and are formed in trenches between the semiconductor pillar regions, wherein each of the isolation regions comprises an oxide film formed on an inner surface of the trench and a nitride film formed on the oxide film, the nitride film being filled in the trench, and a film thickness ratio of the oxide film and the nitride film is in a range of 2:1 to 5:1.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式