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51. 发明授权

US5814881A Stacked integrated chip package and method of making same 失效
标题翻译：堆叠集成芯片封装及其制作方法
公开(公告)号：US5814881A
公开(公告)日：1998-09-29
申请号：US770872
申请日：1996-12-20
申请人： Maniam Alagaratnam , Qwai H. Low , Chok J. Chia
发明人： Maniam Alagaratnam , Qwai H. Low , Chok J. Chia
IPC分类号： H01L21/98 , H01L23/495 , H01L23/02
CPC分类号： H01L24/32 , H01L23/4951 , H01L23/49575 , H01L25/50 , H01L2224/32014 , H01L2224/32145 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/181
摘要： A single leadframe package having stacked integrated chips mounted therein provides multiple electrical functions. The leadframe package construction includes a leadframe die having a substantially smaller outer peripheral dimension than a first integrated circuit chip mounted face down thereon for supporting from below the first integrated chip without obstructing its bond pads. A second integrated circuit is supported from below in a backside to backside configuration by the first integrated circuit without obstructing the bond pads of the second integrated circuit. A plurality of substantially short conductive wires interconnect electrically the first and second integrated circuit chips with selective ones of a plurality of leadframe conductors. An encapsulating material molds the construction into the single leadframe package.
摘要翻译：具有安装在其中的堆叠集成芯片的单个引线框封装提供多个电功能。引线框封装结构包括引线框模具，该引线框模具具有比面向下安装的第一集成电路芯片更小的外周尺寸，用于从第一集成芯片的下方支撑而不阻碍其键合焊盘。第二集成电路在下面被第一集成电路的背面配置支持，而不会阻碍第二集成电路的接合焊盘。多个基本上短的导电线将第一和第二集成电路芯片与多个引线框架导体中的选择性导体互连。封装材料将结构模制成单引线框封装。

52. 发明授权

US5434750A Partially-molded, PCB chip carrier package for certain non-square die shapes 失效
标题翻译：部分模制，PCB芯片载体封装，用于某些非正方形模具形状
公开(公告)号：US5434750A
公开(公告)日：1995-07-18
申请号：US79499
申请日：1993-06-18
申请人： Michael D. Rostoker , Chok J. Chia , Seng-Sooi Lim
发明人： Michael D. Rostoker , Chok J. Chia , Seng-Sooi Lim
IPC分类号： G03F7/20 , H01L23/31 , H01L23/495 , H01L23/498 , H01L29/06 , H05K1/11
CPC分类号： G03F7/70433 , H01L23/3121 , H01L23/315 , H01L23/49503 , H01L23/49517 , H01L23/49541 , H01L23/49558 , H01L23/49861 , H01L24/06 , H01L24/49 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/49109 , H01L2224/49175 , H01L24/48 , H01L29/0657 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/10155 , H01L2924/14 , H01L2924/15151 , H01L2924/15787 , H01L2924/181 , H01L2924/18301
摘要： A dambar-less leadframe is sandwiched between two printed circuit boards (PCBs). The PCBs form a major portion of the package body, and isolate the leadframe leads from plastic molding compound. In one embodiment, an upper PCB (substrate) is formed as a ring, having an opening containing a heat sink element. A lower PCB is also formed as a ring, and has a smaller opening for receiving a die. The back face of the die is mounted to the heat sink. The exposed front face of the die is wire bonded to inner ends of conductive traces on the exposed face of the lower PCB. The outer ends of the traces are electrically connected to the leadframe leads by plated-through vias extending through the two PCBs. The plated-through vias additionally secure the sandwich structure together. Plastic molding compound is injection/transfer molded over the front face of the die and the bond wires, forming a partially-molded package. In another embodiment, the upper PCB is a solid planar element. The back face of the die is mounted to the inside surface of the upper PCB. The die, die-receiving area, and/or package body shape have a "certain non-square" shape (i.e., triangle, trapezoid, parallelogram, greatly-elongated rectangle, etc.).
摘要翻译：两个印刷电路板（PCB）之间夹有无阻挡引线框架。 PCB形成封装主体的主要部分，并将引线框引线与塑料模塑料隔离。在一个实施例中，上PCB（基板）形成为环，具有包含散热元件的开口。下部PCB也形成为环，并且具有用于接收管芯的较小开口。模具的背面安装在散热片上。模具的暴露的前表面被焊接到下PCB的暴露表面上的导电迹线的内端。迹线的外端通过延伸穿过两个PCB的镀通孔电连接到引线框引线。电镀通孔另外将夹层结构固定在一起。塑料模塑料在模具的前表面和接合线上注射/转移模塑，形成部分模塑包装。在另一实施例中，上PCB是固体平面元件。模具的背面安装到上PCB的内表面。模具，模具接收区域和/或包装体形状具有“一定的非正方形”形状（即，三角形，梯形，平行四边形，大大细长的矩形等）。

53. 发明授权

US5353193A High power dissipating packages with matched heatspreader heatsink assemblies 失效
标题翻译：具有匹配散热器散热器组件的大功率消散封装
公开(公告)号：US5353193A
公开(公告)日：1994-10-04
申请号：US023981
申请日：1993-02-26
申请人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
发明人： Chok J. Chia , Manian Alagaratnam , Qwai H. Low , Seng-Sooi Lim
IPC分类号： F02F7/00 , H01L23/367 , H01L23/40 , H05K7/20
CPC分类号： H01L23/40 , F02F7/00 , H01L23/3675 , H01L2924/0002 , Y10T29/4913
摘要： A removable heatsink assembly comprised of a heatsink unit and a heatspreader is provided. The heatsink unit has at least one fin and a coupling collar for radiating heat away from a packaged electronic device. The heatspreader includes a platform attached to an inner collar in thermal contact with the packaged electronic device. The platform has one or more tabs suitable for mating with one or more flanges located on the coupling collar of the heatsink unit. Coupling grooves within the flanges engage the platform of the heatspreader when the flanges are mated with the heatspreader tabs and the heatsink is turned. The heatsink can therefore be quickly and conveniently attached to or removed from the heatspreader. The present invention thus permits a wide variety of different heatsinks to be interchangeably used with a single heatspreader attached to an electronic device package.
摘要翻译：提供了由散热器单元和散热器组成的可拆卸的散热器组件。散热器单元具有至少一个翅片和用于从封装的电子设备辐射热量的联接套环。散热器包括附接到与封装的电子设备热接触的内部套环的平台。该平台具有一个或多个适合于与位于散热器单元的联接环上的一个或多个凸缘相配合的凸片。当凸缘与散热片接头配合并且散热片转动时，凸缘内的耦合凹槽接合散热器的平台。因此，散热器可以快速方便地附接到散热器或从散热器移除。因此，本发明允许各种不同的散热器与附接到电子设备封装的单个散热器可互换地使用。

54. 发明授权

US08525312B2 Area array quad flat no-lead (QFN) package 有权
标题翻译：区域阵列四边形无引线（QFN）封装
公开(公告)号：US08525312B2
公开(公告)日：2013-09-03
申请号：US13208822
申请日：2011-08-12
申请人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
发明人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L21/50 , H01L21/60
CPC分类号： H01L23/49537 , H01L21/4821 , H01L23/3121 , H01L23/49575 , H01L23/49861 , H01L24/73 , H01L24/97 , H01L2224/0401 , H01L2224/04042 , H01L2224/16245 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/01322 , H01L2924/01327 , H01L2924/07811 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85 , H01L2224/81 , H01L2224/83
摘要： A microelectronic assembly can include a microelectronic element and a lead frame having a first unit and a second unit overlying the first unit and assembled therewith. The first unit can have a first metal layer comprising a portion of the thickness of the lead frame and including terminals and first conductive elements extending away therefrom. The second unit can have a second metal layer comprising a portion of the thickness of the lead frame and including bond pads and second conductive elements extending away therefrom. The first and second units each can have an encapsulation supporting at least portions of the respective first and second conductive elements. At least some of the second conductive elements can overlie portions of corresponding ones of the first conductive elements and can be joined thereto. The microelectronic element can have contacts electrically connected with the bond pads of the lead frame.
摘要翻译：微电子组件可以包括微电子元件和引线框架，引线框架具有覆盖第一单元并与其组装的第一单元和第二单元。第一单元可以具有包括引线框架的厚度的一部分的第一金属层，并且包括端子和从其延伸的第一导电元件。第二单元可以具有包括引线框架的厚度的一部分的第二金属层，并且包括接合焊盘和从其延伸的第二导电元件。第一和第二单元各自可以具有支撑相应的第一和第二导电元件的至少一部分的封装。至少一些第二导电元件可以覆盖相应的第一导电元件的部分并且可以与其连接。微电子元件可以具有与引线框架的接合焊盘电连接的触点。

55. 发明申请

US20130037925A1 AREA ARRAY QFN 有权
标题翻译：区域阵列QFN
公开(公告)号：US20130037925A1
公开(公告)日：2013-02-14
申请号：US13208822
申请日：2011-08-12
申请人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
发明人： Qwai H. Low , Chok J. Chia , Kishor Desai , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L21/50 , H01L21/60
CPC分类号： H01L23/49537 , H01L21/4821 , H01L23/3121 , H01L23/49575 , H01L23/49861 , H01L24/73 , H01L24/97 , H01L2224/0401 , H01L2224/04042 , H01L2224/16245 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/01322 , H01L2924/01327 , H01L2924/07811 , H01L2924/12042 , H01L2924/1434 , H01L2924/1436 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85 , H01L2224/81 , H01L2224/83
摘要： A microelectronic assembly can include a microelectronic element and a lead frame having a first unit and a second unit overlying the first unit and assembled therewith. The first unit can have a first metal layer comprising a portion of the thickness of the lead frame and including terminals and first conductive elements extending away therefrom. The second unit can have a second metal layer comprising a portion of the thickness of the lead frame and including bond pads and second conductive elements extending away therefrom. The first and second units each can have an encapsulation supporting at least portions of the respective first and second conductive elements. At least some of the second conductive elements can overlie portions of corresponding ones of the first conductive elements and can be joined thereto. The microelectronic element can have contacts electrically connected with the bond pads of the lead frame.
摘要翻译：微电子组件可以包括微电子元件和引线框架，引线框架具有覆盖第一单元并与其组装的第一单元和第二单元。第一单元可以具有包括引线框架的厚度的一部分的第一金属层，并且包括端子和从其延伸的第一导电元件。第二单元可以具有包括引线框架的厚度的一部分的第二金属层，并且包括接合焊盘和从其延伸的第二导电元件。第一和第二单元各自可以具有支撑相应的第一和第二导电元件的至少一部分的封装。至少一些第二导电元件可以覆盖相应的第一导电元件的部分并且可以与其连接。微电子元件可以具有与引线框架的接合焊盘电连接的触点。

56. 发明授权

US06603200B1 Integrated circuit package 失效
标题翻译：集成电路封装
公开(公告)号：US06603200B1
公开(公告)日：2003-08-05
申请号：US08928826
申请日：1997-09-12
申请人： Qwai H. Low , Chok J. Chia , Seng-Sooi (Allen) Lim
发明人： Qwai H. Low , Chok J. Chia , Seng-Sooi (Allen) Lim
IPC分类号： H01L23053
CPC分类号： H01L24/06 , H01L23/49838 , H01L24/48 , H01L24/49 , H01L2224/0401 , H01L2224/05554 , H01L2224/48227 , H01L2224/48233 , H01L2224/4911 , H01L2224/4912 , H01L2224/49171 , H01L2224/49431 , H01L2924/00014 , H01L2924/014 , H01L2924/14 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes a connector board and plural levels of individual conductors and conductive vias disposed through the connector board to form electrical connections between external connection pads on an undersurface of the connector board and finger connections on the upper surface of the connector board. An integrated circuit die is mounted in a central region of the connector board within confines of the individual conductors that are arranged about the die, and wire bond connections are formed between selected ones of the finger connections, the individual conductors, and the connection pads on the integrated circuit die to provide distributed connections for ground and power at one or more operating voltage levels on the individual conductors.
摘要翻译：集成电路封装包括连接器板和多层单独的导体以及通过连接器板设置的导电通路，以在连接器板的下表面上的外部连接焊盘和连接器板的上表面上的指状连接之间形成电连接。集成电路管芯安装在连接器板的中心区域，在围绕管芯布置的各个导体的限制范围内，并且引线接合连接形成在指状连接，各个导体和连接焊盘上的选定的导体之间集成电路管芯，以在单个导体上的一个或多个工作电压电平上提供用于接地和电力的分布式连接。

57. 发明授权

US06525421B1 Molded integrated circuit package 失效
标题翻译：模压集成电路封装
公开(公告)号：US06525421B1
公开(公告)日：2003-02-25
申请号：US09846080
申请日：2001-05-01
申请人： Chok J. Chia , Seng S. Lim , Wee K. Liew
发明人： Chok J. Chia , Seng S. Lim , Wee K. Liew
IPC分类号： H01L2304
CPC分类号： H01L21/565 , H01L23/3121 , H01L24/48 , H01L24/73 , H01L2224/05599 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , Y10S425/044 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A mold for use in encapsulating an integrated circuit, wherein an encapsulant is injected into the mold during packaging of the integrated circuit. The improvement to the mold is a shaped member having an abutting surface for contacting a surface of the integrated circuit and thereby substantially preventing encapsulant from adhering to the surface of the integrated circuit, whereby the surface of the integrated circuit is left exposed. Because the surface of the integrated circuit is left exposed, the encapsulant used to encapsulate the integrated circuit does not form a thermal barrier between the integrated circuit and the exterior of the package. Thus, the packaged integrated circuit is able to more efficiently conduct heat away from the integrated circuit.
摘要翻译：一种用于封装集成电路的模具，其中在封装集成电路期间将密封剂注入模具中。对模具的改进是具有用于接触集成电路的表面的抵接表面，从而基本上防止密封剂粘附到集成电路的表面的成形构件，由此集成电路的表面被暴露。由于集成电路的表面被暴露，用于封装集成电路的密封剂在集成电路和封装的外部之间不形成热障碍。因此，封装的集成电路能够更有效地将热量从集成电路传导出去。

58. 发明授权

US06306751B1 Apparatus and method for improving ball joints in semiconductor packages 有权
标题翻译：用于改善半导体封装中的球接头的装置和方法
公开(公告)号：US06306751B1
公开(公告)日：2001-10-23
申请号：US09406308
申请日：1999-09-27
申请人： Sunil A. Patel , Chok J. Chia , Kishor V. Desai
发明人： Sunil A. Patel , Chok J. Chia , Kishor V. Desai
IPC分类号： H01L2144
CPC分类号： H01L23/49816 , H01L21/288 , H01L21/4853 , H01L2924/0002 , H01L2924/00
摘要： Provided is an apparatus and method for modifying the manufacture of chip carrier bond pads to increase the quality and reliability of semiconductor packages and ball joints in particular. This is accomplished by minimizing the corrosion of the barrier metal layer on the functional bond pads during gold deposition with the use of sacrificial pads electrically connected with the functional bond pads. According to one embodiment of the invention, a semiconductor package has copper conductive pads on a substrate that are exposed through a dielectric. Both functional and sacrificial (nonfunctional) copper conductive pads are provided. A barrier metal layer composed of nickel is electrolessly plated onto these conductive pads, and a bond metal layer of gold is deposited onto the nickel using electroless, generally immersion, gold plating. The surface area of the nickel on the sacrificial pads is less than that on the functional pads, and the nickel on the sacrificial pads corrodes first during electroless gold deposition. Without nickel corrosion on the functional bond pad, gold can more uniformly be deposited on the surface of the nickel layer. A eutectic solderable material placed on the gold can form a uniform bond with the nickel because the nickel on the functional bond pad is largely corrosion free.
摘要翻译：提供了一种用于修改芯片载体接合焊盘的制造以提高半导体封装和球接头的质量和可靠性的装置和方法。这是通过使用与功能接合焊盘电连接的牺牲垫来最小化金沉积期间功能性接合焊盘上的阻挡金属层的腐蚀。根据本发明的一个实施例，半导体封装在衬底上具有通过电介质暴露的铜导电焊盘。提供功能和牺牲（非功能）铜导电焊盘。由镍构成的阻挡金属层被无电镀在这些导电焊盘上，并且使用化学镀，通常浸入镀金将金的粘结金属层沉积到镍上。牺牲焊盘上的镍的表面积小于功能焊盘上的镍的表面积，并且在无电镀金沉积期间，牺牲焊盘上的镍首先被腐蚀。在功能性接合焊盘上没有镍腐蚀，金可以更均匀地沉积在镍层的表面上。放置在金上的共晶可焊材料可以与镍形成均匀的结合，因为功能性接合焊盘上的镍很大程度上是无腐蚀的。

59. 发明授权

US06297550B1 Bondable anodized aluminum heatspreader for semiconductor packages 失效
标题翻译：用于半导体封装的可焊接阳极氧化铝散热器
公开(公告)号：US06297550B1
公开(公告)日：2001-10-02
申请号：US09053357
申请日：1998-04-01
申请人： Chok J. Chia , Patrick Variot , Maniam Alagaratnam
发明人： Chok J. Chia , Patrick Variot , Maniam Alagaratnam
IPC分类号： H01L2334
CPC分类号： H01L23/10 , H01L23/053 , H01L23/36 , H01L23/50 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/0401 , H01L2224/05599 , H01L2224/16 , H01L2224/32225 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48233 , H01L2224/48247 , H01L2224/48599 , H01L2224/48699 , H01L2224/49109 , H01L2224/73253 , H01L2224/73265 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/16152 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor package (100) includes a bondable aluminum heatspreader (130) made from anodized aluminum, thereby forming an anodization layer (132) on the surface of the heatspreader. Portions of the anodization layer are removed, e.g., by grinding, in order to provide an attachment area (124) to which a wire (122) or beam may be bonded in order to electrically connect the heatspreader to a desired voltage potential, such as a ground potential or a positive or negative potential. The heatspreader is thermally bonded to a semiconductor die (102) housed within the package. The anodized aluminum heatspreader thus not only removes and dissipates heat from the semiconductor die, but also functions as a voltage or ground plane within the semiconductor package.
摘要翻译：半导体封装（100）包括由阳极化铝制成的可粘合铝散热器（130），从而在散热器的表面上形成阳极氧化层（132）。阳极氧化层的一部分例如通过研磨被去除，以便提供可以将导线（122）或梁结合到其上的附接区域（124），以将散热器电连接到期望的电压电位，例如地电位或正或负电位。散热器热粘合到容纳在封装内的半导体管芯（102）。因此，阳极氧化铝散热器不仅能够从半导体管芯移除和散发热量，而且可用作半导体封装内的电压或接地平面。

60. 发明授权

US06225695B1 Grooved semiconductor die for flip-chip heat sink attachment 失效
标题翻译：沟槽半导体芯片用于倒装芯片散热片附件
公开(公告)号：US06225695B1
公开(公告)日：2001-05-01
申请号：US08869796
申请日：1997-06-05
申请人： Chok J. Chia , Seng-Sooi Lim , Maniam Alagaratnam
发明人： Chok J. Chia , Seng-Sooi Lim , Maniam Alagaratnam
IPC分类号： H01L2304
CPC分类号： H01L29/0657 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83138 , H01L2924/10155 , H01L2924/10158 , H01L2924/10253 , H01L2924/15311 , H01L2924/19041 , H01L2924/00014 , H01L2924/00
摘要： One aspect of the invention relates to a flip-chip semiconductor package. In one version of the invention, the flip-chip semiconductor package includes a package substrate having an upper surface, a lower surface and a plurality of conductive traces, the upper surface having an upper plurality of electrical contacts coupled to the conductive traces, the lower surface having a lower plurality of electrical contacts coupled to the conductive traces, the lower plurality of electrical contacts being attachable to electrical contacts on a printed circuit board; a semiconductor die having an active surface and a non-active surface, the active surface having a plurality of circuit elements and a plurality of bond pads formed thereon, the bond pads being attached to the upper plurality of electrical contacts by solder bumps, the non-active surface having a plurality of grooves formed thereon; and a heat sink attached to the non-active surface of the semiconductor die.
摘要翻译：本发明的一个方面涉及倒装芯片半导体封装。在本发明的一个版本中，倒装芯片半导体封装包括具有上表面，下表面和多个导电迹线的封装衬底，上表面具有耦合到导电迹线的多个多个电触点，下表面表面具有耦合到导电迹线的较低多个电触点，所述下多个电触点可附接到印刷电路板上的电触点; 具有活性表面和非活性表面的半导体管芯，所述有源表面具有多个电路元件和形成在其上的多个接合焊盘，所述接合焊盘通过焊料凸块附接到所述多个多个电触点，活性表面，其上形成有多个槽; 以及附接到半导体管芯的非有源表面的散热器。

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