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    • 56. 发明申请
    • DUAL CHAMBER MEGASONIC CLEANER
    • 双室MEGASONIC CLEANER
    • US20090320875A1
    • 2009-12-31
    • US12490114
    • 2009-06-23
    • RICARDO MARTINEZAllen L. D'AmbraAdrian BlankThuy BritcherHui Chen
    • RICARDO MARTINEZAllen L. D'AmbraAdrian BlankThuy BritcherHui Chen
    • B08B3/12
    • B08B3/12H01L21/67051
    • Embodiments described herein relate to semiconductor device manufacturing, and more particularly to a vertically oriented dual megasonic module for simultaneously cleaning multiple substrates. In one embodiment, an apparatus for cleaning multiple substrates is provided. The apparatus comprises an outer tank for collecting overflow processing fluid comprising at least one sidewall and a bottom. A first inner module adapted to contain a processing fluid is positioned partially within the outer tank. The first inner module comprises one or more roller assemblies to hold a substrate in a substantially vertical orientation. A second inner module adapted to contain a processing fluid is positioned partially within the outer tank. The second inner module comprises one or more roller assemblies adapted to hold a substrate in a substantially vertical orientation. Each inner module contains a transducer adapted to direct vibrational energy through the processing fluid toward the substrates.
    • 本文所述的实施例涉及半导体器件制造,更具体地,涉及用于同时清洁多个基板的垂直取向的双兆赫模块。 在一个实施例中,提供了一种用于清洁多个基板的装置。 该装置包括用于收集包括至少一个侧壁和底部的溢流处理流体的外槽。 适于容纳处理流体的第一内部模块部分地位于外部容器内。 第一内部模块包括一个或多个辊组件以将基板保持在基本垂直的方向。 适于容纳处理流体的第二内部模块部分地位于外部罐中。 第二内部模块包括适于将基板保持在基本垂直取向的一个或多个辊组件。 每个内部模块包含适于将振动能量通过处理流体引向基板的换能器。
    • 57. 发明授权
    • Seal installation tool
    • 密封安装工具
    • US07636996B2
    • 2009-12-29
    • US12047597
    • 2008-03-13
    • Hui Chen
    • Hui Chen
    • B23P19/04
    • B23P19/084B25B27/0028Y10T29/49963Y10T29/53878Y10T29/53909Y10T29/53943
    • A tool is provided to facilitate the assembly of a seal ring. The tool comprises an elongated body and a flange projecting radially from the elongated body. A first portion of the tool is configured to receive the placement of a seal ring and a retainer cap thereon. The retainer cap may carry attachment elements, such as screws, used to secure the retainer cap on the housing. To mount the seal ring, the tool is inserted through a shaft hole of the housing to clamp the seal ring and the retainer cap between the housing and a flange of the tool. The attachment elements then are tightened to fix the retainer cap on the housing, which secures the seal ring sandwiched between the retainer cap and the housing. After the assembly of the seal ring is completed, the tool may then be slidably removed.
    • 提供了一种便于组装密封环的工具。 该工具包括细长主体和从细长主体径向突出的凸缘。 该工具的第一部分构造成接收其上的密封环和保持器盖的放置。 保持器帽可以携带用于将保持器盖固定在壳体上的附接元件,例如螺钉。 为了安装密封环,工具通过壳体的轴孔插入,以将密封环和保持器盖夹在壳体和工具的凸缘之间。 然后紧固附接元件以将保持器盖固定在壳体上,其将密封环固定在夹持器盖和壳体之间。 在完成密封环的组装之后,可以可滑动地移除该工具。
    • 58. 发明授权
    • Clock frequency doubler method and apparatus for serial flash testing
    • 用于串行闪存测试的时钟倍频器方法和装置
    • US07502267B2
    • 2009-03-10
    • US11526124
    • 2006-09-22
    • Tien-Ler LinKwangho KimHui ChenEungjoon Park
    • Tien-Ler LinKwangho KimHui ChenEungjoon Park
    • G11C7/00G11C11/34G11C8/00
    • G11C29/14G11C7/22G11C7/222G11C29/12015
    • Method and apparatus for memory device testing at a higher clock rate than the clock rate provided by a memory tester. The method includes providing a memory tester capable of generating a first clock signal characterized by a first clock frequency, and applying the first clock signal to the memory device. The method also includes receiving a command for activating a high-clock-frequency test mode. The method generates a second clock signal in the memory device in response to the first clock signal. The second clock signal is characterized by a second clock frequency which is higher than the first clock frequency. The method then tests the memory device at the second clock frequency. In a specific embodiment, the method is applied to a serial flash memory device. The invention can also be applied to testing and operating other memory devices or systems that include synchronized circuits.
    • 用于以比由存储器测试器提供的时钟速率更高的时钟速率测试存储器件的方法和装置。 该方法包括提供能够产生以第一时钟频率为特征的第一时钟信号并将第一时钟信号施加到存储器件的存储器测试器。 该方法还包括接收用于激活高时钟频率测试模式的命令。 该方法响应于第一时钟信号在存储器件中产生第二时钟信号。 第二时钟信号的特征在于高于第一时钟频率的第二时钟频率。 然后该方法以第二个时钟频率测试存储器件。 在具体实施例中,该方法被应用于串行闪存设备。 本发明还可以应用于测试和操作包括同步电路的其它存储器件或系统。