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    • 51. 发明授权
    • Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential
    • 半导体集成电路器件通过使用标准单元自动布线布线形成,并设计方法固定其良好的电位
    • US07882476B2
    • 2011-02-01
    • US11886928
    • 2005-09-15
    • Yasuhito ItakaKoichi KinoshitaTakeshi Sugahara
    • Yasuhito ItakaKoichi KinoshitaTakeshi Sugahara
    • G06F17/50H01L27/118H01L27/092
    • G06F17/5068H01L27/0207H01L27/11807
    • Standard cells without a well potential fixing active region (4T-11 to 4T-14, 4T-21 to 4T-24, 4T-31 to 4T-34, 4T-41 to 4T-44) are read from a library and a circuit is temporarily designed by automatic layout wiring. Then, a change in the substrate potential is estimated from at least one of the number of transistors to be switched at the same timing in the temporarily designed circuit, the sizes of transistors, the transition probability, and the appearance probability. It is determined whether the estimated change in the substrate potential is within a reference value. If the estimated change in the substrate potential has exceeded the reference value, standard cells with a well potential fixing active region (2T-11, 2T-21, 2T-31 and 2T-41) are read from the library and placed in a region where the estimated change in the substrate potential exceeds the reference value. Thereafter, automatic layout wiring is done again, thereby forming a circuit.
    • 从库和电路读取不具有阱电位固定有源区(4T-11至4T-14,4T-21至4T-24,4T-31至4T-34,4T-41至4T-44)的标准单元 是通过自动布局布线临时设计的。 然后,从暂时设计的电路中的相同定时的晶体管的数量中的至少一个,晶体管的尺寸,转移概率和出现概率来估计衬底电位的变化。 确定基板电位的估计变化是否在参考值内。 如果估计的衬底电位变化超过参考值,则从库中读出具有阱电位固定有源区(2T-11,2T-21,2T-31和2T-41)的标准电池,放置在区域 其中估计的衬底电位变化超过参考值。 此后,再次进行自动布局布线,从而形成电路。
    • 52. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • 半导体集成电路设备
    • US20090127606A1
    • 2009-05-21
    • US12269698
    • 2008-11-12
    • Koichi KinoshitaNatsuki Kushiyama
    • Koichi KinoshitaNatsuki Kushiyama
    • H01L29/92
    • H03K19/0016H03K19/0019
    • A driving circuit and a bus to transmit an output signal from the driving circuit are provided. The driving circuit includes a first P-channel transistor, a second P-channel transistor, an N-channel transistor and a capacitor. The first P-channel transistor includes a drain, a source to connect with a higher potential and a gate to receive a first input signal. The second P-channel transistor includes a drain connected to the bus, a source connected to the drain of the first P-channel transistor and a gate to receive a second input signal. The N-channel transistor includes a drain connected to the drain of the second P-channel transistor, a source to connect with a lower potential and a gate to receive the second input signal. The capacitor includes one end connected to the drain of the first P-channel transistor and another end to connect with the lower potential.
    • 提供了用于从驱动电路传输输出信号的驱动电路和总线。 驱动电路包括第一P沟道晶体管,第二P沟道晶体管,N沟道晶体管和电容器。 第一P沟道晶体管包括漏极,与较高电位连接的源极和用于接收第一输入信号的栅极。 第二P沟道晶体管包括连接到总线的漏极,连接到第一P沟道晶体管的漏极的源极和用于接收第二输入信号的栅极。 N沟道晶体管包括连接到第二P沟道晶体管的漏极的漏极,与低电位连接的源极和用于接收第二输入信号的栅极。 电容器包括连接到第一P沟道晶体管的漏极的一端和与较低电位连接的另一端。
    • 53. 发明申请
    • Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential
    • 半导体集成电路器件通过使用标准单元自动布线布线形成,并设计方法固定其良好的电位
    • US20090083686A1
    • 2009-03-26
    • US11886928
    • 2005-09-15
    • Yasuhito ItakaKoichi KinoshitaTakeshi Sugahara
    • Yasuhito ItakaKoichi KinoshitaTakeshi Sugahara
    • G06F17/50
    • G06F17/5068H01L27/0207H01L27/11807
    • Standard cells without a well potential fixing active region (4T-11 to 4T-14, 4T-21 to 4T-24, 4T-31 to 4T-34, 4T-41 to 4T-44) are read from a library and a circuit is temporarily designed by automatic layout wiring. Then, a change in the substrate potential is estimated from at least one of the number of transistors to be switched at the same timing in the temporarily designed circuit, the sizes of transistors, the transition probability, and the appearance probability. It is determined whether the estimated change in the substrate potential is within a reference value. If the estimated change in the substrate potential has exceeded the reference value, standard cells with a well potential fixing active region (2T-11, 2T-21, 2T-31 and 2T-41) are read from the library and placed in a region where the estimated change in the substrate potential exceeds the reference value. Thereafter, automatic layout wiring is done again, thereby forming a circuit.
    • 从库和电路读取不具有阱电位固定有源区(4T-11至4T-14,4T-21至4T-24,4T-31至4T-34,4T-41至4T-44)的标准单元 是通过自动布局布线临时设计的。 然后,从暂时设计的电路中的相同定时的晶体管的数量中的至少一个,晶体管的尺寸,转移概率和出现概率来估计衬底电位的变化。 确定基板电位的估计变化是否在参考值内。 如果估计的衬底电位变化超过参考值,则从库中读出具有阱电位固定有源区(2T-11,2T-21,2T-31和2T-41)的标准电池,放置在区域 其中估计的衬底电位变化超过参考值。 此后,再次进行自动布局布线,从而形成电路。