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51. 发明授权

US08604513B2 Semiconductor device having SOI substrate 有权
标题翻译：具有SOI衬底的半导体器件
公开(公告)号：US08604513B2
公开(公告)日：2013-12-10
申请号：US12923469
申请日：2010-09-23
申请人： Youichi Ashida , Norihito Tokura , Shigeki Takahashi , Yoshiaki Nakayama , Satoshi Shiraki , Kouji Senda
发明人： Youichi Ashida , Norihito Tokura , Shigeki Takahashi , Yoshiaki Nakayama , Satoshi Shiraki , Kouji Senda
IPC分类号： H01L29/66
CPC分类号： H01L27/1203 , H01L21/76264 , H01L21/84 , H01L29/0634 , H01L29/0657 , H01L29/0692 , H01L29/1608 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66128 , H01L29/7394 , H01L29/7824 , H01L29/8611
摘要： A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.
摘要翻译：半导体器件包括：SOI衬底; 半导体元件，其具有设置在所述SOI衬底的有源层中的第一和第二杂质层，所述第二杂质层围绕所述第一杂质层; 以及设置在与SOI衬底的嵌入式绝缘膜相邻的有源层的一部分中的多个第一和第二导电类型区域。交替地布置第一和第二导电类型区域。第一和第二导电类型区域具有对应于半导体元件的布局。

52. 发明申请

US20090096799A1 DISPLAY APPARATUS 审中-公开
标题翻译：显示设备
公开(公告)号：US20090096799A1
公开(公告)日：2009-04-16
申请号：US12344045
申请日：2008-12-24
申请人： Yoshiaki Nakayama , Nobuaki Kabuto , Yohei Kato
发明人： Yoshiaki Nakayama , Nobuaki Kabuto , Yohei Kato
IPC分类号： G09G5/39
CPC分类号： G09G5/006 , G09G2330/02 , G09G2370/047 , H04N5/44 , H04N5/775 , H04N5/85 , H04N21/4122 , H04N21/43635
摘要： A display apparatus includes a memory circuit for storing information regarding the display apparatus, a read enable unit for allowing an external device to read information from the memory circuit, and a write disable unit for inhibiting a write operation in the memory circuit when either one of the power sources of the display apparatus and the external device turns on, allowing the write operation in the memory circuit in response to a signal from an external terminal used by the read enable unit.
摘要翻译：显示装置包括存储电路，用于存储关于显示装置的信息，用于允许外部设备从存储器电路读取信息的读取使能单元，以及用于在存储器电路中的任何一个中禁止写入操作的写入禁止单元显示装置的电源和外部装置接通，响应于来自读取使能单元使用的外部端子的信号，允许存储电路中的写入操作。

53. 发明申请

US20060071284A1 Easily crack checkable semiconductor device 审中-公开
标题翻译：容易破裂的可检测半导体器件
公开(公告)号：US20060071284A1
公开(公告)日：2006-04-06
申请号：US11239088
申请日：2005-09-30
申请人： Akira Tai , Yoshiaki Nakayama
发明人： Akira Tai , Yoshiaki Nakayama
IPC分类号： H01L29/76
CPC分类号： H01L22/34 , H01L21/02129 , H01L21/31612 , H01L21/31625 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first insulation film, a second insulation film, a thin film resistor interposed between the insulation films. A predetermined voltage is applied to the thin film resistor so that a current flows through the thin film resistor. When a crack occurs in the insulation films, the thin film resistor is partially destroyed and the resistance of the thin film resistor changes. The crack is detected by measuring the change in resistance of the thin film resistor based on the predetermined voltage and the current flowing through the thin film resistor. Therefore, a crack inspection can be conducted without destruction of the device.
摘要翻译：半导体器件包括第一绝缘膜，第二绝缘膜，介于绝缘膜之间的薄膜电阻器。向薄膜电阻器施加预定电压，使得电流流过薄膜电阻器。当绝缘膜发生裂纹时，薄膜电阻部分被破坏，薄膜电阻的电阻变化。通过基于预定电压和流过薄膜电阻器的电流测量薄膜电阻器的电阻变化来检测裂纹。因此，可以在不破坏装置的情况下进行裂纹检查。

54. 发明授权

US06940144B2 Semiconductor equipment 失效
标题翻译：半导体设备
公开(公告)号：US06940144B2
公开(公告)日：2005-09-06
申请号：US10662370
申请日：2003-09-16
申请人： Yoshiaki Nakayama
发明人： Yoshiaki Nakayama
IPC分类号： H01L29/41 , H01L21/331 , H01L21/8222 , H01L21/8234 , H01L21/8248 , H01L21/8249 , H01L23/367 , H01L23/48 , H01L27/04 , H01L27/06 , H01L27/08 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/417 , H01L29/73 , H01L29/732 , H01L29/739 , H01L29/78 , H01L29/00
CPC分类号： H01L29/7812 , H01L23/3677 , H01L23/481 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L29/0657 , H01L29/0808 , H01L29/41708 , H01L29/41741 , H01L29/73 , H01L29/7317 , H01L29/7394 , H01L29/7395 , H01L29/7809 , H01L2224/0401 , H01L2224/04042 , H01L2224/05558 , H01L2224/05599 , H01L2224/05647 , H01L2224/16 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48463 , H01L2224/48464 , H01L2224/48847 , H01L2224/49111 , H01L2224/73253 , H01L2224/73257 , H01L2224/85399 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01057 , H01L2924/01058 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/014 , H01L2924/10158 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/19043 , H01L2924/3011 , H01L2224/45099 , H01L2924/00 , H01L2924/01033
摘要： Semiconductor equipment includes a semiconductor substrate with a semiconductor layer embedded therein and a vertical type transistor. The substrate has a principal side, a rear side opposite to the principal side, and a trench disposed in the rear side of the substrate. The vertical type transistor has a first electrode disposed in the principal side of the substrate, a second electrode disposed in the rear side, and a diffusion region disposed in the principal side. The first electrode connects to the diffusion region through an interlayer insulation film. The second electrode is disposed in the trench and connects to the semiconductor layer exposed in the trench. This vertical transistor has a low ON-state resistance.
摘要翻译：半导体设备包括其中嵌入有半导体层的半导体衬底和垂直型晶体管。基板具有主侧，与主侧相对的后侧，以及设置在基板的后侧的沟槽。垂直型晶体管具有设置在基板的主要侧的第一电极，设置在后侧的第二电极和设置在主体侧的扩散区域。第一电极通过层间绝缘膜连接到扩散区域。第二电极设置在沟槽中并连接到暴露在沟槽中的半导体层。该垂直晶体管具有低导通状态电阻。

55. 发明申请

US20050141851A1 Display apparatus 审中-公开
标题翻译：显示装置
公开(公告)号：US20050141851A1
公开(公告)日：2005-06-30
申请号：US10920949
申请日：2004-08-18
申请人： Yoshiaki Nakayama , Nobuaki Kabuto , Yohei Kato
发明人： Yoshiaki Nakayama , Nobuaki Kabuto , Yohei Kato
IPC分类号： G09G5/00 , G06F3/14 , G09G3/36 , H04N5/76 , H04N5/775 , H04N5/781 , H04N5/85
CPC分类号： G09G5/006 , G09G2330/02 , G09G2370/047 , H04N5/44 , H04N5/775 , H04N5/85 , H04N21/4122 , H04N21/43635
摘要： A display apparatus includes a memory circuit for storing information regarding the display apparatus, a read enable unit for allowing an external device to read information from the memory circuit, and a write disable unit for inhibiting a write operation in the memory circuit when either one of the power sources of the display apparatus and the external device turns on, allowing the write operation in the memory circuit in response to a signal from an external terminal used by the read enable unit.
摘要翻译：显示装置包括存储电路，用于存储关于显示装置的信息，用于允许外部设备从存储器电路读取信息的读取使能单元和用于在存储器电路中的任何一个中禁止写入操作的写入禁止单元显示装置的电源和外部装置接通，响应于来自读取使能单元使用的外部端子的信号，允许存储电路中的写入操作。

56. 发明申请

US20050001265A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050001265A1
公开(公告)日：2005-01-06
申请号：US10864518
申请日：2004-06-10
申请人： Satoshi Shiraki , Yoshiaki Nakayama , Shoji Mizuno , Takashi Nakano , Akira Yamada
发明人： Satoshi Shiraki , Yoshiaki Nakayama , Shoji Mizuno , Takashi Nakano , Akira Yamada
IPC分类号： H01L21/76 , H01L21/336 , H01L21/763 , H01L21/8234 , H01L27/08 , H01L29/10 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/76
CPC分类号： H01L29/7824 , H01L21/26586 , H01L21/76286 , H01L21/763 , H01L21/823418 , H01L21/823456 , H01L21/823462 , H01L21/823481 , H01L29/0696 , H01L29/1041 , H01L29/105 , H01L29/1095 , H01L29/4236 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/66681 , H01L29/66795 , H01L29/7825 , H01L29/7831 , H01L29/7835
摘要： A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.
摘要翻译：半导体器件包括：具有主平面的半导体衬底; 设置在主平面上的基部区域; 源区域，其设置在所述基底区域中的所述主平面上，以比所述基底区域浅; 漏极区域，设置在所述主平面上，并且与所述基极区域间隔开; 设在主平面上的沟槽; 通过沟槽栅极绝缘膜设置在沟槽中的沟槽栅电极; 通过平面栅极绝缘膜设置在半导体衬底的主平面上的平面栅电极; 以及杂质扩散区域，其具有高浓度的杂质，并且设置在基极区域的一部分中，作为面向平面栅电极的沟道区域。

57. 发明授权

US06420281B2 Method of forming oxidized film on SOI substrate 有权
标题翻译：在SOI衬底上形成氧化膜的方法
公开(公告)号：US06420281B2
公开(公告)日：2002-07-16
申请号：US09729778
申请日：2000-12-06
申请人： Takuya Okuno , Akira Yamada , Yoshiaki Nakayama
发明人： Takuya Okuno , Akira Yamada , Yoshiaki Nakayama
IPC分类号： H01L21324
CPC分类号： H01L21/84 , H01L27/1203
摘要： One or more capacitors are formed using thermally oxidized films formed on a silicon layer of an SOI substrate. The capacitors may be formed alone or together with other semiconductor elements on a single SOI substrate. A diffuse layer having an impurity in a high density is first formed on the silicon layer, and then an oxidized film is formed on the diffused layer by thermal oxidation. Then, contaminants in the oxidized film are driven-out under a high temperature heat treatment, thereby to improve quality of the oxidized film, such as durability against a high voltage. Plural capacitors may be formed using oxidized films having a respectively different thickness, by repeating thermal oxidation and removal of the oxidized film.
摘要翻译：使用形成在SOI衬底的硅层上的热氧化膜形成一个或多个电容器。电容器可以单独形成或与单个SOI衬底上的其它半导体元件一起形成。首先在硅层上形成具有高密度杂质的扩散层，然后通过热氧化在扩散层上形成氧化膜。然后，在高温热处理下将氧化膜中的污染物排出，从而提高氧化膜的质量，例如耐高压的耐久性。可以通过重复热氧化和去除氧化膜来形成具有不同厚度的氧化膜的多个电容器。

58. 发明授权

US06242787B1 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06242787B1
公开(公告)日：2001-06-05
申请号：US08748896
申请日：1996-11-15
申请人： Yoshiaki Nakayama , Hiroshi Maeda , Makio Iida , Hiroshi Fujimoto , Mitsuhiro Saitou , Hiroshi Imai , Hiroyuki Ban
发明人： Yoshiaki Nakayama , Hiroshi Maeda , Makio Iida , Hiroshi Fujimoto , Mitsuhiro Saitou , Hiroshi Imai , Hiroyuki Ban
IPC分类号： H01L2976
CPC分类号： H01L29/7816 , H01L21/8249 , H01L27/0251 , H01L27/0623 , H01L27/085 , H01L29/063 , H01L29/1083 , H01L29/1095 , H01L29/66674 , H01L29/7395 , H01L29/7801 , H01L29/7824 , H01L29/7835
摘要： A semiconductor device including a reduced surface field strength type LDMOS transistor which can prevent the breakdown of elements at channel formation portions when a reverse voltage is applied to its drain. A P well and an N well are formed in an N-type substrate to produce a double-well structure, with a source electrode being set to be equal in electric potential to the N-type substrate. The drift region of the N well has a dopant concentration to satisfy the so-called RESURF condition, which can provide a high breakdown voltage a low ON resistance. When a reverse voltage is applied to a drain electrode, a parasitic bipolar transistor comprising the N well, the P well and the N-type substrate develops to form a current-carrying path toward a substrate, so that the element breakdown at the channel formation portions is avoidable at the application of the reverse voltage.
摘要翻译：一种包括减小表面场强度型LDMOS晶体管的半导体器件，其可以防止当向其漏极施加反向电压时在沟道形成部分处的元件的击穿。在N型衬底中形成P阱和N阱以产生双阱结构，其中源极被设置为与N型衬底的电位相等。 N阱的漂移区域具有掺杂浓度以满足所谓的RESURF条件，其可以提供高的击穿电压低导通电阻。当向漏极施加反向电压时，包括N阱，P阱和N型衬底的寄生双极晶体管形成朝向衬底的通电路径，使得元件在沟道形成时击穿在施加反向电压时部分是可避免的。

59. 发明授权

US5711675A Meter module, connecting device thereof, wiring harness protector, and connecting device of instrument wiring harness 失效
标题翻译：仪表模块，其连接装置，线束保护器和仪表线束的连接装置
公开(公告)号：US5711675A
公开(公告)日：1998-01-27
申请号：US816886
申请日：1997-03-13
申请人： Keizo Nishitani , Yoshiaki Nakayama , Minoru Kubota , Keiichi Ozaki
发明人： Keizo Nishitani , Yoshiaki Nakayama , Minoru Kubota , Keiichi Ozaki
IPC分类号： B60R16/02 , B60R16/023 , H01R13/621 , H01R33/00
CPC分类号： B60R16/0239 , B60R16/0215 , H01R13/6215
摘要： A meter module includes a meter panel in which meters and indication lamps are mounted, a centralized control circuit board in which control circuits for a vehicle's electrical devices (including meters and indication lamps) are installed, an electric junction box for distribution of power, input and output signals and for integration of earth lines, and a module case. The electric junction box is formed by setting a bus-bar circuit board and an insulator cover in the module case. The electric junction box is formed by setting a bus-bar circuit board and an insulator cover in the module case. The centralized control circuit board and the meter panel are fixed over the electric junction box, whereby the meter panel, the centralized control circuit board and the electric junction box are intensively incorporated. Thus, the electric wiring in the instrument panel portion of the vehicle is simplified and this facilitates setting and assembling of the electric devices such as the meter panel. Furthermore, a wiring harness protector includes a protector main body for protecting a wiring harness therein and a cover. A plurality of through holes are concentrated in the cover, and a plurality of connectors in the wiring harness set in the protector main body are set through the corresponding through holes in a direction perpendicular to the wiring harness extending direction. The connectors are fixed through a connector stopper to form a multipolar connector. The wiring harness protector simplifies the wiring harness, especially the wiring arrangement of instrument panel wiring harness, and facilitates setting and assembling of the wiring harness.
摘要翻译：仪表模块包括安装仪表和指示灯的仪表板，安装车辆电气设备（包括仪表和指示灯）的控制电路的集中控制电路板，用于分配电力的电接线盒，输入并输出信号并集成地线，以及模块外壳。电接线盒通过在组合箱中设置母线电路板和绝缘体盖而形成。电接线盒通过在组合箱中设置母线电路板和绝缘体盖而形成。集中控制电路板和仪表板固定在电接线盒上，集中控制仪表板，集中控制电路板和电接线盒。因此，车辆的仪表板部分中的电线被简化，这便于诸如仪表板的电气装置的设置和组装。此外，线束保护器包括用于保护线束的保护器主体和盖。多个通孔集中在盖中，并且设置在保护器主体中的线束中的多个连接器沿垂直于线束延伸方向的相应通孔设置。连接器通过连接器止动器固定以形成多极连接器。线束保护器简化了线束，特别是仪表板线束的布线布置，便于线束的设置和组装。

60. 发明授权

US5353190A Electric junction box 失效
标题翻译：电接线盒
公开(公告)号：US5353190A
公开(公告)日：1994-10-04
申请号：US71493
申请日：1993-06-04
申请人： Yoshiaki Nakayama , Minoru Kubota
发明人： Yoshiaki Nakayama , Minoru Kubota
IPC分类号： B60K37/00 , B60Q3/04 , B60R16/02 , B60R16/023 , H01H9/02 , H02G3/16 , H02B1/10
CPC分类号： B60R16/0238 , B60K37/00 , B60K37/02 , B60K37/04 , B60Q3/046 , B60K2350/941
摘要： An electric junction box installed in an automotive instrument panel incorporates the meter board and its associated switch circuits as the internal circuit of the box. The electric junction box has an internal busbar circuit having branches that are directly connected to the meter board and the switch circuits so that they form an integral part of the internal circuit of the junction box.
摘要翻译：安装在汽车仪表板中的电接线盒将仪表板及其相关的开关电路作为箱体的内部电路。电接线盒具有内部母线电路，其具有直接连接到仪表板和开关电路的分支，使得它们形成接线盒内部电路的组成部分。

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