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51. 发明授权

US07708823B2 Semi-transparent interference pigments containing tin 失效
标题翻译：半透明干涉颜料含锡
公开(公告)号：US07708823B2
公开(公告)日：2010-05-04
申请号：US11994210
申请日：2006-06-09
申请人： Helge Bettina Kniess , Klaus Bernhardt , Wolf-Dietrich Weber , Gerhard Pfaff
发明人： Helge Bettina Kniess , Klaus Bernhardt , Wolf-Dietrich Weber , Gerhard Pfaff
IPC分类号： C09C1/00 , C09C3/00 , C09D5/36 , C09D7/12 , C09D11/02 , C09D17/00 , A61K8/19
CPC分类号： C09D17/004 , A61K8/11 , A61K8/19 , A61K2800/412 , A61K2800/436 , A61Q1/06 , A61Q1/10 , C01P2004/64 , C01P2004/84 , C08K3/013 , C08K3/04 , C08K3/22 , C08K3/34 , C08K3/40 , C08K9/02 , C08K9/04 , C09C1/0078 , C09D5/36 , C09D7/62 , C09D11/037 , C09D11/50 , Y10T428/2991
摘要： The present invention relates to semitransparent interference pigments having a neutral mass tone comprising a substrate and a coating comprising metallic tin and additionally at least one metal oxide, to a process for the preparation of these pigments, and to the use thereof.
摘要翻译：本发明涉及具有中性质量色调的半透明干涉颜料，其包含基材和包含金属锡和另外至少一种金属氧化物的涂料，涉及制备这些颜料的方法及其用途。

52. 发明申请

US20090024688A1 Accessing Memory And Processor Caches Of Nodes In Multi-Node Configurations 有权
标题翻译：在多节点配置中访问节点的内存和处理器缓存
公开(公告)号：US20090024688A1
公开(公告)日：2009-01-22
申请号：US12179386
申请日：2008-07-24
申请人： James C. Wilson , Wolf-Dietrich Weber
发明人： James C. Wilson , Wolf-Dietrich Weber
IPC分类号： G06F15/173
CPC分类号： G06F12/0817 , G06F12/0813 , G06F12/0831 , G06F15/17
摘要： A method for communicating between nodes of a plurality of nodes is disclosed. Each node includes a plurality of processors and an interconnect chipset. The method issues a request for data from a processor in a first node and passes the request for data to other nodes through an expansion port (or scalability port). The method also starts an access of a memory in response to the request for data and snoops a processor cache of each processor in each node. The method accordingly identifies the location of the data in either the processor cache or memory in the node having the processor issuing the request or in a processor cache or memory of another node.
摘要翻译：公开了一种在多个节点的节点之间进行通信的方法。每个节点包括多个处理器和互连芯片组。该方法向第一个节点中的处理器发出数据请求，并通过扩展端口（或可扩展端口）将数据请求传递给其他节点。该方法还响应于对数据的请求并且监听每个节点中的每个处理器的处理器高速缓存，开始访问存储器。因此，该方法识别在具有处理器发出请求的节点中的处理器高速缓存或存储器中的数据的位置，或者在另一节点的处理器高速缓存或存储器中。

53. 发明授权

US07149829B2 Various methods and apparatuses for arbitration among blocks of functionality 有权
标题翻译：用于在功能块之间进行仲裁的各种方法和装置
公开(公告)号：US07149829B2
公开(公告)日：2006-12-12
申请号：US10418370
申请日：2003-04-18
申请人： Wolf-Dietrich Weber , Ian Andrew Swarbrick , Jay S. Tomlinson
发明人： Wolf-Dietrich Weber , Ian Andrew Swarbrick , Jay S. Tomlinson
IPC分类号： G06F12/00
CPC分类号： G06F13/364 , G06F9/526 , G06F2209/522
摘要： Various methods and apparatuses are described in which an arbitration controller cooperates with arbitration logic. The arbitration controller has a plurality of inputs that receive one or more transactions from a plurality of blocks of functionality. The arbitration controller arbitrates requests for access to a shared resource amongst the plurality of blocks of functionality by implementing an arbitration policy. The arbitration policy groups the transactions from the plurality of blocks of functionality into global groups of transactions for servicing by that shared resource. All of the transactions in a first global group are serviced by that shared resource prior to servicing transactions in a next global group of transactions. The arbitration logic facilitates the arbitration policy. The arbitration logic includes cascaded arbitration units that hierarchically arbitrate for the shared resource. The topology of the functional blocks supplying the transactions to the inputs into the arbitration controller is capable of varying independently of the arbitration policy achieved by the collection of arbitration units.
摘要翻译：描述了各种方法和装置，其中仲裁控制器与仲裁逻辑协作。仲裁控制器具有从多个功能块接收一个或多个事务的多个输入。仲裁控制器通过实施仲裁政策来仲裁多个功能块之间对共享资源的访问请求。仲裁策略将来自多个功能块的交易分组为全局交易组，以供该共享资源进行服务。第一个全球组中的所有交易在该下一个全球交易组中为交易提供服务之前由该共享资源提供服务。仲裁逻辑有助于仲裁政策。仲裁逻辑包括级联仲裁用于共享资源的级联仲裁单元。将交易提供给仲裁控制器的输入的功能块的拓扑能够独立于通过收集仲裁单元实现的仲裁策略而变化。

54. 发明授权

US06804757B2 Method and apparatus for scheduling requests using ordered stages of scheduling criteria 有权
标题翻译：使用调度标准的有序阶段来调度请求的方法和装置
公开(公告)号：US06804757B2
公开(公告)日：2004-10-12
申请号：US10409806
申请日：2003-04-08
申请人： Wolf-Dietrich Weber
发明人： Wolf-Dietrich Weber
IPC分类号： G06F1314
CPC分类号： G06F9/5016 , G06F13/1605 , G06F13/1626
摘要： The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of initiator device access is performed wherein requests are only reordered between threads.
摘要翻译：本发明提供从多个发起者设备调度对一个资源的请求。在一个实施例中，执行在线程内的请求的调度和发起者设备访问的调度，其中请求仅在线程之间重新排序。

55. 发明授权

US06625694B2 System and method for allocating a directory entry for use in multiprocessor-node data processing systems 有权
标题翻译：用于分配用于多处理器节点数据处理系统的目录条目的系统和方法
公开(公告)号：US06625694B2
公开(公告)日：2003-09-23
申请号：US09304432
申请日：1999-05-03
申请人： Nabil N. Masri , Wolf-Dietrich Weber
发明人： Nabil N. Masri , Wolf-Dietrich Weber
IPC分类号： G06F1212
CPC分类号： G06F12/121 , G06F12/082
摘要： An algorithm for selecting a directory entry in a multiprocessor-node system. In response to a memory request from a processor in a processor node, the algorithm finds an available entry to store information about the requested memory line. If at least one entry is available, then the algorithm uses one of the available entries. Otherwise, the algorithm searches for a “shared” entry. If at least one shared entry is available, then the algorithm uses one of the shared entries. Otherwise, the algorithm searches for a “dirty” entry. If at least one dirty entry is available, then the algorithm uses one of the dirty entries. In selecting a directory entry, the algorithm uses a “least-recently-used” (LRU) algorithm because an entry that was not recently used is more likely to be stale. Further, to improve system performance, the algorithm preferably uses a shared entry before using a dirty entry. In the preferred embodiment, the processor node that utilizes the invention includes at least one processor having a respective cache connected via a bus to main memory.
摘要翻译：用于在多处理器节点系统中选择目录条目的算法。响应于来自处理器节点中的处理器的存储器请求，算法找到可用条目以存储关于所请求的存储器线的信息。如果至少有一个条目可用，则该算法使用可用条目之一。否则，算法将搜索“共享”条目。如果至少有一个共享条目可用，则该算法使用一个共享条目。否则，算法将搜索“脏”条目。如果至少有一个脏条目可用，则算法使用其中一个脏条目。在选择目录条目时，该算法使用“最近最少使用”（LRU）算法，因为最近不使用的条目更有可能是陈旧的。此外，为了提高系统性能，该算法优选地在使用脏条目之前使用共享条目。在优选实施例中，利用本发明的处理器节点包括至少一个具有经由总线连接到主存储器的相应缓存器的处理器。

56. 发明授权

US06393023B1 System and method for acknowledging receipt of messages within a packet based communication network 失效
标题翻译：用于确认在基于分组的通信网络内的消息的接收的系统和方法
公开(公告)号：US06393023B1
公开(公告)日：2002-05-21
申请号：US09075461
申请日：1998-05-08
申请人： Takeshi Shimizu , Wolf-Dietrich Weber , Patrick J. Helland , Thomas M. Wicki , Winfried W. Wilcke
发明人： Takeshi Shimizu , Wolf-Dietrich Weber , Patrick J. Helland , Thomas M. Wicki , Winfried W. Wilcke
IPC分类号： H04L1256
CPC分类号： H04L1/1867 , H04L1/16 , H04L1/1874 , H04L1/188
摘要： A system and method for acknowledging receipt of messages within a packet based communication network. A sending node generates a data packet within an upper layer, and transmits the data packet to a receiving node using a lower layer. The lower layer generates and transmits a pseudo reply packet to the upper layer in response to an acknowledgment received from the receiving node. The pseudo reply packet notifies the upper layer of the sending node that the receiving node successfully received the data packet and removes the burden of having an upper layer of the receiving node generate an actual reply packet.
摘要翻译：一种用于在基于分组的通信网络内确认接收到消息的系统和方法。发送节点在上层生成数据包，并使用较低层将数据包发送到接收节点。响应于从接收节点接收的确认，下层生成并向上层发送伪应答分组。伪应答分组通知发送节点的上层接收节点成功接收到数据分组，并消除了接收节点的上层生成实际应答分组的负担。

57. 发明授权

US5740346A System and method for dynamic network topology exploration 失效
标题翻译：动态网络拓扑探索的系统与方法
公开(公告)号：US5740346A
公开(公告)日：1998-04-14
申请号：US605676
申请日：1996-02-22
申请人： Thomas M. Wicki , Patrick J. Helland , Wolf-Dietrich Weber , Winfried W. Wilcke
发明人： Thomas M. Wicki , Patrick J. Helland , Wolf-Dietrich Weber , Winfried W. Wilcke
IPC分类号： H04L12/56
CPC分类号： H04L45/02
摘要： A system and method dynamically determines the topology of a source node routing network while having a minimal effect on network performance and without requiring expensive hardware to implement. A source node generates a ping frame. The source node transmits the ping frame to a first source router that is coupled to the source node. The first router transparently identifies the frame as a ping frame and creates an echo frame that is transmitted back to the source node. The first router identifies the port from which the ping frame is received and places this information in the header of the echo frame along with an echo frame identifier. The source node receives the echo frame and identifies routers and nodes to which a ping frame has not been sent based upon the connectivity information in the received echo frame. The source node continue generating and transmitting ping frame to all nodes and routers in the network. The source node identifies loops in the topology to avoid repetitive checking and identifies link and router failures. The topology exploration technique is transparent to the routers The topology exploration techique can be implemented during slow traffic periods with no increase in network latency or the technique can be implemented during high traffic periods and result in only a minimal increase in system latency because ping frames are small and are transparently sent to the control frame handler of the destination router or node.
摘要翻译：系统和方法动态地确定源节点路由网络的拓扑，同时对网络性能影响最小，而不需要昂贵的硬件来实现。源节点生成ping帧。源节点将ping帧发送到耦合到源节点的第一源路由器。第一个路由器将该帧透明地识别为一个ping帧，并创建一个发送回源节点的回波帧。第一个路由器识别从其接收ping帧的端口，并将该信息与回波帧标识符一起放置在回波帧的报头中。根据所接收的回波帧中的连通性信息，源节点接收回波帧并识别尚未发送ping帧的路由器和节点。源节点继续生成并发送Ping帧到网络中的所有节点和路由器。源节点标识拓扑中的循环，以避免重复检查，并识别链路和路由器故障。拓扑探索技术对于路由器是透明的。拓扑探索技术可以在较慢的流量周期内实现，而不会增加网络延迟，或者在高流量时段内可以实现该技术，并且只能使系统延迟最小化，因为ping帧并且被透明地发送到目的地路由器或节点的控制帧处理器。

58. 发明授权

US08832476B2 Power allotment distribution in a data center 有权
标题翻译：数据中心的配电分配
公开(公告)号：US08832476B2
公开(公告)日：2014-09-09
申请号：US12892116
申请日：2010-09-28
申请人： Xiaobo Fan , Chris Sadler , Selver Corhodzic , Wolf-Dietrich Weber , Taliver Brooks Heath , Mark Hennecke
发明人： Xiaobo Fan , Chris Sadler , Selver Corhodzic , Wolf-Dietrich Weber , Taliver Brooks Heath , Mark Hennecke
IPC分类号： G06F1/32 , G06F1/26 , G06F1/18
CPC分类号： G06F1/329 , Y02D10/24
摘要： In a computer-implemented method, an electronic communication from a first computing machine is received and includes a power value and one or more priority values. The power value represents a request for a power allotment expected to be used during a predetermined time and the priority values represent priorities of tasks expected to be executed during the predetermined time. A score for the request is calculated using a scoring function and the received priority values as inputs to the scoring function. The score is compared to one or more other scores respectively associated with requests for power allotments from other computing machines and previously calculated using the scoring function following receipt of one or more electronic communications each including a power value and one or more priority values. A top-ranked score is identified and an electronic communication is sent to the associated computing machine granting the requested power allotment.
摘要翻译：在计算机实现的方法中，接收来自第一计算机的电子通信，并且包括功率值和一个或多个优先级值。功率值表示预期在预定时间期间使用的功率分配的请求，并且优先级值表示在预定时间期间预期执行的任务的优先级。使用评分函数和接收到的优先级值作为评分函数的输入来计算请求的得分。该分数与分别与来自其他计算机的功率分配的请求相关联的一个或多个其他分数进行比较，并且先前在接收到包括功率值和一个或多个优先级值的一个或多个电子通信之后使用评分功能计算。识别出排名最高的分数，并且电子通信被发送给授予所请求的功率分配的相关联的计算机。

59. 发明授权

US08700929B1 Load control in a data center 有权
标题翻译：在数据中心进行负载控制
公开(公告)号：US08700929B1
公开(公告)日：2014-04-15
申请号：US12134611
申请日：2008-06-06
申请人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
发明人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
IPC分类号： G06F1/00
CPC分类号： G06F17/5009 , G06F1/00 , G06F1/3206 , G06F9/5094 , Y02D10/22
摘要： A method of controlling power usage in a data center includes monitoring a power usage of a plurality of computers in the data center, generating a signal indicating that the power usage is within a threshold of a maximum power capacity, and in response to the signal, adjusting performance of at least one computer in the plurality of computers.
摘要翻译：一种控制数据中心的电力使用的方法包括监视数据中心中的多台计算机的电力使用情况，产生指示电力使用量在最大功率容量的阈值内的信号，并且响应于该信号，调整所述多个计算机中的至少一台计算机的性能。

60. 发明申请

US20120078430A1 Power Allotment Distribution in a Data Center 有权
标题翻译：配电分配在数据中心
公开(公告)号：US20120078430A1
公开(公告)日：2012-03-29
申请号：US12892116
申请日：2010-09-28
申请人： Xiaobo Fan , Chris Sadler , Selver Corhodzic , Wolf-Dietrich Weber , Taliver Brooks Heath , Mark Hennecke
发明人： Xiaobo Fan , Chris Sadler , Selver Corhodzic , Wolf-Dietrich Weber , Taliver Brooks Heath , Mark Hennecke
IPC分类号： G06F1/26
CPC分类号： G06F1/329 , Y02D10/24
摘要： In a computer-implemented method, an electronic communication from a first computing machine is received and includes a power value and one or more priority values. The power value represents a request for a power allotment expected to be used during a predetermined time and the priority values represent priorities of tasks expected to be executed during the predetermined time. A score for the request is calculated using a scoring function and the received priority values as inputs to the scoring function. The score is compared to one or more other scores respectively associated with requests for power allotments from other computing machines and previously calculated using the scoring function following receipt of one or more electronic communications each including a power value and one or more priority values. A top-ranked score is identified and an electronic communication is sent to the associated computing machine granting the requested power allotment.
摘要翻译：在计算机实现的方法中，接收来自第一计算机的电子通信，并且包括功率值和一个或多个优先级值。功率值表示预期在预定时间期间使用的功率分配的请求，并且优先级值表示在预定时间期间预期执行的任务的优先级。使用评分函数和接收到的优先级值作为评分函数的输入来计算请求的得分。该分数与分别与来自其他计算机的功率分配的请求相关联的一个或多个其他分数进行比较，并且先前在接收到包括功率值和一个或多个优先级值的一个或多个电子通信之后使用评分功能计算。识别出排名最高的分数，并且电子通信被发送给授予所请求的功率分配的相关联的计算机。

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