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51. 发明授权

US07471628B2 Intelligent flow control management to extend fibre channel link full performance range 有权
标题翻译：智能流量控制管理扩展光纤通道链路的全面性能范围
公开(公告)号：US07471628B2
公开(公告)日：2008-12-30
申请号：US10166213
申请日：2002-06-10
申请人： Yanfeng Wang
发明人： Yanfeng Wang
IPC分类号： H04J1/16 , H04L12/28 , G06F15/16
CPC分类号： H04L47/39
摘要： Supplemental flow control mechanisms are provided to facilitate efficient data exchange between Fibre Channel ports over extended distances. In one implementation, a supplemental buffer mechanism is maintained and managed in part by substituting a locally generated ready indication signal for the remotely generated ready indication signal provided by the Fibre Channel standard. In this way, data flow may be adjusted optimally irrespective of the relatively long propagation time of the ready signals exchanged by the two sides of the link.
摘要翻译：提供补充流量控制机制，以便在长距离的光纤通道端口之间进行有效的数据交换。在一个实现中，补充缓冲机制通过将本地生成的就绪指示信号替换为由光纤通道标准提供的远程生成就绪指示信号来部分地被维护和管理。以这种方式，可以最佳地调整数据流，而不管由链路的两侧交换的就绪信号的相对较长的传播时间。

52. 发明授权

US09312358B2 Partially-blocked well implant to improve diode ideality with SiGe anode 有权
公开(公告)号：US09312358B2
公开(公告)日：2016-04-12
申请号：US13617140
申请日：2012-09-14
申请人： Dechao Guo , Wilfried E. Haensch , Gan Wang , Yanfeng Wang , Xin Wang
发明人： Dechao Guo , Wilfried E. Haensch , Gan Wang , Yanfeng Wang , Xin Wang
IPC分类号： H01L29/66 , H01L29/739 , H01L29/165 , H01L29/16
CPC分类号： H01L29/66356 , H01L29/1608 , H01L29/165 , H01L29/7391
摘要： A method of manufacturing a semiconductor device is disclosed. A p-type substrate is doped to form an N-well in a selected portion of a p-type substrate adjacent an anode region of the substrate. A p-type doped region is formed in the anode region of the p-type substrate. The p-type doped region and the N-well form a p-n junction.

53. 发明授权

US09040399B2 Threshold voltage adjustment for thin body MOSFETs 有权
标题翻译：薄体MOSFET的阈值电压调整
公开(公告)号：US09040399B2
公开(公告)日：2015-05-26
申请号：US13282619
申请日：2011-10-27
申请人： MaryJane Brodsky , Ming Cai , Dechao Guo , William K. Henson , Shreesh Narasimha , Yue Liang , Liyang Song , Yanfeng Wang , Chun-Chen Yeh
发明人： MaryJane Brodsky , Ming Cai , Dechao Guo , William K. Henson , Shreesh Narasimha , Yue Liang , Liyang Song , Yanfeng Wang , Chun-Chen Yeh
IPC分类号： H01L21/425 , H01L29/66
CPC分类号： H01L29/66803
摘要： A structure includes a substrate; a transistor disposed over the substrate, the transistor comprising a fin comprised of Silicon that is implanted with Carbon; and a gate dielectric layer and gate metal layer overlying a portion of the fin that defines a channel of the transistor. In the structure a concentration of Carbon within the fin is selected to establish a desired voltage threshold of the transistor. Methods to fabricate a FinFET transistor are also disclosed. Also disclosed is a planar transistor having a Carbon-implanted well where the concentration of the Carbon within the well is selected to establish a desired voltage threshold of the transistor.
摘要翻译：一种结构包括基板; 设置在所述衬底上的晶体管，所述晶体管包括由碳注入的由硅构成的鳍; 以及覆盖限定晶体管的沟道的鳍片的一部分上的栅极电介质层和栅极金属层。在该结构中，选择鳍内的碳浓度以建立晶体管的期望电压阈值。还公开了制造FinFET晶体管的方法。还公开了具有碳注入阱的平面晶体管，其中选择阱内的碳浓度以建立晶体管的期望电压阈值。

54. 发明授权

US08742475B2 Field effect transistor device and fabrication 有权
标题翻译：场效应晶体管器件和制造
公开(公告)号：US08742475B2
公开(公告)日：2014-06-03
申请号：US13554294
申请日：2012-07-20
申请人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Yanfeng Wang
发明人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Yanfeng Wang
IPC分类号： H01L21/02
CPC分类号： H01L29/42368 , H01L21/823842 , H01L21/823857 , H01L21/823871 , H01L29/66477
摘要： In one aspect of the present invention, a field effect transistor (FET) device includes a first FET including a dielectric layer disposed on a substrate, a first portion of a first metal layer disposed on the dielectric layer, and a second metal layer disposed on the first metal layer, a second FET including a second portion of the first metal layer disposed on the dielectric layer, and a boundary region separating the first FET from the second FET.
摘要翻译：在本发明的一个方面中，场效应晶体管（FET）器件包括：第一FET，其包括设置在基板上的电介质层，设置在电介质层上的第一金属层的第一部分和设置在电介质层上的第二金属层第一金属层，包括设置在电介质层上的第一金属层的第二部分的第二FET以及将第一FET与第二FET分离的边界区域。

55. 发明申请

US20140001570A1 COMPOSITE HIGH-K GATE DIELECTRIC STACK FOR REDUCING GATE LEAKAGE 有权
标题翻译：用于降低闸门泄漏的复合高K栅电介质堆叠
公开(公告)号：US20140001570A1
公开(公告)日：2014-01-02
申请号：US13537101
申请日：2012-06-29
申请人： MaryJane Brodsky , Michael P. Chudzik , Min Dai , Joseph F. Shepard, JR. , Shahab Siddiqui , Yanfeng Wang , Jinping Liu
发明人： MaryJane Brodsky , Michael P. Chudzik , Min Dai , Joseph F. Shepard, JR. , Shahab Siddiqui , Yanfeng Wang , Jinping Liu
IPC分类号： H01L27/088 , H01L21/31
CPC分类号： H01L21/02321 , H01L21/28194 , H01L21/3115 , H01L21/823462 , H01L29/513 , H01L29/517
摘要： A composite high dielectric constant (high-k) gate dielectric includes a stack of a doped high-k gate dielectric and an undoped high-k gate dielectric. The doped high-k gate dielectric can be formed by providing a stack of a first high-k dielectric material layer and a dopant metal layer and annealing the stack to induce the diffusion of the dopant metal into the first high-k dielectric material layer. The undoped high-k gate dielectric is formed by subsequently depositing a second high-k dielectric material layer. The composite high-k gate dielectric can provide an increased gate-leakage oxide thickness without increasing inversion oxide thickness.
摘要翻译：复合高介电常数（high-k）栅极电介质包括掺杂的高k栅极电介质和未掺杂的高k栅极电介质的堆叠。可以通过提供第一高k电介质材料层和掺杂剂金属层的堆叠来形成掺杂的高k栅极电介质，并且对叠层进行退火以引起掺杂剂金属扩散到第一高k电介质材料层中。通过随后沉积第二高k电介质材料层形成未掺杂的高k栅极电介质。复合高k栅极电介质可以提供增加的栅极 - 漏极氧化物厚度，而不增加反转氧化物厚度。

56. 发明授权

US08619060B2 Multi-touch positioning method and multi-touch screen 有权
标题翻译：多点触控定位方式和多点触控屏
公开(公告)号：US08619060B2
公开(公告)日：2013-12-31
申请号：US12578717
申请日：2009-10-14
申请人： Yanfeng Wang
发明人： Yanfeng Wang
IPC分类号： G06F3/042
CPC分类号： G06F3/0421 , G06F3/0428 , G06F2203/04808
摘要： The present invention relates to a multi-touch positioning method and a multi-touch screen. The multi-touch positioning method comprising: emitting, by a first infrared ray generator set at a first angle of a display panel, infrared rays at a first wavelength; emitting, by a second infrared ray generator set at a second angle, infrared rays at a second wavelength; receiving the infrared rays of the first wavelength and generating a first infrared ray image by a first infrared ray image sensor set at an opposite angle of the first angle; receiving the infrared rays of the second wavelength and generating a second infrared ray image by a second infrared ray image sensor set at an opposite angle of the second angle; and performing processings for the first infrared ray image and the second infrared ray image to determine at least one touch point.
摘要翻译：本发明涉及多点触摸定位方法和多点触摸屏。所述多点触摸定位方法包括：通过由显示面板的第一角度设置的第一红外线发生器发射第一波长的红外线; 通过以第二角度设置的第二红外线发生器发射第二波长的红外线; 接收第一波长的红外线并通过设置在与第一角度相反的角度的第一红外线图像传感器产生第一红外线图像; 接收第二波长的红外线，并且以与第二角度相反的角度设置的第二红外线图像传感器产生第二红外线图像; 以及对所述第一红外线图像和所述第二红外线图像执行处理以确定至少一个触摸点。

57. 发明申请

US20130162363A1 MODULATOR, MIXER AND METHOD FOR AMPLITUDE SHIFT KEYING MODULATION 有权
标题翻译：调制器，混频器和放大器移位键控调制方法
公开(公告)号：US20130162363A1
公开(公告)日：2013-06-27
申请号：US13400129
申请日：2012-02-20
申请人： Peng Han , Dawei Guo , Jiazhou Liu , Yanfeng Wang
发明人： Peng Han , Dawei Guo , Jiazhou Liu , Yanfeng Wang
IPC分类号： H03C1/00 , G06G7/12
CPC分类号： H03C1/36 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0033 , H03D2200/0052 , H04L27/04
摘要： An ASK modulator includes a baseband unit which obtains a sequence comprising at least one amplitude value and adds an additional value to each of the at least one amplitude value to generate a modified sequence; a digital-to-analog converter coupled to the baseband unit, the digital-to-analog converter converts the modified sequence to generate a first signal, the additional value is determined based on a half scale of the digital-analog converter; and a mixer which receives the first signal and a second signal and generate a modulated signal by mixing the first signal with the second signal.
摘要翻译： ASK调制器包括：基带单元，其获得包括至少一个幅度值的序列，并且对所述至少一个幅度值中的每一个增加附加值以生成修改的序列; 耦合到所述基带单元的数模转换器，所述数模转换器转换所述经修改的序列以产生第一信号，所述附加值基于所述数模转换器的半标度来确定; 以及混合器，其接收第一信号和第二信号，并通过将第一信号与第二信号混合来产生调制信号。

58. 发明申请

US20130087859A1 Work Function Adjustment By Carbon Implant In Semiconductor Devices Including Gate Structure 有权
标题翻译：包括门结构在内的半导体器件中的碳植入工作功能调整
公开(公告)号：US20130087859A1
公开(公告)日：2013-04-11
申请号：US13253268
申请日：2011-10-05
申请人： Yue Liang , Dechao Guo , William K. Henson , Shreesh Narasimha , Yanfeng Wang
发明人： Yue Liang , Dechao Guo , William K. Henson , Shreesh Narasimha , Yanfeng Wang
IPC分类号： H01L21/266 , H01L27/092
CPC分类号： H01L27/092 , H01L21/26506 , H01L21/28088 , H01L21/28176 , H01L21/28194 , H01L21/823857 , H01L29/1054 , H01L29/517
摘要： A device including a p-type semiconductor device and an n-type semiconductor device on a semiconductor substrate. The n-type semiconductor device includes a gate structure having a high-k gate dielectric. A carbon dopant in a concentration ranging from 1×1016 atoms/cm3 to 1×1021 atoms/cm3 is present at an interface between the high-k gate dielectric of the gate structure for the n-type semiconductor device and the semiconductor substrate. Methods of forming the aforementioned device are also disclosed.
摘要翻译：一种在半导体衬底上包括p型半导体器件和n型半导体器件的器件。 n型半导体器件包括具有高k栅极电介质的栅极结构。在n型半导体器件的栅极结构的高k栅极电介质和半导体衬底之间的界面处存在浓度范围为1×1016原子/ cm3至1×1021原子/ cm3的碳掺杂剂。还公开了形成上述装置的方法。

59. 发明申请

US20120168874A1 STRUCTURE AND METHOD TO IMPROVE THRESHOLD VOLTAGE OF MOSFETS INCLUDING A HIGH K DIELECTRIC 有权
标题翻译：提高包括高K电介质的MOSFET的阈值电压的结构和方法
公开(公告)号：US20120168874A1
公开(公告)日：2012-07-05
申请号：US13409693
申请日：2012-03-01
申请人： Sunfei Fang , Brian J. Greene , Effendi Leobandung , Qingqing Liang , Edward P. Maciejewski , Yanfeng Wang
发明人： Sunfei Fang , Brian J. Greene , Effendi Leobandung , Qingqing Liang , Edward P. Maciejewski , Yanfeng Wang
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L21/823857 , H01L21/28247 , H01L21/823842 , H01L21/823864 , H01L29/517 , H01L29/6659 , H01L29/66636
摘要： Threshold voltage controlled semiconductor structures are provided in which a conformal nitride-containing liner is located on at least exposed sidewalls of a patterned gate dielectric material having a dielectric constant of greater than silicon oxide. The conformal nitride-containing liner is a thin layer that is formed using a low temperature (less than 500° C.) nitridation process.
摘要翻译：提供了阈值电压控制的半导体结构，其中共形含氮化物的衬垫位于具有大于氧化硅的介电常数的图案化栅极电介质材料的至少暴露的侧壁上。含氮氮化物的内衬是使用低温（小于500℃）的氮化工艺形成的薄层。

60. 发明申请

US20110241120A1 Field Effect Transistor Device and Fabrication 有权
标题翻译：场效应晶体管器件和制造
公开(公告)号：US20110241120A1
公开(公告)日：2011-10-06
申请号：US12754917
申请日：2010-04-06
申请人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Yanfeng Wang
发明人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Yanfeng Wang
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L29/42368 , H01L21/823842 , H01L21/823857 , H01L21/823871 , H01L29/66477
摘要： A method for forming a field effect transistor (FET) device includes forming a dielectric layer on a substrate, forming a first metal layer on the dielectric layer, removing a portion of the first metal layer to expose a portion of the dielectric layer, forming a second metal layer on the dielectric layer and the first metal layer, and removing a portion of the first metal layer and the second metal layer to define a boundary region between a first FET device and a second FET device.
摘要翻译：一种用于形成场效应晶体管（FET）器件的方法，包括在衬底上形成电介质层，在电介质层上形成第一金属层，去除第一金属层的一部分以露出电介质层的一部分，形成在所述电介质层和所述第一金属层上的第二金属层，以及去除所述第一金属层和所述第二金属层的一部分，以限定第一FET器件和第二FET器件之间的边界区域。

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