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51. 发明授权

US5315227A Solar recharge station for electric vehicles 失效
标题翻译：电动汽车太阳能充电站
公开(公告)号：US5315227A
公开(公告)日：1994-05-24
申请号：US010888
申请日：1993-01-29
申请人： Mark V. Pierson , How T. Lin
发明人： Mark V. Pierson , How T. Lin
IPC分类号： B60L8/00 , B60L11/18 , H02J7/35 , H02J7/00
CPC分类号： B60L11/1818 , B60L11/1824 , B60L11/1833 , B60L11/1844 , H02J7/355 , B60L2200/26 , B60L2210/30 , B60L2230/22 , B60L2230/30 , Y02E60/721 , Y02T10/7005 , Y02T10/7088 , Y02T10/7241 , Y02T90/121 , Y02T90/125 , Y02T90/127 , Y02T90/128 , Y02T90/14 , Y02T90/163 , Y04S10/126 , Y10S136/291 , Y10S136/293
摘要： A solar recharge station is described having a contact area, a battery bank charge area and a solar panel array for maintaining the battery bank charged. The contact area includes electric contacts formed for engagement automatically by contacts on an electric powered vehicle as the vehicle enters the contact area. The battery bank is connected so that its energy is available for either recharging the vehicle or other use, and in case the vehicle needs a recharge but the battery banks lacks sufficient charge, ordinary house voltage is used.
摘要翻译：描述了具有接触区域，电池组充电区域和用于维持电池组充电的太阳能电池板阵列的太阳能充电站。接触区域包括当车辆进入接触区域时由电动车辆上的触点自动地接合形成的电触头。电池组被连接，使得其能量可用于对车辆或其他用途进行充电，并且如果车辆需要充电，但是电池组缺少足够的电量，则使用普通房屋电压。

52. 发明授权

US4273393A Automatic component dispensor 失效
标题翻译：自动配件分配器
公开(公告)号：US4273393A
公开(公告)日：1981-06-16
申请号：US76975
申请日：1979-09-20
申请人： Michael S. Foley , Mark V. Pierson
发明人： Michael S. Foley , Mark V. Pierson
IPC分类号： H05K13/00 , B23P19/00 , B65G1/04 , B65G1/06 , B65G1/10 , B65G1/133 , B65G59/06 , A47F5/02 , H05K13/04
CPC分类号： B65G1/045 , B65G1/10 , Y10T29/515
摘要： A dispensing device for small parts arranged in a compact shape from when the parts can be withdrawn from a single point including a plurality of vertically stacked trays slidably disposed upon banks of spaced flanges which are rotatable about a central axis of the device and reciprocable in a plane parallel to the central axis. The uppermost and lowermost trays in the stack are free to rotate with the flanges and the balance of the trays are restrained from rotation so as to be disengaged from one bank of flanges and received between the planes of another bank of flanges.
摘要翻译：一种用于小部件的分配装置，其布置成紧凑的形状，从零件可以从包括多个垂直堆叠的托盘中的单个点撤出时，该托盘可滑动地设置在间隔开的凸缘组上，该凸缘可围绕装置的中心轴线旋转，平行于中心轴的平面。堆叠中的最上面和最下面的托盘随着凸缘自由旋转，并且托盘的平衡被限制在旋转中，以便与一组凸缘分离并容纳在另一组凸缘的平面之间。

53. 发明授权

US08089133B2 Optical assemblies for transmitting and manipulating optical beams 有权
标题翻译：用于传输和操纵光束的光学组件
公开(公告)号：US08089133B2
公开(公告)日：2012-01-03
申请号：US10993305
申请日：2004-11-19
申请人： Dinesh Gupta , Brenda L. Peterson , Mark V. Pierson , Eugen Schenfeld , Subhash L. Shinde
发明人： Dinesh Gupta , Brenda L. Peterson , Mark V. Pierson , Eugen Schenfeld , Subhash L. Shinde
IPC分类号： H01L31/0232
CPC分类号： G02B6/3522 , G02B6/2817 , G02B6/3544 , G02B6/3574 , G02B6/3598 , G02B6/4214 , G02B6/4244 , G02B6/4245 , G02B6/4246 , G02B6/4249 , G02B6/4259 , G02B6/4269 , G02B6/4281 , G02B6/43 , H01L2924/0002 , H01L2924/00
摘要： Optical cubes and optical cube assemblies for directing optical beams are provided. The optical cubes are optically transparent modules that can be adapted to reflect, transmit, and/or partially reflect and transmit optical beams. The optical cubes may include bi-direction or multi-direction beam directing elements for directing optical beams. The optical cube assemblies may include flexible chip assemblies attached to optical cubes. The chip assemblies may include vertical cavity surface-emitting lasers for emitting optical beams or receivers for receiving optical beams mounted on a flexible and electrical interconnect mounting assembly.
摘要翻译：提供用于引导光束的光学立方体和光学立方体组件。光学立方体是可以适于反射，透射和/或部分地反射和透射光束的光学透明模块。光学立方体可以包括用于引导光束的双向或多方向光束引导元件。光学立方体组件可以包括附接到光学立方体的柔性芯片组件。芯片组件可以包括用于发射光束的垂直腔表面发射激光器或用于接收安装在柔性和电互连安装组件上的光束的接收器。

54. 发明授权

US06770968B2 Method for bonding heat sinks to overmolds and device formed thereby 有权
标题翻译：用于将散热器连接到包覆成型体的方法和由此形成的装置
公开(公告)号：US06770968B2
公开(公告)日：2004-08-03
申请号：US10369778
申请日：2003-02-19
申请人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
发明人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
IPC分类号： H01L2334
CPC分类号： B29C59/14 , H01L21/56 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.
摘要翻译：一种用于将散热器粘合到封装的电子部件的方法包括以下步骤：（a）将形成在基底上的模制聚合物的表面暴露于等离子体; （b）允许等离子体至少部分地将表面上的含硅残余物转化为二氧化硅; 和（c）通过在制品和表面之间施加贴附物将物品粘合到表面上。通常，含硅残渣是使用常规粘合方法和材料的硅油，脱模剂，可以防止形成粘结。形成在模塑聚合物表面上的二氧化硅层有助于形成适当的键。等离子体可以是氧等离子体，并且粘合剂可以选自具有金属氧化物填料的热固化的硅氧烷基糊状粘合剂或浸渍有粘合剂的热固化多孔聚合物膜。特别地，膜可以是聚四氟乙烯，粘合剂可以是聚丁二烯，并且该膜可以进一步用金属氧化物传热介质如氧化锌浸渍。替代方法包括在不进行等离子体处理的情况下应用多孔聚合物膜并热固化膜以形成适当的键。

55. 发明授权

US06576996B2 Method for bonding heat sinks to overmolds and device formed thereby 有权
公开(公告)号：US06576996B2
公开(公告)日：2003-06-10
申请号：US09757159
申请日：2001-01-09
申请人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
发明人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
IPC分类号： H01L2334
CPC分类号： B29C59/14 , H01L21/56 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.

56. 发明授权

US06569710B1 Panel structure with plurality of chip compartments for providing high volume of chip modules 失效
标题翻译：具有多个芯片隔间的面板结构，用于提供大量的芯片模块
公开(公告)号：US06569710B1
公开(公告)日：2003-05-27
申请号：US09205407
申请日：1998-12-03
申请人： Mark V. Pierson
发明人： Mark V. Pierson
IPC分类号： H01L2144
CPC分类号： H01L24/97 , H01L23/5385 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/00
摘要： A method of forming a plurality of individual semiconductor chip modules wherein a plurality of chips are placed in a plurality of chip compartments formed by adhering a support panel to the first surface and a cover panel to the second surface of a stiffener panel having openings defining sidewalls of the chip compartments. The resulting laminated panel structure is then cut into a plurality of modules each having at least one compartment containing at least one chip. Each chip is electrically connected to interior conductive pads on the inner surface of the support panel, and these interior pads in turn are connected by conductive paths to exterior conductive terminals deposited on the outer surface of the support panel. The electrical connections between the chip and the interior conductive pads of the support panel may be encapsulated in a polymeric material before the cover panel is adhered to the stiffener panel.
摘要翻译：一种形成多个单独的半导体芯片模块的方法，其中将多个芯片放置在通过将支撑板粘附到第一表面而形成的多个芯片隔室中，并且将盖板覆盖到具有限定侧壁的开口的加强板的第二表面的芯片隔间。然后将所得的层压板结构切成多个模块，每个模块具有至少一个包含至少一个芯片的隔室。每个芯片电连接到支撑板的内表面上的内部导电焊盘，并且这些内部衬垫又通过导电路径连接到沉积在支撑板的外表面上的外部导电端子。在盖板粘附到加强板之前，芯片和支撑板的内部导电焊盘之间的电连接可被封装在聚合材料中。

57. 发明授权

US06534848B1 Electrical coupling of a stiffener to a chip carrier 有权
公开(公告)号：US06534848B1
公开(公告)日：2003-03-18
申请号：US09657194
申请日：2000-09-07
申请人： Terry J. Dornbos , Raymond A. Phillips, Jr. , Mark V. Pierson , William J. Rudik , David L. Thomas
发明人： Terry J. Dornbos , Raymond A. Phillips, Jr. , Mark V. Pierson , William J. Rudik , David L. Thomas
IPC分类号： H01L2302
CPC分类号： H05K3/0061 , H01L21/4846 , H05K3/386 , H05K3/4038 , H05K2201/0305 , H05K2201/09554 , H05K2201/10977
摘要： A method and structure for conductively coupling a metallic stiffener to a chip carrier. A substrate has a conductive pad on its surface and an adhesive layer is formed on the substrate surface. The metallic stiffener is placed on the adhesive layer, wherein the adhesive layer mechanically couples the stiffener to the substrate surface and electrically couples the stiffener to the pad. The adhesive layer is then cured such as by pressurization at elevated temperature. Embodiments of the present invention form the adhesive layer by forming an electrically conductive contact on the pad and setting a dry adhesive on the substrate, such that the electrically conductive contact is within a hole in the dry adhesive. The electrically conductive contact electrically couples the stiffener to the pad. The curing step includes curing both the dry adhesive and the electrically conductive contact, resulting in the dry adhesive adhesively coupling the stiffener to the substrate. The electrically conductive contact may include an electrically conductive adhesive or a metallic solder. Additional embodiments of the present invention form the adhesive layer by applying an electrically conductive adhesive on the substrate, wherein after the stiffener is placed on the adhesive layer, the electrically conductive adhesive mechanically and electrically couples the stiffener to the surface of the substrate.

58. 发明授权

US06513701B2 Method of making electrically conductive contacts on substrates 失效
公开(公告)号：US06513701B2
公开(公告)日：2003-02-04
申请号：US09879222
申请日：2001-06-12
申请人： Donald I. Mead , Mark V. Pierson
发明人： Donald I. Mead , Mark V. Pierson
IPC分类号： B23K2622
CPC分类号： H05K3/3484 , B23K1/0053 , B23K1/0056 , B23K2101/40 , H05K3/3494 , H05K2203/043 , H05K2203/0557 , H05K2203/107
摘要： A method of making an electrically conductive contact on a substrate by applying a layer of solder paste to a circuitized feature on a substrate and selectively heating and melting the solder paste over the feature to form a solder bump. The excess solder paste is removed. A focused energy heat source such as a laser beam or focused Infrared heats the solder paste. A reflective mask with apertures may be used to allow focused heating source to selectively melt areas of the solder paste layer applied to a circuitized feature. The mask and excess solder paste are removed.

59. 发明授权

US06497943B1 Surface metal balancing to reduce chip carrier flexing 失效
标题翻译：表面金属平衡，减少芯片载体弯曲
公开(公告)号：US06497943B1
公开(公告)日：2002-12-24
申请号：US09503395
申请日：2000-02-14
申请人： Lisa J. Jimarez , Miguel A. Jimarez , Mark V. Pierson
发明人： Lisa J. Jimarez , Miguel A. Jimarez , Mark V. Pierson
IPC分类号： B32B300
CPC分类号： B32B15/08 , B32B15/20 , B32B17/10229 , B32B2250/40 , B32B2425/00 , H01L23/142 , H01L23/49822 , H01L2224/16225 , H01L2924/00014 , H01L2924/01322 , H05K1/0271 , H05K3/4602 , H05K2201/0949 , H05K2201/09781 , H05K2201/10674 , H05K2201/10734 , Y10T428/24917 , H01L2924/00 , H01L2224/0401
摘要： A surface metal balancing structure for a chip carrier, and an associated method of fabrication, to reduce or eliminate thermally induced chip carrier flexing. A substrate, such as a chip carrier made of organic dielectric material, is formed and includes: internal circuitization layers, a plated through hole, and outer layers comprised of an allylated polyphenylene ether. A stiffener ring for mechanically stabilizing the substrate is bonded to an outer portion, such as an outer perimeter portion, of the top surface of the substrate, in light of the soft and conformal organic material of the substrate. The top and bottom surfaces of the substrate have metal structures, such as copper pads and copper circuitization, wherein a surface area (A) multiplied by a coefficient of thermal expansion (C) is greater for the metal structure at the bottom surface than for the metal structure at the top surface. A metal pattern is adjacent to the top surface so as to make the product AC of metal structures at or near the top and bottom surfaces approximately equal. The metal pattern reduces or eliminates flexing of the substrate in an elevated temperature environment, such as during a reflow of solder that couples a semiconductor chip to the substrate.
摘要翻译：用于芯片载体的表面金属平衡结构以及相关的制造方法，以减少或消除热诱导的芯片载体弯曲。形成诸如由有机电介质材料制成的芯片载体的衬底，其包括：内部电路层，电镀通孔和由烯丙基化聚苯醚构成的外层。根据衬底的软和保形有机材料，用于机械稳定衬底的加强环被结合到衬底的顶表面的外部部分，例如外周部分。衬底的顶表面和底表面具有诸如铜焊盘和铜电路的金属结构，其中在底表面处的金属结构的表面积（A）乘以热膨胀系数（C）大于对于金属结构在顶面。金属图案与顶表面相邻，以使金属结构的产品AC在顶表面和底表面处或附近大致相等。金属图案减少或消除了在升高的温度环境中的衬底的弯曲，例如在将半导体芯片耦合到衬底的焊料的回流期间。

60. 发明授权

US06492071B1 Wafer scale encapsulation for integrated flip chip and surface mount technology assembly 失效
标题翻译：用于集成倒装芯片和表面贴装技术组装的晶圆级封装
公开(公告)号：US06492071B1
公开(公告)日：2002-12-10
申请号：US09670410
申请日：2000-09-26
申请人： William E. Bernier , Mark V. Pierson , Ajit K. Trivedi
发明人： William E. Bernier , Mark V. Pierson , Ajit K. Trivedi
IPC分类号： G03F900
CPC分类号： H01L21/56 , H01L24/81 , H01L2224/274 , H01L2224/81801 , H01L2224/83191 , H01L2924/14 , H05K3/1225 , H01L2924/00
摘要： A device and process for applying mixtures of adhesive formulations combined with solder flux such that flip chips may be rapidly encapsulated with such combinations without interfering with subsequent wafer processing steps are provided. Also provided is a wafer stencil designed in such a manner that the saw kerf lines separating individual chip dies are protected from coming into contact with the formulation. Extrusion screening using such wafer stencil is also provided.
摘要翻译：提供了一种用于施加与焊料助焊剂组合的粘合剂制剂的混合物的装置和方法，使得可以用这种组合快速包封倒装芯片而不干扰后续的晶片加工步骤。还提供了以这样的方式设计的晶片模板，即分离各个芯片模具的锯切线不受制剂的接触。还提供了使用这种晶片模板的挤出筛选。

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