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51. 发明申请

US20090316799A1 Image Processing Circuit and Associated Method 有权
标题翻译：图像处理电路及相关方法
公开(公告)号：US20090316799A1
公开(公告)日：2009-12-24
申请号：US12480126
申请日：2009-06-08
申请人： Chung-Yi Chen , Su-Chun Wang
发明人： Chung-Yi Chen , Su-Chun Wang
IPC分类号： H04N11/02
CPC分类号： H04N19/436 , H04N19/43
摘要： An image processing circuit includes a compression circuit, a plurality of first line buffers, a decompression circuit, and a motion estimation/compensation circuit. The compression circuit receives source image data and compresses the received source image data to generate a compressed image data. The first line buffers, coupled to the compression circuit, sequentially receive the compressed image data and buffer the compressed image data. The decompression circuit, coupled to the first line buffers, decompresses the compressed image data to generate a decompressed image data. The motion estimation/compression circuit, coupled to the decompression circuit, performs motion estimation/compensation according to the decompressed image data.
摘要翻译：图像处理电路包括压缩电路，多个第一行缓冲器，解压缩电路和运动估计/补偿电路。压缩电路接收源图像数据并压缩接收到的源图像数据以产生压缩图像数据。耦合到压缩电路的第一行缓冲器顺序地接收压缩的图像数据并缓冲压缩的图像数据。耦合到第一行缓冲器的解压缩电路解压缩压缩的图像数据以产生解压缩的图像数据。耦合到解压缩电路的运动估计/压缩电路根据解压缩的图像数据执行运动估计/补偿。

52. 发明申请

US20090316044A1 Method and Associated Apparatus for Determining Motion Vectors 有权
标题翻译：用于确定运动矢量的方法和相关装置
公开(公告)号：US20090316044A1
公开(公告)日：2009-12-24
申请号：US12366684
申请日：2009-02-06
申请人： Chung-Yi Chen , Su Chun Wang
发明人： Chung-Yi Chen , Su Chun Wang
IPC分类号： H04N7/01
CPC分类号： H04N5/145 , H04N7/014 , H04N19/51 , H04N19/577
摘要： A method and an associated apparatus for determining a motion vector are disclosed. The method includes performing block matching for a first block where an interpolated block is located according to the first frame and the second frame to generate a first candidate motion vector of the interpolated block, performing block matching for a second block where the interpolated block is located according to the first frame and the second frame to generate a second candidate motion vector of the interpolated block, and determining a target motion vector of the interpolated block according to either of the first motion vector and the second candidate motion vector.
摘要翻译：公开了一种用于确定运动矢量的方法和相关联的装置。该方法包括根据第一帧和第二帧对内插块所位于的第一块执行块匹配，以生成内插块的第一候选运动矢量，对内插块所在的第二块执行块匹配根据第一帧和第二帧，生成内插块的第二候选运动矢量，根据第一运动矢量和第二候选运动矢量中的任一个确定内插块的目标运动矢量。

53. 发明申请

US20090167935A1 IMAGE PROCESSING METHOD AND RELATED APPARATUS FOR GENERATING TARGET IMAGE BLOCK 有权
标题翻译：用于产生目标图像块的图像处理方法和相关装置
公开(公告)号：US20090167935A1
公开(公告)日：2009-07-02
申请号：US12188217
申请日：2008-08-08
申请人： Chung-Yi Chen , Su-Chun Wang
发明人： Chung-Yi Chen , Su-Chun Wang
IPC分类号： H04N5/14
CPC分类号： H04N5/144 , H04N7/0132
摘要： An image processing method of generating a target image block of a position to be currently interpolated in an interpolated frame between two frames includes: performing a motion estimation for generating a motion vector by referring to a plurality of image blocks of the two frames and generating a first image block according to the motion vector; generating a second image block according to two image blocks which are respectively in the two frames and both correspond to the position to be currently interpolated; and generating the target image block according to the first image block and the second image block.
摘要翻译：一种用于在两帧之间的内插帧中产生当前内插的位置的目标图像块的图像处理方法包括：通过参考两帧的多个图像块来执行用于生成运动矢量的运动估计，第一图像块根据运动矢量; 根据分别在两帧中的两个图像块产生第二图像块，并且都对应于当前被内插的位置; 以及根据第一图像块和第二图像块生成目标图像块。

54. 发明申请

US20080310749A1 Method and apparatus for image processing 有权
标题翻译：图像处理方法和装置
公开(公告)号：US20080310749A1
公开(公告)日：2008-12-18
申请号：US12155452
申请日：2008-06-04
申请人： Ming-Hao Liao , Jen-Shi Wu , Chung-Yi Chen
发明人： Ming-Hao Liao , Jen-Shi Wu , Chung-Yi Chen
IPC分类号： G06K9/40
CPC分类号： G06T5/003 , G06T7/12 , G06T2207/10016 , G06T2207/10024 , G06T2207/20012 , G06T2207/20021 , G06T2207/20192 , H04N5/142 , H04N9/78
摘要： An image processing method and an image processing apparatus are provided. After receiving an image signal, the image and apparatus according to the invention first judge whether a target block in the image signal includes a non-chroma line. If the judging result is YES, a first edge detection procedure will be performed on the non-chroma line. If the judging result is NO, a second edge detection procedure will be performed on the target block.
摘要翻译：提供了图像处理方法和图像处理装置。在接收到图像信号之后，根据本发明的图像和装置首先判断图像信号中的目标块是否包括非色度线。如果判断结果为是，则对非色度线进行第一边缘检测处理。如果判断结果为否，则对目标块执行第二边缘检测处理。

55. 发明申请

US20080073688A1 One-Transistor Random Access Memory Technology Compatible with Metal Gate Process 有权
标题翻译：金属栅极工艺兼容的单晶硅随机存取技术
公开(公告)号：US20080073688A1
公开(公告)日：2008-03-27
申请号：US11836710
申请日：2007-08-09
申请人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , Jian-Yu Shen , Chun-Yao Chen , Hsiang-Fan Lee
发明人： Kuo-Chi Tu , Kuo-Chyuan Tzeng , Chung-Yi Chen , Jian-Yu Shen , Chun-Yao Chen , Hsiang-Fan Lee
IPC分类号： H01L27/108
CPC分类号： H01L27/10861 , H01L27/10873
摘要： One-transistor RAM technology compatible with a metal gate process fabricates a metal gate electrode formed of the same metal material as a top electrode of a MIM capacitor embedded isolation structure. A gate dielectric layer is formed of the same high-k dielectric material as a capacitor dielectric of the MIM capacitor embedded isolation structure.
摘要翻译：与金属栅极工艺兼容的单晶体管RAM技术制造由与MIM电容器嵌入式隔离结构的顶部电极相同的金属材料形成的金属栅电极。栅极电介质层由与MIM电容器嵌入式隔离结构的电容器电介质相同的高k电介质材料形成。

56. 发明申请

US20070052003A1 Method for producing a memory with high coupling ratio 审中-公开
标题翻译：具有高耦合比的存储器的制造方法
公开(公告)号：US20070052003A1
公开(公告)日：2007-03-08
申请号：US11272685
申请日：2005-11-15
申请人： Chih-Ping Chung , Chun-Nan Lin , Chung-Yi Chen , Hung-Kwei Liao
发明人： Chih-Ping Chung , Chun-Nan Lin , Chung-Yi Chen , Hung-Kwei Liao
IPC分类号： H01L21/336
CPC分类号： H01L29/42324 , H01L29/40114
摘要： A method for producing a memory with high coupling ratio is provided. First, a shallow trench isolation is formed on a substrate to define an active area. Second, a spacer is formed at the sidewall of the shallow trench isolation. Third, the shallow trench isolation is etched such that the top of the spacer is higher than the surface of the shallow trench isolation. Fourth, a tunnel oxide is formed on the active area. Finally, a floating gate is formed on the tunnel oxide.
摘要翻译：提供了一种制造具有高耦合比的存储器的方法。首先，在衬底上形成浅沟槽隔离以限定有源区域。第二，在浅沟槽隔离物的侧壁处形成间隔物。第三，浅沟槽隔离被蚀刻，使得间隔物的顶部高于浅沟槽隔离的表面。第四，在有源区上形成隧道氧化物。最后，在隧道氧化物上形成浮栅。

57. 发明授权

US06207579B1 Method of fabricating self-aligned node 失效
标题翻译：制造自对准节点的方法
公开(公告)号：US06207579B1
公开(公告)日：2001-03-27
申请号：US09286357
申请日：1999-04-05
申请人： Terry Chung-Yi Chen
发明人： Terry Chung-Yi Chen
IPC分类号： H01L213065
CPC分类号： H01L27/10885 , H01L21/76877 , H01L21/76895 , H01L27/10814 , H01L27/10855 , H01L27/10888 , H01L28/75
摘要： A method of fabricating a self-aligned storage node is described. A storage node plug is formed after formations of the bit line contact and the storage node contact. A spacer is formed on a sidewall of an opening, which is used for forming a bit line. The bit line is formed in the opening. Because the spacer provides good isolation, the tolerance window for forming the bit line is increased. Some follow-up steps are performed to form a storage node.
摘要翻译：描述了制造自对准存储节点的方法。在位线接触和存储节点接触的结构之后形成存储节点插头。间隔件形成在用于形成位线的开口的侧壁上。位线在开口处形成。因为间隔物提供良好的隔离，所以用于形成位线的公差窗口增加。执行一些后续步骤以形成存储节点。

58. 发明授权

US06194266B1 Method for forming a capacitor having selective hemispherical grained polysilicon 有权
标题翻译：用于形成具有选择性半球形多晶硅的电容器的方法
公开(公告)号：US06194266B1
公开(公告)日：2001-02-27
申请号：US09511656
申请日：2000-02-22
申请人： Terry Chung-Yi Chen , Cheng-Chih Kung , Da-Wen Hsia , Cheng-Chieh Huang
发明人： Terry Chung-Yi Chen , Cheng-Chih Kung , Da-Wen Hsia , Cheng-Chieh Huang
IPC分类号： H01L218242
CPC分类号： H01L28/84 , H01L27/10852 , Y10S438/964
摘要： A method for forming a capacitor containing selective hemispherical grained (S-HSG) polysilicon is disclosed. In this invention, dopant implantation is incorporated after the S-HSG growth to replace conventional wet clean procedure. The elimination of the cleaning treatments avoids the incidents of residue particles (due to cleaning) and minimizes numerous structure defects. The incorporation of the ion implantation technique would make up the insufficiency of doping requirement by applying in-diffusion alone. The combination of the in-diffusion and the implantation for doping procedure could maintain the device with good capacitance level even though the pre-clean procedure is excluded.
摘要翻译：公开了一种形成包含选择性半球晶粒（S-HSG）多晶硅的电容器的方法。在本发明中，在S-HSG生长之后掺入掺杂剂注入以代替常规的湿式清洁程序。消除清洁处理可以避免残留颗粒的发生（由于清洁），并最大限度地减少许多结构缺陷。离子注入技术的并入将通过单独使用扩散扩散来弥补掺杂需求的不足。扩散和掺杂过程的注入的组合可以保持器件具有良好的电容水平，即使排除了预清洁程序。

59. 发明授权

US6146987A Method for forming a contact plug over an underlying metal line using an etching stop layer 有权
标题翻译：使用蚀刻停止层在下面的金属线上形成接触塞的方法
公开(公告)号：US6146987A
公开(公告)日：2000-11-14
申请号：US383123
申请日：1999-08-25
申请人： Chien-chun Wang , Eddie Chiu , Chung-Yi Chen , Hsien-Yuan Chang
发明人： Chien-chun Wang , Eddie Chiu , Chung-Yi Chen , Hsien-Yuan Chang
IPC分类号： H01L21/768 , H01L21/4763
CPC分类号： H01L21/76802 , H01L21/76834
摘要： A method for forming a contact plug that lands on a metal line of an interconnect structure formed on a semiconductor substrate. First, a first insulating layer is formed atop the substrate and between gaps in the interconnect structure. Next, an etching stop layer is formed on the first insulating layer. A second insulating layer is formed atop the etching stop layer. The second insulating layer is patterned and etched, stopping at the etching stop layer, to form a contact opening. The portion of the etching stop layer left exposed by the contact opening is removed. Finally, a barrier metal layer is formed along the walls of the contact opening and a conducting layer is deposited into the contact opening.
摘要翻译：一种形成在半导体衬底上形成的互连结构的金属线上的接触插塞的方法。首先，在基板顶部和互连结构的间隙之间形成第一绝缘层。接下来，在第一绝缘层上形成蚀刻停止层。第二绝缘层形成在蚀刻停止层的顶部。对第二绝缘层进行图案化和蚀刻，在蚀刻停止层处停止形成接触开口。除去由接触开口露出的蚀刻停止层的部分。最后，沿着接触开口的壁形成阻挡金属层，并且导电层沉积到接触开口中。

60. 发明授权

US09215437B2 Passive 3D image system and image processing method thereof 有权
标题翻译：被动3D图像系统及其图像处理方法
公开(公告)号：US09215437B2
公开(公告)日：2015-12-15
申请号：US13241720
申请日：2011-09-23
申请人： Chung-Yi Chen
发明人： Chung-Yi Chen
IPC分类号： H04N13/00 , H04N13/04
CPC分类号： H04N13/106 , H04N13/337
摘要： A passive 3D image system includes a passive 3D image display apparatus, a scaling module and a luminance adjusting module. The 3D passive image display apparatus includes N rows of display units. After receiving an original image including N rows of original data, the scaling module merges the N rows of original data to generate a scaled image including N/2 rows of scaled data. The original image is either a left-eye image or a right-eye image. The luminance adjusting module adjusts the N/2 rows of scaled data to increase the luminance of the scaled image.
摘要翻译：被动3D图像系统包括被动3D图像显示装置，缩放模块和亮度调节模块。 3D无源图像显示装置包括N行显示单元。缩放模块收到包含N行原始数据的原始图像后，合并N行原始数据，生成包含N / 2行缩放数据的缩放图像。原始图像是左眼图像或右眼图像。亮度调整模块调整缩放数据的N / 2行以增加缩放图像的亮度。

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