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41. 发明授权

US06609297B1 Method of manufacturing multilayer printed wiring board 有权
标题翻译：多层印刷线路板的制造方法
公开(公告)号：US06609297B1
公开(公告)日：2003-08-26
申请号：US09581298
申请日：2000-06-12
申请人： Yasuji Hiramatsu , Motoo Asai , Naohiro Hirose , Takashi Kariya
发明人： Yasuji Hiramatsu , Motoo Asai , Naohiro Hirose , Takashi Kariya
IPC分类号： H01K310
CPC分类号： H05K3/4679 , H05K1/0269 , H05K3/0008 , H05K3/0035 , H05K3/0082 , H05K3/421 , H05K3/4652 , H05K3/4655 , H05K2201/09781 , H05K2201/09918 , H05K2203/0554 , Y10S430/146 , Y10T29/49004 , Y10T29/49082 , Y10T29/49085 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A board 20 is provided with a Cu film 30 as a conformal mask, in which are formed a register mark 30b and an opening 3a through which a via hole is formed. A camera senses this register mark 30b so that the position of the board 30 is determined. A laser beam is directed to the approximate position of the opening 30a, so that the opening 26a through which the via hole is drilled is formed. The accuracy of the position of the opening of the via hole depends on the accuracy of the position of the opening 30a in the Cu film 30 as the conformal mask. Therefore, the via hole can be formed at an adequate position despite the low accuracy of the position for laser irradiation.
摘要翻译：板20设置有作为保形掩模的Cu膜30，其中形成有对准标记30b和形成通孔的开口3a。摄像机感测该对准标记30b，从而确定板30的位置。激光束被引导到开口30a的近似位置，从而形成通孔穿过的开口26a。通孔的开口的位置的精度取决于作为保形掩模的Cu膜30中的开口30a的位置的精度。因此，尽管激光照射位置的精度低，但是通孔可以形成在适当的位置。

42. 发明申请

US20030146196A1 LASER BEAM MACHINING METHOD FOR WIRING BOARD, LASER BEAM MACHINING APPARATUS FOR WIRING BOARD, AND CARBONIC ACID GAS LASER OSCILLATOR FOR MACHINING WIRING BOARD 无效
标题翻译：接线板激光束加工方法，接线板激光加工装置及加工导线板用碳酸气体激光振荡器
公开(公告)号：US20030146196A1
公开(公告)日：2003-08-07
申请号：US08690140
申请日：1996-07-31
发明人： MIKI KUROSAWA , TSUKASA FUKUSHIMA , MASANORI MIZUNO , SHOZUI TAKENO , MASAHARU MORIYASU , MASAYUKI KANEKO
IPC分类号： B23K026/38
CPC分类号： H05K3/0032 , H05K2203/0554 , H05K2203/081
摘要： In a laser beam machining method for a wiring board, a machined portion of the wiring board is irradiated with a pulsed laser beam for a beam irradiation time ranging from about 10 to about 200 nulls and with energy density of about 20 J/cm2 or more, thereby machining the wiring board, for example, drilling for a through-hole and a blind via hole, grooving, and cutting for an outside shape.
摘要翻译：在布线基板的激光加工方法中，用脉冲激光束照射线束板的加工部分，射束照射时间为约10〜约200μA，能量密度为约20J / cm 2以上，从而对布线板进行加工，例如钻孔用于通孔和盲孔，切槽和切割用于外部形状。

43. 发明授权

US06570102B2 Structure for high speed printed wiring boards with multiple differential impedance-controlled layer 失效
公开(公告)号：US06570102B2
公开(公告)日：2003-05-27
申请号：US09878533
申请日：2001-06-11
申请人： Thomas Richard Miller , Konstantinos I. Papathomas , Brian Eugene Curcio , Joseph J. Sniezek
发明人： Thomas Richard Miller , Konstantinos I. Papathomas , Brian Eugene Curcio , Joseph J. Sniezek
IPC分类号： H01R1204
CPC分类号： H01L23/49822 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , H05K1/0237 , H05K3/246 , H05K3/4069 , H05K3/4623 , H05K3/4652 , H05K2201/0347 , H05K2201/0352 , H05K2201/0355 , H05K2203/0554 , Y10T29/4913 , H01L2924/00
摘要： A method and arrangement for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, there are provided vias of either through-holes, blind holes and buried holes filled with a conductive paste material to form electrical interconnections with conductive layers of the printed wiring board.

44. 发明申请

US20030071014A1 Method for manufacturing solder mask of printed circuit board 审中-公开
公开(公告)号：US20030071014A1
公开(公告)日：2003-04-17
申请号：US10155027
申请日：2002-05-28
申请人： S&S Technology Corporation
发明人： Chong-Ren Maa , Wan-Kuo Chih , Ming-Sung Tsai
IPC分类号： C03C015/00 , B44C001/22
CPC分类号： H05K3/0041 , H01L23/49816 , H01L23/49822 , H01L23/49894 , H01L2924/0002 , H05K3/0094 , H05K3/28 , H05K2201/0191 , H05K2201/0959 , H05K2203/0152 , H05K2203/0376 , H05K2203/0554 , H05K2203/066 , H05K2203/1152 , Y10T29/49126 , Y10T29/49144 , Y10T29/49147 , Y10T29/49149 , Y10T29/49151 , Y10T29/49155 , Y10T29/49156 , Y10T428/24917 , H01L2924/00
摘要： A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

45. 发明申请

US20030029729A1 Method of fabricating inter-layer solid conductive rods 有权
标题翻译：制造层间固体导电棒的方法
公开(公告)号：US20030029729A1
公开(公告)日：2003-02-13
申请号：US09927723
申请日：2001-08-10
发明人： Jao-Chin Cheng , Chang-Chin Hsieh , Chih-Peng Fan , Chih-Hao Yeh
IPC分类号： C25D005/02 , C25D005/34 , C25D005/52
CPC分类号： H05K3/423 , C25D1/003 , H05K3/0035 , H05K3/4602 , H05K2201/0355 , H05K2201/0394 , H05K2203/025 , H05K2203/0554 , H05K2203/0733
摘要： A method of forming a solid inter-layer conductive rod. A printed circuit board comprising an insulating core layer, a first conductive layer and a second conductive layer is provided. The insulating core layer is sandwiched between the first conductive layer and the second conductive layer. A first opening that exposes a portion of the insulating core layer is formed in the first conductive layer. The exposed insulating core layer is removed by laser drilling to form a second opening that exposes a portion of the second conductive layer. An electroplating process is conducted using the second conductive layer as a negative electrode so that conductive material solidly fills the first opening and the second opening to form a solid conductive rod.
摘要翻译：形成固体层间导电棒的方法。提供了包括绝缘芯层，第一导电层和第二导电层的印刷电路板。绝缘芯层夹在第一导电层和第二导电层之间。在第一导电层中形成露出绝缘芯层的一部分的第一开口。暴露的绝缘芯层通过激光钻孔去除以形成露出第二导电层的一部分的第二开口。使用第二导电层作为负极进行电镀工艺，使得导电材料牢固地填充第一开口和第二开口以形成固体导电棒。

46. 发明申请

US20020182832A1 Method and article for filling apertures in a high performance electronic substrate 失效
公开(公告)号：US20020182832A1
公开(公告)日：2002-12-05
申请号：US10198388
申请日：2002-07-17
发明人： Donald S. Farquhar , Konstantinos I. Papathomas
IPC分类号： H01L021/20
CPC分类号： H01L21/486 , H01L23/49883 , H01L2924/0002 , H05K3/0094 , H05K3/4069 , H05K3/4602 , H05K2201/0347 , H05K2201/0959 , H05K2203/0152 , H05K2203/0156 , H05K2203/0278 , H05K2203/0338 , H05K2203/0554 , H05K2203/1461 , H01L2924/00
摘要： The present invention provides a method of filling an at least one aperture in a semiconductor substrate by placing a sacrificial carrier structure on a surface of the substrate, wherein the structure comprises, a first layer, a fill material over the first layer, and a mask over the fill material having at least one opening therein, such that the opening at least partially aligns with the aperture in the substrate. Thereafter, the fill material is forced into the aperture by the application of heat and pressure, and the sacrificial carrier structure is removed.

47. 发明授权

US06469256B1 Structure for high speed printed wiring boards with multiple differential impedance-controlled layers 失效
标题翻译：具有多个差分阻抗控制层的高速印刷线路板的结构
公开(公告)号：US06469256B1
公开(公告)日：2002-10-22
申请号：US09495628
申请日：2000-02-01
申请人： Thomas R. Miller , William J. Rudik , Robert J. Testa , Kevin P. Unger , Michael Wozniak
发明人： Thomas R. Miller , William J. Rudik , Robert J. Testa , Kevin P. Unger , Michael Wozniak
IPC分类号： H05K103
CPC分类号： H05K3/4623 , H01L23/49822 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , H05K1/0237 , H05K3/246 , H05K3/4069 , H05K3/4652 , H05K2201/0347 , H05K2201/0352 , H05K2201/0355 , H05K2203/0554 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： A method for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, disclosed is the provision of a method for producing an impedance controlled printed circuit wiring board. Also, there is the provision of a method for producing high speed printed wiring boards with multiple differential impedance controlled layers.
摘要翻译：一种用于产生阻抗控制印刷线路板的方法，特别是形成包含多个差分阻抗控制层的高速印刷线路板的结构。此外，公开了提供一种制造阻抗控制印刷电路布线板的方法。此外，提供了一种用于生产具有多个差分阻抗控制层的高速印刷线路板的方法。

48. 发明申请

US20020135104A1 Heated filling method 失效
标题翻译：加热灌装方法
公开(公告)号：US20020135104A1
公开(公告)日：2002-09-26
申请号：US10026382
申请日：2001-12-20
发明人： Jesse Pedigo , Timothy Meyer
IPC分类号： B23K031/02
CPC分类号： H05K3/1233 , H05K3/0094 , H05K3/4053 , H05K3/4069 , H05K2201/0959 , H05K2201/10204 , H05K2203/0126 , H05K2203/0139 , H05K2203/0156 , H05K2203/0182 , H05K2203/0554 , H05K2203/1105
摘要： A filling system includes a pressurized source of fill material and a pressure fill head wherein the fill head also includes a heating element positioned so as to transfer heat to fill material passing through the fill head. A method of filling holes using a fill material passing through a pressure fill head includes the steps of causing fill material to enter the fill head, modifying the viscosity of the fill material while it is within the fill head, and causing the modified viscosity fill material to exit the fill head and enter at least one hole.
摘要翻译：填充系统包括加压填充源和压力填充头，其中填充头还包括加热元件，其被定位成传递热量以填充通过填充头的材料。使用通过压力填充头的填充材料填充孔的方法包括以下步骤：使填充材料进入填充头，在填充头内部改变填充材料的粘度，并且使改性粘度填充材料退出填充头并进入至少一个孔。

49. 发明授权

US06391210B2 Process for manufacturing a multi-layer circuit board 失效
标题翻译：制造多层电路板的工艺
公开(公告)号：US06391210B2
公开(公告)日：2002-05-21
申请号：US09901848
申请日：2001-07-09
申请人： Bernd K. Appelt , John M. Lauffer , Voya R. Markovich , Irving Memis , David J. Russell
发明人： Bernd K. Appelt , John M. Lauffer , Voya R. Markovich , Irving Memis , David J. Russell
IPC分类号： H01B1300
CPC分类号： H05K3/4652 , H05K3/0023 , H05K3/0035 , H05K2203/0508 , H05K2203/0554
摘要： A circuit board having a structure including a permanent photoimageable dielectric material suitable for fabrication of vias both by laser ablation, plasma ablation, or mechanical drilling techniques and by photoimaging techniques. A process is also disclosed for the manufacture of a multi-level circuit on a substrate having a first-level circuitry pattern on at least one side. The process comprises applying a permanent photoimageable dielectric over the first-level circuitry pattern; exposing the permanent photoimageable dielectric to radiation; laminating a conductive metal layer to the dielectric; making holes in the conductive metal layer and dielectric by mechanical drilling or by laser or plasma ablation; and making a second-level circuitry pattern and filling the holes with a conductive material to electrically connect the first and second layers of circuitry. A further process is claimed for designing a multi-level circuit board product comprising making a prototype having the above structure in which the holes are manufactured by mechanical drilling or by laser or plasma ablation, evaluating the prototype, and then manufacturing a commercial circuit board having essentially the same structure and materials of construction as the prototype, but wherein the holes are manufactured by photoimaging techniques.
摘要翻译：一种电路板，其结构包括适用于通过激光烧蚀，等离子体消融或机械钻孔技术制造通孔的永久可光成像介电材料，以及通过光成像技术。还公开了一种用于在至少一侧具有第一级电路图案的衬底上制造多电平电路的工艺。该过程包括在第一级电路图案上施加永久可光成像电介质; 将永久可光成像电介质暴露于辐射; 将导电金属层层叠到电介质上; 通过机械钻孔或通过激光或等离子体消融在导电金属层和电介质中形成孔; 以及制作二级电路图案，并用导电材料填充所述孔，以电连接所述第一和第二层电路。要求设计多级电路板产品的另一方法包括制造具有上述结构的原型，其中通过机械钻孔或通过激光或等离子体烧蚀制造孔，评估原型，然后制造商业电路板，其具有基本上与原型相同的结构和结构材料，但是其中孔通过光成像技术制造。

50. 发明授权

US06266874B1 Methods of making microelectronic components having electrophoretically deposited layers 失效
标题翻译：制造具有电泳沉积层的微电子部件的方法
公开(公告)号：US06266874B1
公开(公告)日：2001-07-31
申请号：US09118735
申请日：1998-07-17
申请人： Thomas H. DiStefano , John W. Smith , Konstantine N. Karavakis , Zlata Kovac , Joseph Fjelstad
发明人： Thomas H. DiStefano , John W. Smith , Konstantine N. Karavakis , Zlata Kovac , Joseph Fjelstad
IPC分类号： H05K310
CPC分类号： H01R13/2414 , H01R12/714 , H05K1/0272 , H05K1/036 , H05K1/056 , H05K1/116 , H05K3/0032 , H05K3/445 , H05K3/462 , H05K3/4623 , H05K3/4641 , H05K2201/0382 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/09827 , H05K2201/10378 , H05K2203/0554 , H05K2203/0582 , H05K2203/135 , H05K2203/308 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of making a microelectronic component by providing a conductive element, providing a resist at selected locations on said conductive element and electrophoretically depositing an uncured dielectric material on the conductive element, wherein the uncured material will be deposited on the conductive element except at locations covered by the resist. The deposited material is cured to form a dielectric layer and the resist is removed so that the dielectric layer has openings extending to the conductive element at locations the locations which were covered by the resist.
摘要翻译：一种通过提供导电元件制造微电子元件的方法，在所述导电元件上的选定位置提供抗蚀剂并在导电元件上电泳沉积未固化的介电材料，其中未固化的材料将沉积在导电元件上，除了覆盖的位置由抗蚀剂。固化沉积的材料以形成电介质层，并且去除抗蚀剂，使得电介质层具有在被抗蚀剂覆盖的位置的位置处延伸到导电元件的开口。

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