专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20100213534A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD FOR THE SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100213534A1
公开(公告)日：2010-08-26
申请号：US12709154
申请日：2010-02-19
申请人： Katsuyuki SEKINE , Katsuaki Natori , Tetsuya Kai , Yoshio Ozawa
发明人： Katsuyuki SEKINE , Katsuaki Natori , Tetsuya Kai , Yoshio Ozawa
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L27/11521 , H01L27/11519 , H01L29/40114 , H01L29/42336
摘要： In a nonvolatile semiconductor memory device provided with memory cell transistors, each of the memory cell transistors has a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and element isolation insulating films respectively. The floating gate electrode on the tunnel insulating film is provided with a first floating gate electrode and a second floating gate electrode formed sequentially from the bottom, the second floating gate electrode being narrower in a channel-width direction than the first one. Levels of upper surfaces of the element isolation insulating films and the first floating gate electrode are the same. The inter-electrode insulating film continuously covers the upper and side surfaces of the floating gate electrode and the upper surfaces of the element isolation insulating films, and is higher in a nitrogen concentration in a boundary portion to the floating gate electrode than in boundary portions to the element isolation insulating films.
摘要翻译：在设置有存储单元晶体管的非易失性半导体存储器件中，每个存储单元晶体管分别具有隧道绝缘膜，浮栅电极，电极间绝缘膜和元件隔离绝缘膜。隧道绝缘膜上的浮栅电极设置有从底部顺序形成的第一浮栅电极和第二浮栅电极，第二浮栅电极在沟道宽度方向比第一浮栅电极和第一浮栅电极窄。元件隔离绝缘膜和第一浮栅电极的上表面的电平相同。电极间绝缘膜连续地覆盖浮置栅电极的上表面和元件隔离绝缘膜的上表面，并且在与栅极电极的边界部分的氮浓度相比高于边界部分元件隔离绝缘膜。

42. 发明授权

US08198159B2 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08198159B2
公开(公告)日：2012-06-12
申请号：US12054089
申请日：2008-03-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/324 , H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

43. 发明申请

US20080176389A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080176389A1
公开(公告)日：2008-07-24
申请号：US12054089
申请日：2008-03-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/4763
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

44. 发明授权

US07294878B2 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07294878B2
公开(公告)日：2007-11-13
申请号：US11088947
申请日：2005-03-25
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L27/108
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中以限定多个元件形成区域;浮置栅极，通过第一栅极绝缘膜设置在每个元件形成区域上，通过第二栅极绝缘膜设置在浮置栅极上的控制栅极和设置在半导体衬底中的源极/漏极区域，其中至少在第二栅极绝缘膜和控制栅极之间的界面处设置相互扩散层。

45. 发明申请

US20070235799A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20070235799A1
公开(公告)日：2007-10-11
申请号：US11763070
申请日：2007-06-14
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

46. 发明申请

US20050212036A1 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20050212036A1
公开(公告)日：2005-09-29
申请号：US11088947
申请日：2005-03-25
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/8247 , G11C16/04 , H01L21/28 , H01L27/115 , H01L29/423 , H01L29/51 , H01L29/76 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中以限定多个元件形成区域;浮置栅极，通过第一栅极绝缘膜设置在每个元件形成区域上，通过第二栅极绝缘膜设置在浮置栅极上的控制栅极和设置在半导体衬底中的源极/漏极区域，其中至少在第二栅极绝缘膜和控制栅极之间的界面处设置相互扩散层。

47. 发明授权

US07368780B2 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07368780B2
公开(公告)日：2008-05-06
申请号：US11763070
申请日：2007-06-14
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

48. 发明申请

US20070284652A1 Semiconductor memory device 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20070284652A1
公开(公告)日：2007-12-13
申请号：US11783141
申请日：2007-04-06
申请人： Takuya Kobayashi , Katsuyuki Sekine , Yoshio Ozawa , Masayuki Tanaka
发明人： Takuya Kobayashi , Katsuyuki Sekine , Yoshio Ozawa , Masayuki Tanaka
IPC分类号： H01L29/792
CPC分类号： H01L29/513 , H01L29/40117 , H01L29/517
摘要： A semiconductor memory device capable of suppressing detrapping of stored charges from a charge storage dielectric is disclosed. According to one aspect of the present invention, there is provided a semiconductor memory device comprising a semiconductor substrate, a blocking dielectric disposed on the semiconductor substrate a charge storage dielectric disposed on the blocking dielectric to store holes, a hole conductive dielectric disposed on the charge storage dielectric, and a gate electrode disposed on the hole conductive dielectric.
摘要翻译：公开了能够抑制存储电荷从电荷存储电介质中去除的半导体存储器件。根据本发明的一个方面，提供了一种半导体存储器件，其包括半导体衬底，设置在半导体衬底上的阻挡电介质，设置在阻挡电介质上以存储孔的电荷存储电介质，设置在电荷上的导电电介质存储电介质和设置在导电电介质上的栅电极。

49. 发明申请

US20110303969A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20110303969A1
公开(公告)日：2011-12-15
申请号：US13052177
申请日：2011-03-21
申请人： Tetsuya KAI , Yoshio Ozawa , Ryota Fujitsuka , Yoshitaka Tsunashima
发明人： Tetsuya KAI , Yoshio Ozawa , Ryota Fujitsuka , Yoshitaka Tsunashima
IPC分类号： H01L29/792 , H01L21/20
CPC分类号： H01L29/66666 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory device with memory cells each composed of a vertical transistor, comprises a silicon layer formed into a columnar shape on a silicon substrate, a gate insulating film part in which a tunnel insulating film, a charge storage layer, and a block insulating film are formed to surround the sidewall surface of the silicon layer, and a stacked structure part formed to surround the sidewall surface of the gate insulating film part and in which a plurality of interlayer insulating films and a plurality of control gate electrode layers are stacked alternately. The silicon layer, gate insulating film part, and control gate electrode layer constitute the vertical transistor. The charge storage layer has a region lower in trap level than a region facing the control gate electrode layer between the vertical transistors.
摘要翻译：根据一个实施例，具有每个由垂直晶体管组成的存储单元的半导体存储器件包括在硅衬底上形成为柱状的硅层，其中隧道绝缘膜，电荷存储层，并且形成块状绝缘膜以包围硅层的侧壁表面，以及堆叠结构部分，其形成为围绕栅极绝缘膜部分的侧壁表面，并且其中多个层间绝缘膜和多个控制栅电极层交替堆叠。硅层，栅极绝缘膜部分和控制栅极电极层构成垂直晶体管。电荷存储层的陷阱水平低于垂直晶体管之间的面对控制栅极电极层的区域。

50. 发明授权

US08278696B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08278696B2
公开(公告)日：2012-10-02
申请号：US12425077
申请日：2009-04-16
申请人： Yoshio Ozawa , Ryota Fujitsuka
发明人： Yoshio Ozawa , Ryota Fujitsuka
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , H01L29/513 , H01L29/78
摘要： A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a charge storage insulating film formed on the tunnel insulating film and including at least two separated low oxygen concentration portions and a high oxygen concentration portion positioned between the adjacent low oxygen concentration portions and having a higher oxygen concentration than the low oxygen concentration portions, a charge block insulating film formed on the charge storage insulating film, and control gate electrodes formed on the charge block insulating film and above the low oxygen concentration portions.
摘要翻译：半导体器件包括形成在半导体衬底上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，并且包括至少两个分离的低氧浓度部分和位于相邻低氧浓度部分之间的高氧浓度部分，以及具有比低氧浓度部分更高的氧浓度，形成在电荷存储绝缘膜上的电荷块绝缘膜，以及形成在充电块绝缘膜上和低氧浓度部分上方的控制栅电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式