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    • 41. 发明申请
    • Solar cell module edge face sealing member and solar cell module employing same
    • 太阳能电池模块边缘密封件和采用其的太阳能电池模块
    • US20050115603A1
    • 2005-06-02
    • US10998087
    • 2004-11-29
    • Hiroyuki YoshidaYukio FukudaYuji SuzukiAkimasa Umemoto
    • Hiroyuki YoshidaYukio FukudaYuji SuzukiAkimasa Umemoto
    • H01L25/00H01L31/042H01L31/048
    • H01L31/048H02S30/10Y02E10/50
    • Edge face sealing member(s) may be roughly c-shaped in cross-section, may be frame-like in shape and formed in more or less parallel fashion with respect to outer shape(s) of solar cell module body or bodies, may comprise upper sealing region(s) abutting front surface(s) of solar cell module body or bodies, may further comprise lower sealing region(s) abutting back surface(s) of solar cell module body or bodies, and may further comprise side sealing region(s) abutting edge face(s) of solar cell module body or bodies. Furthermore, sealing region(s) may be roughly c-shaped in cross-section; may comprise upper sealing region(s) abutting front surface(s) of solar cell module body or bodies, lower sealing region(s) abutting back surface(s) of solar cell module body or bodies, and side sealing region(s) abutting edge face(s) of solar cell module body or bodies; may be of two-layer construction; and outer layer(s) may be hard, hardness(es) of inner layer(s) being less than that of outer layer(s); as a result of which there may be intimate contact even with nonflat and/or nonsmooth glass surface(s), permitting sealing.
    • 边缘密封构件的横截面可以是大致c形,可以是框架状的形状,并且相对于太阳能电池模块主体或主体的外部形状或多或少地平行地形成,可以 包括邻接太阳能电池模块主体或主体的前表面的上密封区域可以进一步包括邻接太阳能电池模块主体或主体的背面的下密封区域,并且还可以包括侧密封 太阳能电池组件主体或主体的邻接边缘区域。 此外,密封区域的横截面可以大致c形; 可以包括邻接太阳能电池模块主体或主体的前表面的上密封区域,与太阳能电池模块主体或主体的后表面相邻的下密封区域以及邻接的太阳能电池模块主体或主体的侧密封区域 太阳能电池组件主体或主体的边缘面; 可以是两层结构; 并且外层可以是硬的,内层的硬度小于外层的硬度; 其结果是即使具有非平坦和/或非光滑的玻璃表面也可能紧密接触,允许密封。
    • 43. 发明授权
    • Heat exchanger
    • 热交换器
    • US06705392B2
    • 2004-03-16
    • US10038656
    • 2002-01-08
    • Takaharu GotouHiroyuki Yoshida
    • Takaharu GotouHiroyuki Yoshida
    • F28F308
    • F28F9/0278C01B3/32C01B2203/1288F28D9/0062F28D9/0093F28D2021/0043F28D2021/0064H01M8/0612H01M8/0631H01M2250/20Y02T90/32
    • A plurality of water passages allowing flow of water, a plurality of alcohol passages allowing flow of alcohol and a plurality of high temperature gas passages heating the water passages and the alcohol passages are independently provided in a heat exchanging portion. Liquid alcohol is supplied from a first header to the alcohol passage and water is supplied from a second header to the water passage. The water passage is preferably adapted to make contact with a high temperature section of the high temperature gas passage and the alcohol passage is preferably adapted to make contact with the low temperature section of the high temperature gas passage. By separately vaporizing water and alcohol in this way, the mixing ratio of the water vapor and alcohol vapor can be controlled with high response.
    • 多个允许水流动的水通道,允许醇流动的多个醇通道和加热水通道和醇通道的多个高温气体通道在热交换部分中独立地设置。 液体醇从第一集管供应到醇通道,水从第二集管供给到水通道。 水通道优选适于与高温气体通道的高温部分接触,并且醇通道优选适于与高温气体通道的低温部分接触。 通过以这种方式单独蒸发水和醇,可以高响应地控制水蒸气和醇蒸气的混合比。
    • 45. 发明授权
    • Cross point type DRAM cell composed of a pillar having an active region
    • 由具有活性区域的柱构成的交叉点型DRAM单元
    • US06563155B2
    • 2003-05-13
    • US09392133
    • 1999-09-08
    • Yoichi MiyaiHiroyuki Yoshida
    • Yoichi MiyaiHiroyuki Yoshida
    • H01L29108
    • H01L27/10855H01L27/10823H01L27/10876H01L27/10885H01L29/945
    • A dynamic random access memory (DRAM) device comprises a substrate, a plurality of substantially parallel word lines, and a plurality of substantially parallel bit lines. A plurality of memory cells are formed at intersections of the word lines and bit lines. Each of the memory cells includes a pillar of semiconductor material which extends outward from the substrate. A storage node plug extends from a storage node through the pillar to a storage node contact and one of a drain and a source of a MOS transistor. A bit line plug extends from the bit line inwardly to the outer surface of the pillar to form a bit line contact and the other of the drain and the source of the MOS transistor. A word line plug extends from the word line through the pillar and a portion of the word line plug forms a gate of the MOS transistor. The storage node plug, bit line plug, and word line plug can be formed asymmetrically as substantially solid, unitary structures having a desired thickness for ease in manufacturing. A method for manufacturing such a device is also disclosed, and requires only four masks.
    • 动态随机存取存储器(DRAM)器件包括衬底,多个基本平行的字线和多个基本上平行的位线。 在字线和位线的交点处形成多个存储单元。 每个存储单元包括从衬底向外延伸的半导体材料的柱。 存储节点插头从存储节点经由柱延伸到存储节点接触件和MOS晶体管的漏极和源极之一。 位线插头从位线向内延伸到柱的外表面以形成位线接触,并且MOS晶体管的漏极和源极中的另一个。 字线插头从字线延伸通过柱,并且字线插头的一部分形成MOS晶体管的栅极。 存储节点插头,位线插头和字线插头可以不对称地形成为具有期望的厚度的基本上固体的单一结构,以便于制造。 还公开了一种用于制造这种装置的方法,并且仅需要四个掩模。
    • 46. 发明授权
    • Method and apparatus for IEEE 1394 bus analysis
    • IEEE 1394总线分析方法和装置
    • US06519544B1
    • 2003-02-11
    • US09662141
    • 2000-09-14
    • Tomohiro DeguchiHiroyuki MiyazakiHiroyuki YoshidaMinoru Wano
    • Tomohiro DeguchiHiroyuki MiyazakiHiroyuki YoshidaMinoru Wano
    • G06F1900
    • G06F11/221
    • IEEE 1394 bus interface circuit 15X comprises a physical layer LSI 37 connected to an IEEE 1394 bus 14, a data capture circuit 22X connected to the physical layer LSI 37 through signal lines to capture data on the signal lines for data analysis, and a coupler (a plug or a socket) 38 to be coupled to a coupler (a socket or a plug) 39 to which a physical layer LSI of an IEEE 1394 bus interface 10 is attached in actual use. With engaging the couplers 39 and 38 to each other, data transmitted between nodes 10 and 13 are captured by the data capture circuit 22X and analyzed in an IEEE 1394 bus analysis apparatus 16. In another IEEE 1394 bus interface circuit, a link power status signal provided to the physical layer circuit from the link layer circuit is fixedly set low, whereby the physical layer circuit is made to function as a repeater, and data received by the physical layer circuit are captured by the link layer circuit and analyzed in the IEEE 1394 bus analysis apparatus.
    • IEEE 1394总线接口电路15X包括连接到IEEE 1394总线14的物理层LSI 37,通过信号线连接到物理层LSI37的数据捕获电路22X,以捕获用于数据分析的信号线上的数据,以及耦合器 耦合到实际使用的IEEE 1394总线接口10的物理层LSI的耦合器(插座或插头)39连接到插座或插座38。 通过使耦合器39和38彼此接合,在节点10和13之间传输的数据被数据捕获电路22X捕获并在IEEE 1394总线分析装置16中进行分析。在另一个IEEE 1394总线接口电路中,链路电源状态信号 从链路层电路提供给物理层电路固定设置为低,从而使物理层电路作为中继器,由物理层电路接收的数据由链路层电路捕获并在IEEE 1394中进行分析 总线分析装置。
    • 49. 发明授权
    • Vehicle mass calculation device
    • 车辆质量计算装置
    • US06347269B1
    • 2002-02-12
    • US09625985
    • 2000-07-26
    • Kisaburo HayakawaMasataka OsawaHiroyuki YoshidaMasuji Oshima
    • Kisaburo HayakawaMasataka OsawaHiroyuki YoshidaMasuji Oshima
    • G01M1500
    • G01M17/007B60T2250/02G01G19/086
    • To calculate a vehicle mass based on a driving force caused by an engine, running resistance, and vehicle acceleration, influence of gradient resistance is removed. A gross driving force calculating section calculates a gross driving force F of a vehicle by deducting running resistance from a driving force of a vehicle caused by an engine. An acceleration sensor calculates a longitudinal acceleration &agr; of the vehicle. Relationship among a gross driving force F, a longitudinal acceleration &agr;, a vehicle mass M, and road gradient &THgr; can be expressed as (&agr;=F/M−g sin &THgr;). Because the change of gradient contains only a low frequency component, by processing a gross driving force F and an acceleration &agr;, using a high-pass filter with a predetermined cut-off frequency, the influence of the gradient &THgr; can be removed. Based on the resultant processed gross driving force F and the processed acceleration &agr;, a vehicle mass can be obtained from the above expression without being affected by the influence of the gradient
    • 为了基于由发动机,行驶阻力和车辆加速度引起的驱动力来计算车辆质量,消除了梯度阻力的影响。 总驱动力计算部通过从发动机引起的车辆的驱动力减去行驶阻力来计算车辆的总动力F. 加速度传感器计算车辆的纵向加速度α。 总驱动力F,纵向加速度α,车辆质量M和道路坡度&THgr之间的关系; 可以表示为(α= F / M-g sin&THgr;)。 由于梯度的变化仅包含低频分量,通过使用具有预定截止频率的高通滤波器处理总驱动力F和加速度α,梯度&THgr; 可以删除 基于得到的经处理的总驱动力F和处理的加速度α,可以从上述表达式获得车辆质量,而不受梯度的影响