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41. 发明授权

US5798286A Connecting multiple microelectronic elements with lead deformation 失效
公开(公告)号：US5798286A
公开(公告)日：1998-08-25
申请号：US532528
申请日：1995-09-22
申请人： Tony Faraci , Thomas H. DiStefano , John W. Smith
发明人： Tony Faraci , Thomas H. DiStefano , John W. Smith
IPC分类号： H01L25/18 , H01L21/60 , H01L25/04 , H01L21/44
CPC分类号： H01L24/86 , H01L2224/16 , H01L2224/45124 , H01L2224/45144 , H01L2224/7965 , H01L24/45 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/351
摘要： A plurality of separate semiconductor chips, each having a contact-bearing surface and contacts on such surface, are disposed in an array so that the contact-bearing surfaces face and define a first surface of the array. A flexible, dielectric sheet with terminals thereon overlies the first or contact bearing surface of the semiconductor chips. Elongated leads are disposed between the dielectric element and the semiconductor chips. Each lead has a first end connected to a terminal on the dielectric element, and a second end connected to a contact on a semiconductor chip in the array. All of the leads are formed simultaneously by moving the dielectric element and the array relative to one another to simultaneously displace all of the first ends of the leads relative to all of the second ends. The dielectric element is subdivided after the forming step so as to leave one region of the dielectric element connected to each chip and thereby form individual units each including one chip, or a small number of chips.

42. 发明授权

US5659952A Method of fabricating compliant interface for semiconductor chip 失效
标题翻译：制造半导体芯片兼容接口的方法
公开(公告)号：US5659952A
公开(公告)日：1997-08-26
申请号：US365699
申请日：1994-12-29
申请人： Zlata Kovac , Craig Mitchell , Thomas H. Distefano , John W. Smith
发明人： Zlata Kovac , Craig Mitchell , Thomas H. Distefano , John W. Smith
IPC分类号： H01L23/12 , H01L21/56 , H01L21/60 , H01L23/28 , H01L23/48 , H01L23/498 , H05K1/11 , H05K3/36 , H05K3/40 , H05K3/34
CPC分类号： H01L24/81 , H01L21/56 , H01L21/563 , H01L23/49811 , H01L23/49827 , H01L23/4985 , H01L24/72 , H01L24/75 , H05K3/4084 , H01L2224/16 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75301 , H01L2224/81801 , H01L2224/83136 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H05K1/118 , H05K2201/0133 , H05K2201/0394 , H05K2201/0397 , H05K2201/09081 , H05K2201/091 , H05K2203/063 , H05K3/361 , Y10T29/4913 , Y10T29/49144 , Y10T29/49174
摘要： A method and an apparatus for providing a planar and compliant interface between a semiconductor chip and its supporting substrate to accommodate for the thermal coefficient of expansion mismatch therebetween. The compliant interface is comprised of a plurality of compliant pads defining channels between adjacent pads. The pads are typically compressed between a flexible film chip carrier and the chip. A compliant filler is further disposed within the channels to form a uniform encapsulation layer having a controlled thickness.
摘要翻译：一种用于在半导体芯片和其支撑衬底之间提供平面和兼容接口以适应其间的热膨胀失配的方法和装置。兼容接口包括限定相邻焊盘之间的通道的多个柔性焊盘。垫通常在柔性膜芯片载体和芯片之间被压缩。在通道内进一步布置柔顺填料以形成具有受控厚度的均匀包封层。

43. 发明授权

US5557501A Compliant thermal connectors and assemblies incorporating the same 失效
标题翻译：符合标准的热连接器和组合件
公开(公告)号：US5557501A
公开(公告)日：1996-09-17
申请号：US342222
申请日：1994-11-18
申请人： Thomas H. DiStefano , John W. Smith
发明人： Thomas H. DiStefano , John W. Smith
IPC分类号： H01L23/36 , H01L23/367 , H01L23/40 , H05K7/20
CPC分类号： H05K7/20445 , H01L23/3672 , H01L23/4006 , H01L2023/4043 , H01L2023/4062 , H01L2023/4068 , H01L2224/16 , H01L2224/16225 , H01L2224/73253 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , Y10T29/4935
摘要： A thermal connector for conducting heat from microelectronic components such as semiconductor chips to a heat sink. The connector includes a large number of flexible thermal conductors desirably formed as elongated "S"-shaped strips or ribbons. The conductors can flex to accommodate tolerances in the assembly and displacement of the components caused by thermal expansion. The conductors may have relatively thin neck sections to increase the flexibility of the conductors, The connector may be fabricated by a process which includes fabrication of the conductors as flat strips, bonding of the conductors to a pair of opposed planar sheets and vertically moving the sheets away from one another to expand the conductors vertically to their final three-dimensional configuration.
摘要翻译：用于将热量从诸如半导体芯片的微电子部件传导到散热器的热连接器。连接器包括大量柔性热导体，期望形成为细长的“S”形条带。导体可以弯曲以适应由热膨胀引起的部件的组装和位移偏差。导体可以具有相对较薄的颈部部分以增加导体的柔性。该连接器可以通过包括将导体制成扁平条，将导体粘合到一对相对的平面片上并垂直移动片的工艺来制造彼此远离地将导体垂直地扩展到它们的最终三维配置。

44. 发明授权

US07166914B2 Semiconductor package with heat sink 有权
标题翻译：半导体封装带散热片
公开(公告)号：US07166914B2
公开(公告)日：2007-01-23
申请号：US10876897
申请日：2004-06-25
申请人： Thomas H. DiStefano , John W. Smith , Tony Faraci
发明人： Thomas H. DiStefano , John W. Smith , Tony Faraci
IPC分类号： H01L23/34 , H01L29/0623 , H01L23/495 , H01L23/06 , H01L23/10
CPC分类号： H01L21/4839 , H01L23/22 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L23/642 , H01L24/72 , H01L2224/16225 , H01L2224/45124 , H01L2224/73253 , H01L2224/81904 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/351 , H05K1/118 , H05K3/361 , H05K3/4084 , H05K2201/0133 , H05K2201/0394 , H05K2201/0397 , H05K2201/09081 , H05K2201/091 , H05K2203/063 , H01L2924/00 , H01L2224/48
摘要： A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.
摘要翻译：包括芯片的封装半导体芯片和诸如散热器的封装元件通过将芯片上的触点之间的柔性引线和诸如片材或板之类的电介质元件上的端子连接并将片或板远离芯片并且注入液体材料以形成填充封装元件和电介质元件之间的空间并且围绕引线的柔性层。介质元件和封装元件向外延伸超过芯片的边缘，并物理保护芯片。组件可以通过常规的表面安装技术来处理和安装。组件可以包括附加电路元件，例如与芯片结合使用的电容器。

45. 发明授权

US06687842B1 Off-chip signal routing between multiply-connected on-chip electronic elements via external multiconductor transmission line on a dielectric element 失效
标题翻译：通过电介质元件上的外部多导体传输线，在多路连接的片上电子元件之间进行片外信号路由
公开(公告)号：US06687842B1
公开(公告)日：2004-02-03
申请号：US09692693
申请日：2000-10-18
申请人： Thomas H. DiStefano , John W. Smith
发明人： Thomas H. DiStefano , John W. Smith
IPC分类号： G06F104
CPC分类号： H01L23/52 , H01L23/498 , H01L23/538 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48095 , H01L2224/85399 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/30107 , H01L2924/3011 , H05K1/118 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip is provided with a dielectric element having conductive features interconnecting electronic elements within the chip with one another. The conductive features replace internal conductors, and can provide enhanced signal propagation between elements of the chip. The conductive features on the dielectric element are connected to contacts on the chip by deformable conductive elements such as flexible leads so that the dielectric element remains movable with respect to the chip. The dielectric element may have a coefficient of expansion different from that of the chip itself.
摘要翻译：半导体芯片设置有具有将芯片内的电子元件彼此互连的导电特性的电介质元件。导电特征取代内部导体，并且可以在芯片的元件之间提供增强的信号传播。电介质元件上的导电特征通过诸如柔性引线的可变形导电元件连接到芯片上的触点，使得电介质元件能够相对于芯片保持可移动。电介质元件可以具有与芯片本身的膨胀系数不同的膨胀系数。

46. 发明授权

US06373141B1 Bondable compliant pads for packaging of a semiconductor chip and method therefor 有权
标题翻译：用于封装半导体芯片的可焊接柔性焊盘及其方法
公开(公告)号：US06373141B1
公开(公告)日：2002-04-16
申请号：US09375572
申请日：1999-08-16
申请人： Thomas H. DiStefano , Zlata Kovac , John W. Smith
发明人： Thomas H. DiStefano , Zlata Kovac , John W. Smith
IPC分类号： H01L2348
CPC分类号： H01L24/32 , H01L23/16 , H01L23/3107 , H01L23/4985 , H01L24/83 , H01L2224/8319 , H01L2224/8385 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/07802
摘要： A microelectronic package comprising a microelectronic element, resilient element including one or more intermediary layers capable of being wetted and assembled with the microelectronic element, and an adhesive is provided. The adhesive contacts at least one of the one or more intermediary layers and the microelectronic element. A resilient element is also provided.
摘要翻译：提供包括微电子元件的微电子封装，包括能够被湿润并与微电子元件组装的一个或多个中间层的弹性元件和粘合剂。粘合剂接触一个或多个中间层和微电子元件中的至少一个。还提供弹性元件。

47. 发明授权

US06306752B1 Connection component and method of making same 有权
标题翻译：连接组件及其制作方法
公开(公告)号：US06306752B1
公开(公告)日：2001-10-23
申请号：US09396048
申请日：1999-09-15
申请人： Thomas H. DiStefano , Joseph Fjeslstad , John W. Smith
发明人： Thomas H. DiStefano , Joseph Fjeslstad , John W. Smith
IPC分类号： H01L214763
CPC分类号： H01L23/49827 , H01L21/486 , H01L23/3114 , H01L2224/50
摘要： A method of making a connection component for a microelectronic element includes providing a sheet comprising an electrically conductive layer, a photoresist layer overlying the conductive layer and a photoimageable dielectric layer disposed under the conductive layer. The method includes lithographically forming at least one opening in the photoresist layer to uncover a portion of the conductive layer, forming a plurality of circuit features from the conductive layer by removing the uncovered portion of the conductive layer, at least some of the circuit features being leads, and lithographically forming at least one aperture in the photoimageable dielectric layer.
摘要翻译：制造微电子元件的连接部件的方法包括提供包括导电层的片材，覆盖在导电层上的光致抗蚀剂层和设置在导电层下面的可光成像的电介质层。该方法包括在光致抗蚀剂层中光刻形成至少一个开口以露出导电层的一部分，通过去除导电层的未覆盖部分从导电层形成多个电路特征，至少一些电路特征为引线，并在光致成像介质层中光刻形成至少一个孔。

48. 发明授权

US06265765B1 Fan-out semiconductor chip assembly 失效
公开(公告)号：US06265765B1
公开(公告)日：2001-07-24
申请号：US08935962
申请日：1997-09-23
申请人： Thomas H. DiStefano , John W. Smith , Tony Faraci
发明人： Thomas H. DiStefano , John W. Smith , Tony Faraci
IPC分类号： H01L2302
CPC分类号： H01L21/4839 , H01L23/22 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L23/642 , H01L24/72 , H01L2224/16225 , H01L2224/45124 , H01L2224/73253 , H01L2224/81904 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/351 , H05K1/118 , H05K3/361 , H05K3/4084 , H05K2201/0133 , H05K2201/0394 , H05K2201/0397 , H05K2201/09081 , H05K2201/091 , H05K2203/063 , H01L2924/00 , H01L2224/48
摘要： A packaged semiconductor chip including the chip, and a package element such as a heat sink is made by connecting flexible leads between contacts on the chip and terminals on a dielectric element such as a sheet or plate and moving the sheet or plate away from the chip, and injecting a liquid material to form a compliant layer filling the space between the package element and the dielectric element, and surrounding the leads. The dielectric element and package element extend outwardly beyond the edges of the chip, and physically protect the chip. The assembly may be handled and mounted by conventional surface mounting techniques. The assembly may include additional circuit elements such as capacitors used in conjunction with the chip.

49. 发明授权

US06202297B1 Socket for engaging bump leads on a microelectronic device and methods therefor 失效
标题翻译：用于接合微电子器件上的突起引线的插座及其方法
公开(公告)号：US06202297B1
公开(公告)日：2001-03-20
申请号：US09079336
申请日：1998-05-14
申请人： Anthony B. Faraci , James B. Zaccardi , Thomas H. Distefano , John W. Smith
发明人： Anthony B. Faraci , James B. Zaccardi , Thomas H. Distefano , John W. Smith
IPC分类号： H05K330
CPC分类号： H05K7/1084 , H01R12/714 , H01R13/24 , H05K3/326 , H05K3/4092 , Y10T29/4913 , Y10T29/49139 , Y10T29/49144
摘要： A connector for microelectronic devices having bump leads and methods for fabricating and using the connector. A dielectric substrate has a plurality of posts extending upwardly from a front surface. The posts may be arranged in an array of post groups each group defining a gap therebetween. A generally laminar contact extends from each post top. The bump leads are each inserted within a respective gap thereby engaging the contacts which wipe against the bump lead as it continues to be inserted. Typically, distal portions of the contacts deflect downwardly toward the substrate and outwardly away from the center of the gap as the bump lead is inserted into a gap.
摘要翻译：具有凸起引线的微电子器件的连接器和用于制造和使用连接器的方法。电介质基板具有从前表面向上延伸的多个柱。柱可以以每组在其间限定间隙的柱组的排列布置。大体层状接触从每个顶部延伸。凸块引线各自插入在相应的间隙内，从而使其接触，当其继续插入时，触头抵靠凸起引线。通常，当凸块引线插入到间隙中时，触头的远端部分向下偏转朝向基板并向外远离间隙的中心。

50. 发明授权

US5994222A Method of making chip mountings and assemblies 失效
标题翻译：制造芯片安装和组件的方法
公开(公告)号：US5994222A
公开(公告)日：1999-11-30
申请号：US845786
申请日：1997-04-25
申请人： John W. Smith , Thomas H. DiStefano
发明人： John W. Smith , Thomas H. DiStefano
IPC分类号： H01L23/31 , H01L21/00
CPC分类号： H01L23/3107 , H01L24/97 , H01L2224/50 , H01L2224/97 , H01L2924/01082 , H01L2924/12042
摘要： A bonding component for electrically connecting a semiconductor chip or wafer to a support substrate includes a dielectric layer having a central region, elongated slots defining the central region, and a peripheral region surrounding the slots. Metallic bonding pads are arranged on the central region, and leads extend from the bonding pads to the edge of the central region and extending partially across the elongated slots. The leads are detached from the peripheral region of the dielectric layer on the side of the slots opposite the central region. The leads are adapted to be deformed during bonding to a semiconductor chip or wafer. To form the bonding component, a dielectric layer is first provided having a central region, slots and a peripheral region. A metallic structure is also provided having bonding pads on the central region, and leads electrically connected to the bonding pads and to a plating bus disposed in the peripheral region. A resist is applied to the metallic structure in zones separating the leads, the metallic structure is plated in regions outside the zones with an etch resistant metal, the resist is removed and the leads are etched so as to form gaps in the metallic structure over the elongated slots.
摘要翻译：用于将半导体芯片或晶片电连接到支撑衬底的接合部件包括具有中心区域的介电层，限定中心区域的细长槽和围绕槽的周边区域。金属接合焊盘布置在中心区域上，并且引线从焊盘延伸到中心区域的边缘并且部分延伸穿过细长槽。引线与介质层的与中心区域相对的一侧的外围区域分离。引线适于在与半导体芯片或晶片接合期间变形。为了形成接合部件，首先提供具有中心区域，槽和周边区域的电介质层。还提供了一种金属结构，在中心区域具有接合焊盘，并且引线电连接到接合焊盘和设置在周边区域中的电镀母线。在分离引线的区域中将金属结构施加抗蚀剂，金属结构用耐蚀刻金属镀在区域外的区域中，去除抗蚀剂并蚀刻引线以在金属结构上形成间隙细长的槽。

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