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41. 发明申请

US20080024340A1 Current driven D/A converter and its bias circuit 审中-公开
标题翻译：电流驱动D / A转换器及其偏置电路
公开(公告)号：US20080024340A1
公开(公告)日：2008-01-31
申请号：US11902773
申请日：2007-09-25
申请人： Osamu Matsumoto , Takahiro Miki , Yasuo Morimoto
发明人： Osamu Matsumoto , Takahiro Miki , Yasuo Morimoto
IPC分类号： H03M1/66
CPC分类号： H03M1/0604 , H03M1/742
摘要： A current driven D/A converter sets an OFF control voltage (BIAS3) for turning off NMOS transistors M12P, M12N, M22P, M22N, M32P and M32N at a voltage close to an ON control voltage (BIAS2). This makes it possible to reduce the swing of the control voltage (ON control voltage−OFF control voltage) of the NMOS transistors, and hence to reduce the noise due to charge injections through parasitic capacitances, and noise of a ground voltage or power supply voltage due to flowing of discharge currents from the parasitic capacitances to the ground or power supply at turn off of the transistors, thereby being able to offer a high performance current driven D/A converter.
摘要翻译：电流驱动D / A转换器设置用于关闭NMOS晶体管M 12 P，M 12 N，M 22 P，M 22 N，M 32 P和M 32 N的截止控制电压（BIAS 3） ON控制电压（BIAS 2）。这使得可以减小NMOS晶体管的控制电压（ON控制电压 - 关闭控制电压）的摆动，从而减少由于通过寄生电容的电荷注入引起的噪声，以及接地电压或电源电压的噪声由于在晶体管截止时由寄生电容放电到地或电源的放电电流的流动，从而能够提供高性能的电流驱动D / A转换器。

42. 发明申请

US20070295080A1 Air Flow Rate Measuring Device 有权
标题翻译：空气流量测量装置
公开(公告)号：US20070295080A1
公开(公告)日：2007-12-27
申请号：US11758292
申请日：2007-06-05
申请人： Masayuki Kozawa , Makoto IIda , Akio Yasukawa , Mari Hikota , Takahiro Miki
发明人： Masayuki Kozawa , Makoto IIda , Akio Yasukawa , Mari Hikota , Takahiro Miki
IPC分类号： G01F1/68
CPC分类号： G01F1/6842 , G01F15/00 , G01F15/18
摘要： An air flow rate measuring device is provided in which a pressure loss across a grid therein due to the load which is generated when a hose band is tightened is reduced and deterioration of its measurement accuracy due to the grid deformation is prevented. The grid is configured to have a grid portion which absorbs deformation at the outer periphery thereof, and another grid portion which does not absorb deformation at the inner periphery thereof. In order to make the grid portions independent of each other, the grid is provided with a frame, and the mesh grid inside of the frame which maintains a rectifying effect, prevents the deterioration of the measurement accuracy, and does not absorb deformation, and the grid outside of the frame absorbs deformation.
摘要翻译：提供了一种空气流量测量装置，其中由于在软管带被紧固时产生的负载而在其内的电网的压力损失减少，并且防止了由于电网变形引起的其测量精度的劣化。格栅被构造为具有能够吸收其外周的变形的栅格部，以及在其内周不吸收变形的另一格栅部。为了使栅格部分彼此独立，栅格设置有框架，并且框架内部的网格保持整流效果，防止测量精度的劣化，并且不会吸收变形，并且框架外部的网格吸收变形。

43. 发明授权

US06710730B2 Ladder resistor with reduced interference between resistor groups 失效
标题翻译：梯形电阻器，电阻组之间的干扰减小
公开(公告)号：US06710730B2
公开(公告)日：2004-03-23
申请号：US09900018
申请日：2001-07-09
申请人： Hisashi Harada , Takahiro Miki
发明人： Hisashi Harada , Takahiro Miki
IPC分类号： H03M178
CPC分类号： H03M1/068 , H03M1/46 , H03M1/76
摘要： A ladder resistor includes a first resistor group including a number of resistors connected in series and generating a number of reference voltages, and a second resistor group including a same number of resistors connected in series as the plurality of resistors included in the first resistor group, and generating a number of reference voltages. The plurality of resistors included in the second resistor group corresponds to the plurality of resistors included in the first resistor group, respectively. Each of the plurality of resistors included in the first resistor group and a corresponding one of the plurality of resistors included in the second resistor group, that is, each resistor pair is symmetric with respect to a given point. The first resistor group is separated from the second resistor group so that they face each other with the point between.
摘要翻译：梯形电阻器包括包括串联连接的多个电阻器并产生多个参考电压的第一电阻器组和包括与包括在第一电阻器组中的多个电阻器串联连接的相同数量的电阻器的第二电阻器组，并产生多个参考电压。包括在第二电阻器组中的多个电阻分别对应于包括在第一电阻器组中的多个电阻器。包括在第一电阻器组中的多个电阻器中的每一个以及包括在第二电阻器组中的多个电阻器中的相应一个电阻器，即每个电阻器对相对于给定点是对称的。第一电阻器组与第二电阻器组分开，使得它们彼此面对。

44. 发明授权

US06703957B2 Digital-to-analog converter 失效
标题翻译：数模转换器
公开(公告)号：US06703957B2
公开(公告)日：2004-03-09
申请号：US10143878
申请日：2002-05-14
申请人： Yasuo Morimoto , Toshio Kumamoto , Takashi Okuda , Takahiro Miki
发明人： Yasuo Morimoto , Toshio Kumamoto , Takashi Okuda , Takahiro Miki
IPC分类号： H03M166
CPC分类号： H03M1/0614 , H03K5/01 , H03K5/133 , H03M1/822 , H03M3/372 , H03M3/506
摘要： When forming PDM pulses by a D/A converter in accordance with digital signals, the D/A converter causes at least one of the rising stage and the falling stage of each of the PDM pulses to change stepwise. In addition, when forming PWM pulses by another D/A converter, the D/A converter causes at least one of the rising stage and the falling stage of each of the PWM pulses to change stepwise.
摘要翻译：当通过D / A转换器根据数字信号形成PDM脉冲时，D / A转换器使得每个PDM脉冲的上升沿和下降沿中的至少一个逐步改变。此外，当由另一个D / A转换器形成PWM脉冲时，D / A转换器使每个PWM脉冲的上升沿和下降沿中的至少一个逐步改变。

45. 发明授权

US06556039B2 Impedance adjustment circuit 有权
标题翻译：阻抗调节电路
公开(公告)号：US06556039B2
公开(公告)日：2003-04-29
申请号：US09962191
申请日：2001-09-26
申请人： Hideo Nagano , Takahiro Miki
发明人： Hideo Nagano , Takahiro Miki
IPC分类号： H03K1714
CPC分类号： H04L25/0278
摘要： An impedance adjustment circuit achieves impedance matching between a terminal resistor in a reception-side semiconductor device and a transmission line. A reference resistor has a first resistance proportional to characteristic impedance of the transmission line. This reference resistor is external to the reception-side semiconductor device. Furthermore, the terminal resistor includes a resistor having a second resistance and an ON resistance of an MOS transistor. The resistance of the terminal resistor is adjusted by referring to the reference resistor.
摘要翻译：阻抗调整电路实现接收侧半导体装置中的端子电阻与传输线之间的阻抗匹配。参考电阻具有与传输线的特性阻抗成比例的第一电阻。该参考电阻器在接收侧半导体器件的外部。此外，端子电阻器包括具有MOS晶体管的第二电阻和导通电阻的电阻器。通过参考电阻调节端子电阻的电阻。

46. 发明授权

US5801705A Graphic display unit for implementing multiple frame buffer stereoscopic or blinking display, with independent multiple windows or blinking regions 失效
标题翻译：用于实现多帧缓冲立体或闪烁显示的图形显示单元，具有独立的多个窗口或闪烁区域
公开(公告)号：US5801705A
公开(公告)日：1998-09-01
申请号：US672417
申请日：1996-06-28
申请人： Yoshiyuki Kato , Masatoshi Kameyama , Takahiro Miki
发明人： Yoshiyuki Kato , Masatoshi Kameyama , Takahiro Miki
IPC分类号： H04N13/04 , G06T19/00 , G09G1/06 , G09G5/06 , G09G5/14 , G09G5/36 , G09G5/397 , G09G5/399 , H04N13/00 , G06T15/00
CPC分类号： H04N13/0497 , G06T15/00 , G09G1/06 , G09G3/003 , G09G5/06 , G09G5/14 , G09G5/397 , H04N13/0048 , H04N13/0051 , H04N13/0055 , H04N13/0275 , H04N13/0438 , H04N13/0456 , H04N13/047 , H04N13/0285
摘要： A graphic display unit makes it possible for a stereo display or blink operation to be implemented on a window system with each window having an arbitrary contour, and on a window by window basis. The graphic display unit of this invention comprises a frame buffer for a right eye, a frame buffer for a left eye, a window-id buffer which stores a window-id corresponding to the contour and position of windows on the frame buffer, a look-up table which stores control information related to stereo display and is accessed based on a window-id, a frame counter that issues the timing of switching frame buffers, a stereo display control circuit for switching buffers based on signals from both the look-up table and from the frame counter, and stereo viewer that controls shutters for a right eye and a left eye.
摘要翻译：图形显示单元使得可以在具有任意轮廓的每个窗口的窗口系统上以窗口为基础在窗口系统上实现立体显示或眨眼操作。本发明的图形显示单元包括用于右眼的帧缓冲器，用于左眼的帧缓冲器，窗口ID缓冲器，其存储与帧缓冲器上的轮廓和窗口的位置相对应的窗口ID，外观存储与立体显示相关的控制信息的表，并且基于窗口id访问，发出切换帧缓冲器的定时的帧计数器，用于根据来自查找器的信号切换缓冲器的立体显示控制电路桌子和框架计数器，以及用于控制右眼和左眼的百叶窗的立体观看器。

47. 发明授权

US5689258A Multiple current digital-analog converter capable of reducing output glitch 失效
标题翻译：多电流数字模拟转换器可以减少输出毛刺
公开(公告)号：US5689258A
公开(公告)日：1997-11-18
申请号：US532315
申请日：1995-09-21
申请人： Yasuyuki Nakamura , Hiroyuki Kouno , Takahiro Miki
发明人： Yasuyuki Nakamura , Hiroyuki Kouno , Takahiro Miki
IPC分类号： H03M1/08 , H03M1/74 , H03M1/66
CPC分类号： H03M1/0863 , H03M1/747
摘要： A digital-analog converter has unit current source cells each having a differential switch circuit and a constant current source. The differential switch circuit made of two switches is driven by a pair of complementary driving circuits controlled by a bit signal and the inverted bit signal corresponding to that signal and entered simultaneously. The constant current source outputs a constant current to a first and a second current output terminal via the switch circuit. The signals for controlling the driving circuits that drive the switches are such that the delay time for the switch closing operation will be longer than the delay time for the switch opening operation. As a result, the cross point of the two signals to open and close the switches in a complementary manner becomes greater than the median between the maximum and minimum signal levels. That is, even when the threshold value of a currently switching transistor is greater than a median, that value may be arranged to match the median, whereby the furnished switching transistors are not turned on or off simultaneously.
摘要翻译：数模转换器具有单元电流源单元，每个单元具有差分开关电路和恒流源。由两个开关构成的差分开关电路由一对由位信号控制的互补驱动电路和对应于该信号的反相位信号驱动并同时输入。恒流源通过开关电路向第一和第二电流输出端输出恒定电流。用于控制驱动开关的驱动电路的信号使得开关闭合操作的延迟时间将长于开关操作的延迟时间。结果，以互补方式打开和闭合开关的两个信号的交叉点变得大于最大和最小信号电平之间的中值。也就是说，即使当当前开关晶体管的阈值大于中值时，也可以将该值设置为与中值相匹配，由此所提供的开关晶体管不会同时导通或截止。

48. 发明授权

US4968988A Time interleaved analog-digital converter and a method for driving the same 失效
标题翻译：时间交错模数转换器及其驱动方法
公开(公告)号：US4968988A
公开(公告)日：1990-11-06
申请号：US274437
申请日：1988-11-22
申请人： Takahiro Miki , Hideki Ando
发明人： Takahiro Miki , Hideki Ando
IPC分类号： H03M1/12 , H03M1/06
CPC分类号： H03M1/0651 , H03M1/1215
摘要： A time interleaved analog-to-digital converter includes a plurality of analog-to-digital subconverters which are monolithically integrated in an array on a semiconductor chip and are sequentially activated into sampling and conversion operation in the time interleaved fashion for converting a received analog signal into a digital form. If an analog-to-digital subconverter in the i-th row of the j-th column of the array is activated at one sampling time in the sequential activation, an analog-to-digital subconverter in the k-th row of the l-th column is subsequently activated, where i, k, j and l bear the relations expressed by:i-2.ltoreq.k.ltoreq.i+2 and j-2.ltoreq.l.ltoreq.j+2.The sequential activation of the analog-to-digital subconverter array assures that the analog-to-digital subconverters disposed in physical proximity to one another are successively activated, thus greatly improving the differential linearity of the analog-to-digital converter characteristics.
摘要翻译：时间交织的模数转换器包括多个模数转换子转换器，它们单片集成在半导体芯片上的阵列中，并以时间交错方式被顺序激活成采样和转换操作，用于转换接收的模拟信号成为数字形式。如果阵列的第j列的第i行中的模数转换子转换器在顺序激活中的一个采样时间被激活，则l的第k行中的模数转换子转换器随后激活第i列，其中i，k，j和l具有由以下公式表示的关系：i-2

49. 发明授权

US4918451A A/D converter with prevention of comparator output discontinuities 失效
标题翻译： A / D转换器，防止比较器输出不连续
公开(公告)号：US4918451A
公开(公告)日：1990-04-17
申请号：US265223
申请日：1988-11-01
申请人： Hideki Ando , Takahiro Miki
发明人： Hideki Ando , Takahiro Miki
IPC分类号： H03M1/36 , H03M1/00
CPC分类号： H03M1/0809 , H03M1/365
摘要： A reference voltage is divided by a plurality of resistors (6), the respective voltages and an analogue input voltage being compared with each other by comparators (7). An output of each of the comparators is applied to a data transfer circuit (13) of a hand shake type and latched. The data transfer circuit shifts discontinuous portions of logic which appeared in latched data. Therefore, simultaneous selection of a plurality of addresses in an encoder (10) is avoided.
摘要翻译：参考电压由多个电阻器（6）分压，各个电压和模拟输入电压通过比较器（7）相互比较。每个比较器的输出被施加到手抖动类型的数据传送电路（13）并被锁存。数据传输电路移动出现在锁存数据中的逻辑不连续部分。因此，避免了编码器（10）中的多个地址的同时选择。

50. 发明授权

US4723194A Structure of capacitor circuit 失效
标题翻译：电容电路结构
公开(公告)号：US4723194A
公开(公告)日：1988-02-02
申请号：US911434
申请日：1986-09-25
申请人： Yasuyuki Nakamura , Takahiro Miki
发明人： Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H01L27/04 , G11C11/24 , H01G4/38 , H01L21/822
CPC分类号： G11C11/24 , H01G4/385
摘要： A structure of a capacitor circuit in accordance with the present invention comprises a plurality of capacitors formed on a semiconductor or conductor substrate in a manner in which insulating films and electrodes are provided alternately. This structure is characterized in that: there are provided a first capacitor and a second capacitor adjacent to each other; the first capacitor and the second capacitor comprise, respectively, first electrodes formed on the substrate through the first insulating film, second electrodes formed on the first electrodes through the second insulating film and third electrodes formed on the second electrodes through the third insulating film, the third electrode of the first capacitor being connected to the second electrode of the second capacitor.
摘要翻译：根据本发明的电容器电路的结构包括以交替设置绝缘膜和电极的方式形成在半导体或导体基板上的多个电容器。该结构的特征在于：提供了彼此相邻的第一电容器和第二电容器; 第一电容器和第二电容器分别包括通过第一绝缘膜形成在基板上的第一电极，通过第二绝缘膜形成在第一电极上的第二电极和通过第三绝缘膜形成在第二电极上的第三电极，第一电容器的第三电极连接到第二电容器的第二电极。

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