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41. 发明授权

US06394114B1 Method for stripping copper in damascene interconnects 失效
标题翻译：在大马士革互连中剥离铜的方法
公开(公告)号：US06394114B1
公开(公告)日：2002-05-28
申请号：US09442312
申请日：1999-11-22
申请人： Subhash Gupta , Simon Chooi , Paul Ho , Mei Sheng Zhou
发明人： Subhash Gupta , Simon Chooi , Paul Ho , Mei Sheng Zhou
IPC分类号： C23G114
CPC分类号： H01L21/32134 , C23F1/34 , H01L21/7684 , Y10S134/902
摘要： An inexpensive and safe copper removal method in the fabrication of integrated circuits is described. Copper is stripped or removed by a chemical mixture comprising an ammonium salt, an amine, and water. The rate of copper stripping can be controlled by varying the concentration of the ammonium salt component and the amount of water in the mixture. Also a novel chemical mixture for stripping copper and removing copper contamination is provided. The novel chemical mixture for removing or stripping copper comprises an ammonium salt, an amine, and water. For example, the novel chemical mixture may comprise ammonium fluoride, water, and ethylenediamine in a ratio of 1:1:1.
摘要翻译：描述了在制造集成电路中的便宜且安全的铜去除方法。通过包含铵盐，胺和水的化学混合物将铜剥离或除去。可以通过改变铵盐组分的浓度和混合物中的水量来控制铜汽提速率。还提供了一种用于剥离铜并除去铜污染物的新型化学混合物。用于除去或剥离铜的新型化学混合物包括铵盐，胺和水。例如，新型化学混合物可以包含比例为1:1:1的氟化铵，水和乙二胺。

42. 发明授权

US06284657B1 Non-metallic barrier formation for copper damascene type interconnects 有权
标题翻译：铜镶嵌型互连的非金属阻挡层形成
公开(公告)号：US06284657B1
公开(公告)日：2001-09-04
申请号：US09512379
申请日：2000-02-25
申请人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
发明人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
IPC分类号： H01L2144
CPC分类号： H01L21/76832 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76831
摘要： A method for forming dual-damascene type conducting interconnects with non-metallic barriers that protect said interconnects from fluorine out-diffusion from surrounding low-k, fluorinated dielectric materials. One embodiment of the method is particularly suited for forming such interconnects in microelectronics fabrications of the sub 0.15 micron generation.
摘要翻译：用于形成具有非金属屏障的双镶嵌型导电互连的方法，其保护所述互连免受氟周围的低k，氟化介电材料的氟扩散。该方法的一个实施例特别适用于在0.15微米级的微电子制造中形成这种互连。

43. 发明授权

US06429122B2 Non metallic barrier formations for copper damascene type interconnects 失效
公开(公告)号：US06429122B2
公开(公告)日：2002-08-06
申请号：US09925820
申请日：2001-08-10
申请人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
发明人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
IPC分类号： H01L214763
CPC分类号： H01L21/76832 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76831
摘要： A method for forming dual-damascene type conducting interconnects with non-metallic barriers that protect said interconnects from fluorine out-diffusion from surrounding low-k, fluorinated dielectric materials. One embodiment of the method is particularly suited for forming such interconnects in microelectronics fabrications of the sub 0.15 micron generation.

44. 发明授权

US06352917B1 Reversed damascene process for multiple level metal interconnects 有权
标题翻译：用于多级金属互连的反向镶嵌工艺
公开(公告)号：US06352917B1
公开(公告)日：2002-03-05
申请号：US09598691
申请日：2000-06-21
申请人： Subhash Gupta , Mei-Sheng Zhou , Simon Chooi , Sangki Hong
发明人： Subhash Gupta , Mei-Sheng Zhou , Simon Chooi , Sangki Hong
IPC分类号： H01L214763
CPC分类号： H01L21/76885 , H01L21/76801 , H01L21/76802 , H01L21/76831 , H01L21/76834 , H01L21/76883 , H01L21/76897 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A new method of forming metal interconnect levels containing damascene interconnects and via plugs in the manufacture of an integrated circuit device has been achieved. The method creates a reversed dual damascene structure. A first dielectric layer is provided overlying a semiconductor substrate. The dielectric layer is patterned to form trenches for planned damascene interconnects. Insulating spacers may optionally be formed on the trench sidewalls. A conductive barrier layer is deposited overlying the dielectric layer and lining the trenches. A metal layer, preferably comprising copper, is deposited overlying the conductive barrier layer and filling the trenches. The metal layer and the conductive barrier layer are polished down to thereby form the damascene interconnects. A passivation layer may optionally be deposited. The damascene interconnects are patterned to form via plugs overlying the damascene interconnects. The patterning comprises partially etching down the damascene interconnects using a via mask overlying and protecting portions of the damascene interconnects. A trench mask also overlies and protects the first dielectric layer from metal contamination during the etching down.
摘要翻译：已经实现了在集成电路器件的制造中形成包含镶嵌互连和通孔插塞的金属互连级别的新方法。该方法创建一个反向的双镶嵌结构。第一电介质层设置在半导体衬底上。图案化电介质层以形成用于计划的大马士革互连的沟槽。可以可选地在沟槽侧壁上形成绝缘间隔物。导电阻挡层沉积在电介质层上并衬在沟槽上。沉积优选包含铜的金属层，覆盖在导电阻挡层上并填充沟槽。金属层和导电阻挡层被抛光，从而形成镶嵌互连。可以任选地沉积钝化层。大马士革互连被图案化以形成覆盖大马士革互连的通孔塞。图案化包括使用覆盖并保护大马士革互连部分的通孔掩模部分地蚀刻镶嵌互连。在蚀刻过程中，沟槽掩模也覆盖并保护第一介电层免受金属污染。

45. 发明授权

US06225202B1 Selective etching of unreacted nickel after salicidation 有权
标题翻译：腐蚀后对未反应的镍进行选择性蚀刻
公开(公告)号：US06225202B1
公开(公告)日：2001-05-01
申请号：US09598689
申请日：2000-06-21
申请人： Subhash Gupta , Mei-Sheng Zhou , Simon Chooi , Sangki Hong
发明人： Subhash Gupta , Mei-Sheng Zhou , Simon Chooi , Sangki Hong
IPC分类号： H01L214763
CPC分类号： H01L29/665 , C23F4/00 , H01L21/32136
摘要： A method for removing unreacted nickel or cobalt after silicidation using carbon monoxide dry stripping is described. Shallow trench isolation regions are formed in a semiconductor substrate surrounding and electrically isolating an active area from other active areas. A gate electrode and associated source and drain regions are formed in the active area wherein dielectric spacers are formed on sidewalls of the gate electrode. A nickel or cobalt layer is deposited over the gate electrode and associated source and drain regions, shallow trench isolation regions, and dielectric spacers. The semiconductor substrate is annealed whereby the nickel or cobalt layer overlying the gate electrode and said source and drain regions is transformed into a nickel or cobalt silicide layer and wherein the nickel or cobalt layer overlying the dielectric spacers and the shallow trench isolation regions is unreacted. The unreacted nickel or cobalt layer is exposed to a plasma containing carbon monoxide gas wherein the carbon monoxide gas reacts with the unreacted nickel or cobalt thereby removing the unreacted nickel or cobalt from the substrate to complete salicidation of the integrated circuit device.
摘要翻译：描述了使用一氧化碳干燥汽提在硅化后除去未反应的镍或钴的方法。在半导体衬底中形成浅沟槽隔离区域，该半导体衬底围绕并使活性区域与其它有源区域电隔离。在有源区域中形成栅电极和相关源极和漏极区，其中在栅电极的侧壁上形成有电介质间隔物。在栅极电极和相关的源极和漏极区域，浅沟槽隔离区域和介电间隔物上沉积镍或钴层。半导体衬底被退火，由此将覆盖在栅电极和所述源极和漏极区域上的镍或钴层转变成镍或钴硅化物层，并且其中覆盖电介质间隔物和浅沟槽隔离区的镍或钴层是未反应的。将未反应的镍或钴层暴露于含有一氧化碳气体的等离子体中，其中一氧化碳气体与未反应的镍或钴反应，从而从基板除去未反应的镍或钴，以完成集成电路器件的水化。

46. 发明授权

US06132521A Cleaning metal surfaces with alkyldione peroxides 失效
标题翻译：用烷基二酮过氧化物清洗金属表面
公开(公告)号：US06132521A
公开(公告)日：2000-10-17
申请号：US467132
申请日：1999-12-20
申请人： Subhash Gupta , Simon Chooi , Mei Sheng Zhou , Paul Ho
发明人： Subhash Gupta , Simon Chooi , Mei Sheng Zhou , Paul Ho
IPC分类号： C11D3/20 , C11D3/39 , C23G5/032 , B08B3/04
CPC分类号： C11D3/2072 , C11D3/2003 , C11D3/2093 , C11D3/3945 , C23G5/032 , Y10S134/902
摘要： A method of cleaning elemental copper, cobalt, or nickel from the surface of equipment hardware without corroding or damaging the equipment parts and surfaces in the event of wafer breakage and non-wafer breakage is described. A solution includes an alkyldione peroxide, a stabilizing agent, and alcohols is used to oxidize the metal and form soluble complexes which are removed by the cleaning solution. Also, a alkyldione peroxide solution for cleaning elemental copper, cobalt, or nickel from the surface of equipment hardware in the event of wafer breakage and non-wafer breakage is provided.
摘要翻译：描述了从设备硬件表面清除元素铜，钴或镍的方法，而不会在晶片断裂和非晶片断裂的情况下腐蚀或损坏设备部件和表面。溶液包括烷基二酮过氧化物，稳定剂，醇用于氧化金属并形成由清洗溶液除去的可溶性络合物。此外，提供了在晶片断裂和非晶片断裂的情况下从设备硬件的表面清除元素铜，钴或镍的烷基二氧化碳过氧化物溶液。

47. 发明授权

US6114243A Method to avoid copper contamination on the sidewall of a via or a dual damascene structure 有权
标题翻译：避免在通孔或双镶嵌结构的侧壁上铜污染的方法
公开(公告)号：US6114243A
公开(公告)日：2000-09-05
申请号：US439361
申请日：1999-11-15
申请人： Subhash Gupta , Kwok Keung Paul Ho , Mei-Sheng Zhou , Simon Chool
发明人： Subhash Gupta , Kwok Keung Paul Ho , Mei-Sheng Zhou , Simon Chool
IPC分类号： H01L21/302 , H01L21/304 , H01L21/306 , H01L21/3065 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L21/44
CPC分类号： H01L21/76843 , H01L21/7684 , H01L21/76849 , H01L21/76865 , H01L21/76877
摘要： A new method to prevent copper contamination of the intermetal dielectric layer during via or dual damascene etching by forming a capping layer over the first copper metallization is described. A first copper metallization is formed in a dielectric layer overlying a semiconductor substrate wherein a barrier metal layer is formed underlying the first copper metallization and overlying the dielectric layer. The first copper metallization is planarized, then etched to form a recess below the surface of the dielectric layer. A conductive capping layer is deposited overlying the first copper metallization within the recess and overlying the dielectric layer. The conductive capping layer is removed except over the first copper metallization within the recess using one of several methods. An intermetal dielectric layer is deposited overlying the dielectric layer and the conductive capping layer overlying the first copper metallization. A via or dual damascene opening is etched through the intermetal dielectric layer to the conductive capping layer wherein the conductive capping layer prevents copper contamination of the intermetal dielectric layer during etching. The via or dual damascene opening is filled with a metal layer to complete electrical connections in the fabrication of an integrated circuit device.
摘要翻译：描述了在通过或双镶嵌蚀刻期间通过在第一铜金属化上形成覆盖层来防止金属间电介质层的铜污染的新方法。第一铜金属化形成在覆盖半导体衬底的电介质层中，其中阻挡金属层形成在第一铜金属化层下方并且覆盖在电介质层上。第一铜金属化被平坦化，然后被蚀刻以在介电层的表面下方形成凹陷。导电覆盖层沉积在凹槽内的第一铜金属化层上并覆盖在介电层上。使用几种方法之一除去在凹槽内的第一铜金属化之外除去导电覆盖层。覆盖介电层和覆盖第一铜金属化的导电覆盖层的金属间电介质层被沉积。通孔或双镶嵌开口通过金属间电介质层被蚀刻到导电覆盖层，其中导电覆盖层防止蚀刻期间金属间介电层的铜污染。通孔或双镶嵌开口填充有金属层，以在集成电路器件的制造中完成电连接。

48. 发明授权

US06465157B1 Dual layer pattern formation method for dual damascene interconnect 有权
标题翻译：双镶嵌互连的双层图案形成方法
公开(公告)号：US06465157B1
公开(公告)日：2002-10-15
申请号：US09494638
申请日：2000-01-31
申请人： Jianxun Li , Mei Sheng Zhou , Subhash Gupta , Ming hui Far
发明人： Jianxun Li , Mei Sheng Zhou , Subhash Gupta , Ming hui Far
IPC分类号： G03F700
CPC分类号： H01L21/76811
摘要： A new method of forming dual damascene interconnects has been achieved. A semiconductor substrate is provided. A dielectric layer is provided overlying the semiconductor substrate. A first photoresist layer is deposited overlying the dielectric layer. The first photoresist layer is exposed, but not developed, to define patterns where via trenches are planned. A second photoresist layer is deposited overlying the first photoresist layer. The second photoresist layer is exposed to define patterns where interconnect trenches are planned. The second photoresist layer and the first photoresist layer are developed to complete the via trench pattern of the first photoresist layer and the interconnect trench pattern of the second photoresist layer. The dielectric layer is etched through where defined by the via trench pattern of the first photoresist layer. The dielectric layer is etch where defined by the interconnect pattern of the second photoresist layer, and the dual damascene interconnect of the integrated circuit device is completed.
摘要翻译：已经实现了形成双镶嵌互连的新方法。提供半导体衬底。提供覆盖在半导体衬底上的电介质层。沉积在介电层上的第一光致抗蚀剂层。第一光致抗蚀剂层被暴露但未显影，以限定通过沟槽被规划的图案。第二光致抗蚀剂层沉积在第一光致抗蚀剂层上。暴露第二光致抗蚀剂层以限定互连沟槽被计划的图案。显影第二光致抗蚀剂层和第一光致抗蚀剂层以完成第一光致抗蚀剂层的通孔沟槽图案和第二光致抗蚀剂层的互连沟槽图案。电介质层被蚀刻到由第一光致抗蚀剂层的通孔沟槽图案限定的位置。介电层是由第二光致抗蚀剂层的互连图案限定的蚀刻，并且完成集成电路器件的双镶嵌互连。

49. 发明授权

US06255266B1 Alkyldione peroxides as cleaning solutions for wafer fabs 失效
标题翻译：烷基二酮过氧化物作为晶圆厂的清洁溶液
公开(公告)号：US06255266B1
公开(公告)日：2001-07-03
申请号：US09659728
申请日：2000-09-11
申请人： Subhash Gupta , Simon Choo I , Mei Sheng Zhou , Paul Ho
发明人： Subhash Gupta , Simon Choo I , Mei Sheng Zhou , Paul Ho
IPC分类号： C11D904
CPC分类号： C11D3/2072 , C11D3/2003 , C11D3/2093 , C11D3/3945 , C23G5/032 , Y10S134/902
摘要： A method of cleaning elemental copper, cobalt, or nickel from the surface of equipment hardware without corroding or damaging the equipment parts and surfaces in the event of wafer breakage and non-wafer breakage is described. A solution comprising an alkyldione peroxide, a stabilizing agent, and alcohols is used to oxidize the metal and form soluble complexes which are removed by the cleaning solution. Also, a novel alkyldione peroxide solution for cleaning elemental copper, cobalt, or nickel from the surface of equipment hardware in the event of wafer breakage and non-wafer breakage is provided.
摘要翻译：描述了从设备硬件表面清除元素铜，钴或镍的方法，而不会在晶片断裂和非晶片断裂的情况下腐蚀或损坏设备部件和表面。使用包含烷基二酮过氧化物，稳定剂和醇的溶液来氧化金属并形成被清洁溶液除去的可溶性络合物。此外，提供了在晶片断裂和非晶片断裂的情况下从设备硬件的表面清除元素铜，钴或镍的新型烷基二氧化物溶液。

50. 发明授权

US06740580B1 Method to form copper interconnects by adding an aluminum layer to the copper diffusion barrier 失效
标题翻译：通过向铜扩散阻挡层添加铝层来形成铜互连的方法
公开(公告)号：US06740580B1
公开(公告)日：2004-05-25
申请号：US09389633
申请日：1999-09-03
申请人： Subhash Gupta , Chyi S. Chern , Mei Sheng Zhou
发明人： Subhash Gupta , Chyi S. Chern , Mei Sheng Zhou
IPC分类号： H01L214763
CPC分类号： H01L21/76846 , H01L21/76873 , H01L21/76874 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method to form copper interconnects is described. The method may be used to form single or dual damascene interconnects. The addition of an aluminum barrier layer to the conventional barrier layer creates a superior barrier to copper diffusion. A substrate layer is provided. A dielectric layer is deposited overlying the substrate layer. The dielectric layer patterned to form interconnect trenches. An optional titanium adhesion layer may be deposited. An aluminum barrier layer is deposited overlying the interior surfaces of the trenches. A second barrier layer, comprising for instance titanium and titanium nitride, is deposited overlying the aluminum barrier layer. A copper layer is deposited overlying the second barrier layer and filling the interconnect trenches. The copper layer, the second barrier layer, and the aluminum barrier layer are polished down to the top surface of the dielectric layer to define the copper interconnects, and complete the fabrication of the integrated circuit device.
摘要翻译：描述形成铜互连的方法。该方法可以用于形成单镶嵌或双镶嵌互连。向常规阻挡层添加铝阻挡层产生对铜扩散的优异屏障。提供基底层。沉积在基底层上的电介质层。图案化的电介质层形成互连沟槽。可以沉积可选的钛粘合层。覆盖在沟槽的内表面上的铝阻挡层被沉积。包含例如钛和氮化钛的第二阻挡层沉积在铝阻挡层上。沉积铜层，覆盖第二阻挡层并填充互连沟槽。铜层，第二阻挡层和铝阻挡层被抛光到介电层的顶表面以限定铜互连，并且完成集成电路器件的制造。

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