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    • 41. 发明授权
    • Programmable interconnect architecture
    • 可编程互连体系结构
    • US5191241A
    • 1993-03-02
    • US899729
    • 1992-06-17
    • John L. McCollumAbbas A. El GamalJonathan W. Greene
    • John L. McCollumAbbas A. El GamalJonathan W. Greene
    • H01L23/525H01L23/528
    • H01L23/5252H01L23/528H01L2924/0002
    • A user-configurable circuit architecture includes a two dimensional array of functional circuit modules disposed within a semiconductor substrate. A first interconnect layer disposed above and insulated from the semiconductor substrate contains a plurality of conductors and is used for internal connections within the functional circuit modules. A second interconnect layer disposed above and insulated from the first interconnect layer contains a plurality of segmented tracks of conductors running in a first direction and is used to interconnect functional circuit module inputs and outputs. A third interconnect layer disposed above and insulated from the second interconnect layer contains a plurality of segmented tracks of conductors running in a second direction, some of the segments of conductors forming intersections with ones of the segments of the conductors in the second interconnect layer, and is used to interconnect functional circuit module inputs and outputs to implement the desired applications. A plurality of user-configurable interconnect elements are placed directly between the second and third interconnect layers at the intersections of selected segments of the segmented conductors in the second and third interconnect layers. More user-configurable interconnect elements are located between adjacent segments of the segmented conductors in both the second and third interconnect layers. Pass transistors located in the semiconductor substrate in between the functional circuit modules are connected between adjacent segments in both the second and third interconnect layers and between selected intersecting segments in the second and third interconnect layers.
    • 用户可配置电路架构包括布置在半导体衬底内的功能电路模块的二维阵列。 设置在半导体衬底上方并与半导体衬底绝缘的第一互连层包含多个导体并且用于功能电路模块内的内部连接。 设置在第一互连层之上并与第一互连层绝缘的第二互连层包含沿第一方向运行的多个导体的导体轨道,并用于互连功能电路模块的输入和输出。 设置在第二互连层之上并与第二互连层绝缘的第三互连层包含沿第二方向延伸的导体的多个分段轨迹,导体中的一些导体与第二互连层中的导体中的一个段形成相交;以及 用于互连功能电路模块输入和输出以实现所需的应用。 多个用户可配置的互连元件直接放置在第二和第三互连层中的分段导体的选定段的交叉处的第二和第三互连层之间。 更多用户可配置的互连元件位于第二和第三互连层中的分段导体的相邻段之间。 位于功能电路模块之间的半导体衬底中的通过晶体管连接在第二和第三互连层中的相邻段之间以及第二和第三互连层中的选定交叉段之间。