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41. 发明授权

US07574646B2 Data storage systems 失效
标题翻译：数据存储系统
公开(公告)号：US07574646B2
公开(公告)日：2009-08-11
申请号：US11286582
申请日：2005-11-25
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
IPC分类号： H03M13/00
CPC分类号： G11B20/1833
摘要： A method for decoding data in a data storage system includes generating an output bit stream; generating a first error corrected bit stream in dependence on the output bit stream; generating a second error corrected bit stream in dependence on the first error corrected bit stream; generating a checksum in dependence of the second error corrected bit stream; and, in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave: supplying data indicative of locations of correct bits in the second error corrected bit stream; and, regenerating the first error corrected bit stream in dependence on the pinning data.
摘要翻译：一种用于在数据存储系统中解码数据的方法包括：生成输出比特流; 根据输出比特流产生第一纠错比特流; 根据第一纠错比特流产生第二纠错比特流; 根据第二纠错比特流产生校验和; 并且在所述校验和指示所述第二纠错比特流中的错误并且所述第二纠错比特流包括至少一个正确交错的情况下：提供指示所述第二纠错比特流中的正确比特的位置的数据; 以及根据钉扎数据再生第一纠错比特流。

42. 发明申请

US20080284624A1 HIGH-RATE RLL ENCODING 失效
标题翻译：高速RLL编码
公开(公告)号：US20080284624A1
公开(公告)日：2008-11-20
申请号：US11749711
申请日：2007-05-16
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1446 , G11B2020/1473 , G11B2220/90 , G11B2220/956
摘要： An unencoded m-bit data input sequence is divided into a block of n bits and a block of m−n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D2) preceding. A second set of n+1 encoded bits is divided into P3 encoded subblocks and the P3 encoded subblocks are interleaved among (m−n)/s unencoded symbols so as to form a (m+1)-bit output sequence codeword which is then stored on a data storage medium.
摘要翻译：未编码的m位数据输入序列被分成n位块和m-n位块。 n位的块被划分为第一组n + 1个编码比特，其中第一组的P1个子块中的至少一个满足G，M和I约束。第一组n + 1个编码比特被映射到n + 1编码比特的第二组，其中第二组的P2个子块中的至少一个在1 /（1 + D 2）之后产生至少Q1个转换）。第二组n + 1编码比特被分成P3编码子块，并且P3编码子块在（mn）/ s个未编码符号之间进行交织，以形成第（m + 1）比特的输出序列码字，然后存储在数据存储介质。

43. 发明授权

US07421640B2 Method and apparatus for providing error correction capability to longitudinal position data 有权
标题翻译：向纵向位置数据提供纠错能力的方法和装置
公开(公告)号：US07421640B2
公开(公告)日：2008-09-02
申请号：US11205713
申请日：2005-08-17
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
IPC分类号： G11C29/00
CPC分类号： G11B20/1201 , G11B20/18 , G11B20/1866 , G11B20/20 , G11B2020/1282 , G11B2020/1284 , G11B2220/90
摘要： A method and apparatus for providing error correction capability to longitudinal position data are disclosed. Initially, data are encoded via a set of even LPOS words and a set of odd LPOS words. The encoded data are then decoded by generating a set of syndrome bits for each of the LPOS words. A determination is then made as to whether or not there is an error within one of the LPOS words based on its corresponding syndrome bits.
摘要翻译：公开了一种向纵向位置数据提供纠错能力的方法和装置。最初，通过一组偶数LPOS字和一组奇数LPOS字对数据进行编码。然后，通过为每个LPOS字生成一组校正子位来解码编码数据。然后，基于其对应的校正子位确定是否存在LPOS字之一内的错误。

44. 发明授权

US07064687B1 Techniques for modulating data using short block encoders 失效
标题翻译：使用短块编码器调制数据的技术
公开(公告)号：US07064687B1
公开(公告)日：2006-06-20
申请号：US11048273
申请日：2005-01-31
申请人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
发明人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
IPC分类号： H03M7/00
CPC分类号： H03M13/53 , G11B20/10009 , G11B20/1426 , G11B20/1809 , H03M5/145
摘要： Techniques are provided for applying modulation constraints to data streams using a short block encoder. A short block encoder encodes a subset of the bits in a data stream. Then, the even and odd interleaves in a data stream are separated into two data paths. A first modulation encoder encodes the even interleave according to a first modulation constraint. A second modulation encoder encodes the odd interleave according to a second modulation constraint, which in general coincides with the modulation constraint for even interleave.
摘要翻译：提供了使用短块编码器将调制限制应用于数据流的技术。短块编码器编码数据流中的比特的子集。然后，数据流中的偶数和奇数交织被分成两个数据路径。第一调制编码器根据第一调制约束编码偶数交织。第二调制编码器根据第二调制约束对奇数交织进行编码，其通常与用于偶数交织的调制约束一致。

45. 发明授权

US06643814B1 Maximum transition run encoding and decoding systems 失效
标题翻译：最大过渡运行编码和解码系统
公开(公告)号：US06643814B1
公开(公告)日：2003-11-04
申请号：US09583193
申请日：2000-05-30
申请人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Dave James Stanek
发明人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Dave James Stanek
IPC分类号： H03M1300
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1434 , G11B2020/1446 , H04L1/0041 , H04L25/4908
摘要： Maximum transition run encoding of a succession of M-bit data words to produce a succession of N-bit code words, where N→−M, for supply to a magnetic recording channel is described. Each M-bit data word is encoded in accordance with an MTR coding scheme to produce a G-bit word, where N→−G→M, such that the maximum number of consecutive bits of a first value, generally bits of value “1”, in a succession of the G-bit words is limited to a first predetermined value j1. The G-bit word is then encoded to produce an N-bit word in accordance with a second coding scheme.
摘要翻译：描述一系列M位数据字的最大过渡运行编码，以产生用于提供给磁记录通道的一系列N位码字，其中N→M。每个M位数据字根据MTR编码方案进行编码以产生G位字，其中N→G→M，使得第一值的连续位的最大数目通常是值的位在连续的G位字中的“1”限于第一预定值j1。然后根据第二编码方案对G位字进行编码以产生N位字。

46. 发明授权

US06460150B1 Noise-predictive post-processing for PRML data channel 有权
标题翻译： PRML数据通道的噪声预测后处理
公开(公告)号：US06460150B1
公开(公告)日：2002-10-01
申请号：US09517352
申请日：2000-03-02
申请人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
发明人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
IPC分类号： H03M1300
CPC分类号： H03M13/6331 , G11B20/10009 , H03M13/2707 , H03M13/41 , H03M13/6343
摘要： A method for use in connection with any kind of detector that receives an input signal via a partial-response channel and which provides a detector output signal and a merge-bit signal. According to the present scheme, the colored noise of the input signal is whitened in order to provide a filtered signal. The filtered signal is filtered to provide a first output signal using a first matched filter and a second output signal using a second matched filter. The merge-bit signal is used to adjust the first matched filter to match a first most likely error event and to adjust the second matched filter to match a second most likely error event. It is then determined whether said first likely error event or said second likely error event is the most likely error event, and the actual errors of detector output signal are corrected using said most likely error event.
摘要翻译：一种与通过部分响应信道接收输入信号并提供检测器输出信号和合并位信号的任何种类的检测器结合使用的方法。根据本方案，为了提供滤波信号，输入信号的着色噪声变白。滤波的信号被滤波以使用第二匹配滤波器使用第一匹配滤波器和第二输出信号提供第一输出信号。合并位信号用于调整第一匹配滤波器以匹配第一最可能的错误事件并且调整第二匹配滤波器以匹配第二最可能的错误事件。然后确定所述第一可能错误事件或所述第二可能错误事件是否是最可能的错误事件，并且使用所述最可能的错误事件来校正检测器输出信号的实际误差。

47. 发明申请

US20110007418A1 COMBINING INFORMATION FROM PARALLEL SERVO CHANNELS 失效
标题翻译：从并行伺服通道组合信息
公开(公告)号：US20110007418A1
公开(公告)日：2011-01-13
申请号：US12878722
申请日：2010-09-09
申请人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
发明人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
IPC分类号： G11B5/584
CPC分类号： G11B5/584
摘要： A weighted combining scheme exploits information from two servo channels operating in parallel. A timing-based servo module comprises two synchronous servo channels coupled respectively to receive two digital servo signals read from a data tape. Both channels have outputs for an unweighted parameter estimate and for a measure of the channel reliability. A weight computation module provides first and second weight signals using the measures of channel reliability from the servo channels. An offset computation module provides first and second offset terms which are summed with the unweighted parameter estimates. Multiplying nodes receive the unweighted parameter estimates and the weight signals and outputs offset weighted parameter estimates. A summing node receives the offset weighted parameter estimates and outputs a combined offset weighted parameter estimate to a servomechanism.
摘要翻译：加权组合方案利用来自并行操作的两个伺服通道的信息。基于定时的伺服模块包括分别耦合的两个同步伺服通道，以接收从数据磁带读取的两个数字伺服信号。两个通道具有未加权参数估计的输出和通道可靠性的度量。权重计算模块使用来自伺服信道的信道可靠性的测量来提供第一和第二加权信号。偏移计算模块提供与未加权参数估计相加的第一和第二偏移项。乘法节点接收未加权的参数估计和权重信号并输出偏移加权参数估计。求和节点接收偏移加权参数估计，并将组合的偏移加权参数估计输出到伺服机构。

48. 发明申请

US20100226037A1 COMBINING INFORMATION FROM PARALLEL SERVO CHANNELS 失效
标题翻译：从并行伺服通道组合信息
公开(公告)号：US20100226037A1
公开(公告)日：2010-09-09
申请号：US12400369
申请日：2009-03-09
申请人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
发明人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
IPC分类号： G11B5/596 , G11B5/584
CPC分类号： G11B5/584
摘要： A weighted combining scheme exploits information from two servo channels operating in parallel. A timing-based servo module servo module comprises two servo channels coupled respectively to receive two digital servo signals read from a data tape. Both channels have outputs for an unweighted metric and for a measure of the channel reliability. A weight computation module provides first and second weight signals using the measures of channel reliability from the servo channels. A first multiplying node receives a first unweighted metric and a first weight signal and is operable to output a first weighted metric. A second multiplying node receives a second unweighted metric and a second weight signal and outputs a second weighted metric. A summing node receives the first and second weighted metrics and outputs a combined weighted metric to an LPOS word decoder.
摘要翻译：加权组合方案利用来自并行操作的两个伺服通道的信息。基于定时的伺服模块伺服模块包括分别耦合的两个伺服通道，以接收从数据磁带读取的两个数字伺服信号。两个通道都具有未加权度量的输出和通道可靠性的度量。权重计算模块使用来自伺服信道的信道可靠性的测量来提供第一和第二加权信号。第一乘法节点接收第一未加权度量和第一加权信号，并且可操作以输出第一加权度量。第二乘法节点接收第二未加权度量和第二加权信号并输出第二加权度量。求和节点接收第一和第二加权度量，并将组合加权度量输出到LPOS字解码器。

49. 发明申请

US20100328803A1 COMBINING INFORMATION FROM PARALLEL SERVO CHANNELS 失效
标题翻译：从并行伺服通道组合信息
公开(公告)号：US20100328803A1
公开(公告)日：2010-12-30
申请号：US12878704
申请日：2010-09-09
申请人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
发明人： Nhan Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
IPC分类号： G11B5/09
CPC分类号： G11B5/584
摘要： A weighted combining scheme exploits information from two servo channels operating in parallel. A timing-based servo module comprises two synchronous servo channels coupled respectively to receive two digital servo signals read from a data tape. Both channels have outputs for an unweighted parameter estimate and for a measure of the channel reliability. A weight computation module provides first and second weight signals using the measures of channel reliability from the servo channels. An offset computation module provides first and second offset terms which are summed with the unweighted parameter estimates. Multiplying nodes receive the unweighted parameter estimates and the weight signals and outputs offset weighted parameter estimates. A summing node receives the offset weighted parameter estimates and outputs a combined offset weighted parameter estimate to a servomechanism.
摘要翻译：加权组合方案利用来自并行操作的两个伺服通道的信息。基于定时的伺服模块包括分别耦合的两个同步伺服通道，以接收从数据磁带读取的两个数字伺服信号。两个通道具有未加权参数估计的输出和通道可靠性的度量。权重计算模块使用来自伺服信道的信道可靠性的测量来提供第一和第二加权信号。偏移计算模块提供与未加权参数估计相加的第一和第二偏移项。乘法节点接收未加权的参数估计和权重信号并输出偏移加权参数估计。求和节点接收偏移加权参数估计，并将组合的偏移加权参数估计输出到伺服机构。

50. 发明授权

US07839599B2 Combining information from parallel servo channels 失效
标题翻译：组合来自并行伺服通道的信息
公开(公告)号：US07839599B2
公开(公告)日：2010-11-23
申请号：US12400420
申请日：2009-03-09
申请人： Nhan X. Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
发明人： Nhan X. Bui , Giovanni Cherubini , Roy D. Cideciyan , Robert A. Hutchins , Jens Jelitto , Kazuhiro Tsuruta
IPC分类号： G11B5/584 , G11B21/02
CPC分类号： G11B5/584
摘要： A weighted combining scheme exploits information from two servo channels operating in parallel. A timing-based servo module comprises two synchronous servo channels coupled respectively to receive two digital servo signals read from a data tape. Both channels have outputs for an unweighted parameter estimate and for a measure of the channel reliability. A weight computation module provides first and second weight signals using the measures of channel reliability from the servo channels. An offset computation module provides first and second offset terms which are summed with the unweighted parameter estimates. Multiplying nodes receive the unweighted parameter estimates and the weight signals and outputs offset weighted parameter estimates. A summing node receives the offset weighted parameter estimates and outputs a combined offset weighted parameter estimate to a servomechanism.
摘要翻译：加权组合方案利用来自并行运行的两个伺服通道的信息。基于定时的伺服模块包括分别耦合的两个同步伺服通道，以接收从数据磁带读取的两个数字伺服信号。两个通道具有未加权参数估计的输出和通道可靠性的度量。权重计算模块使用来自伺服信道的信道可靠性的测量来提供第一和第二加权信号。偏移计算模块提供与未加权参数估计相加的第一和第二偏移项。乘法节点接收未加权的参数估计和权重信号并输出偏移加权参数估计。求和节点接收偏移加权参数估计，并将组合的偏移加权参数估计输出到伺服机构。

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