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1. 发明授权

US06643814B1 Maximum transition run encoding and decoding systems 失效
标题翻译：最大过渡运行编码和解码系统
公开(公告)号：US06643814B1
公开(公告)日：2003-11-04
申请号：US09583193
申请日：2000-05-30
申请人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Dave James Stanek
发明人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Dave James Stanek
IPC分类号： H03M1300
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1434 , G11B2020/1446 , H04L1/0041 , H04L25/4908
摘要： Maximum transition run encoding of a succession of M-bit data words to produce a succession of N-bit code words, where N→−M, for supply to a magnetic recording channel is described. Each M-bit data word is encoded in accordance with an MTR coding scheme to produce a G-bit word, where N→−G→M, such that the maximum number of consecutive bits of a first value, generally bits of value “1”, in a succession of the G-bit words is limited to a first predetermined value j1. The G-bit word is then encoded to produce an N-bit word in accordance with a second coding scheme.
摘要翻译：描述一系列M位数据字的最大过渡运行编码，以产生用于提供给磁记录通道的一系列N位码字，其中N→M。每个M位数据字根据MTR编码方案进行编码以产生G位字，其中N→G→M，使得第一值的连续位的最大数目通常是值的位在连续的G位字中的“1”限于第一预定值j1。然后根据第二编码方案对G位字进行编码以产生N位字。

2. 发明授权

US06557124B1 Method and system for encoding data for high performance error control 有权
标题翻译：用于编码数据的方法和系统用于高性能错误控制
公开(公告)号：US06557124B1
公开(公告)日：2003-04-29
申请号：US09613443
申请日：2000-07-11
申请人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Todd C. Truax
发明人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , Todd C. Truax
IPC分类号： G06F1100
CPC分类号： H04L1/0057 , G11B20/14 , G11B20/1426 , G11B2020/1434 , G11B2020/1446 , H03M5/145 , H03M13/05 , H03M13/31 , H04L1/0041 , H04L1/0045 , H04L1/007 , H04L25/4908
摘要： A method and apparatus for encoding a plurality of successive m-bit binary data words to produce a plurality of successive of n-bit binary code words, where n and m are positive integers and n is greater than m, for supply to a magnetic recording channel. Each m-bit binary data word is partitioned into a plurality of blocks of bits, and at least one said blocks of bits in each m-bit binary data word is encoded in accordance with a finite-state coding scheme to produce a plurality of successive n-bit binary code words. At least one stage of violation correction which transforms the plurality of successive n-bit binary code words. Violation correction includes detecting the occurrence of any of a plurality of prohibited bit patterns at one or more predetermined locations within each n-bit binary coded word, and replacing any prohibited bit pattern so detected by a corresponding substitute bit pattern. The finite-state coding scheme, the prohibited bit patterns, and corresponding substitute bit patterns are predetermined such that in a serial bit-steam comprising the successive n-bit binary code words, the maximum number of consecutive bits of a first value is limited to a first predetermined number j, where b greater or equal to 2, and the maximum number of consecutive bits of the a second value is limited to a second predetermined number k.
摘要翻译：一种用于编码多个连续m位二进制数据字以产生多个连续的n位二进制码字的方法和装置，其中n和m是正整数，并且n大于m，用于提供给磁记录渠道。每个m位二进制数据字被分割成多个位块，并且根据有限状态编码方案对每个m位二进制数据字中的至少一个所述位进行编码以产生多个连续的 n位二进制码字。至少一级违规校正，其转换多个连续的n位二进制码字。违规纠正包括检测在每个n位二进制编码字中的一个或多个预定位置处的多个禁止位模式中的任一个的出现，以及替换由相应的替代位模式所检测到的任何禁止位模式。有限状态编码方案，禁止比特模式和对应的替代比特模式是预定的，使得在包括连续的n比特二进制码字的串行比特流中，将第一值的连续比特的最大数目限制为第一预定数量j，其中b大于或等于2，并且第二值的连续比特的最大数量被限制为第二预定数量k。

3. 发明授权

US6158027A Enhanced noise-predictive maximum likelihood (NPML) data detection method and apparatus for direct access storage device (DASD) 有权
标题翻译：用于直接存取存储设备（DASD）的增强噪声预测最大似然（NPML）数据检测方法和装置
公开(公告)号：US6158027A
公开(公告)日：2000-12-05
申请号：US144230
申请日：1998-08-31
申请人： Gregory S. Bush , Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , David J. Stanek
发明人： Gregory S. Bush , Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , David J. Stanek
IPC分类号： G06F11/08 , G06F11/10 , G11B20/10 , G11B20/18 , G11B20/22 , H03M13/00 , H03M13/39 , H04L25/03 , H04L25/497
CPC分类号： G11B20/10296 , G11B20/22 , G11B20/18
摘要： A noise-predictive data detection method and apparatus are provided for enhanced noise-predictive maximum-likelihood (NPML) data detection in a direct access storage device. A data signal from a data channel in the direct access storage device is applied to a maximum-likelihood detector that provides an estimated sequence signal. A noise bleacher filter having a frequency response of (1+.alpha.D)/1-.beta.D.sup.2) receives a combined estimated sequence signal and data signal and provides a noise filtered signal. A matching and error event filter receives the noise filtered signal and provides an error event filtered signal. An error correction unit receives the estimated sequence signal from the maximum-likelihood detector and receives the error event filtered signal and provides an error corrected estimated sequence signal.
摘要翻译：提供一种噪声预测数据检测方法和装置，用于在直接存取存储装置中增强噪声预测最大似然（NPML）数据检测。来自直接访问存储设备中的数据信道的数据信号被应用于提供估计的序列信号的最大似然检测器。频率响应为（1+αD）/ 1-βD2的噪声漂白滤波器）接收组合的估计的序列信号和数据信号，并提供噪声滤波信号。匹配和错误事件滤波器接收噪声滤波信号并提供错误事件滤波信号。错误校正单元从最大似然检测器接收估计的序列信号，并接收错误事件滤波信号并提供纠错后的估计序列信号。

4. 发明授权

US06222879B1 Self contained equalization method and apparatus 有权
标题翻译：自包含均衡方法和装置
公开(公告)号：US06222879B1
公开(公告)日：2001-04-24
申请号：US09144165
申请日：1998-08-31
申请人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , John J. Stephenson
发明人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , John J. Stephenson
IPC分类号： H04B1500
CPC分类号： H04L25/03038 , G11B20/10009 , G11B20/10037 , G11B20/10055 , H04L2025/03477 , H04L2025/03617
摘要： A method and apparatus for automating the convergence of tap weights in an equalizer for a data channel is disclosed. The automated equalization method is contained within the channel and obtains a temporary copy of each of a plurality of current tap weights from a current tap weight memory, determines a direction for modifying the temporary copy of each of the plurality of current tap weights, constrains the modifications to the temporary copy of each of the plurality of current tap weights to produce adjusted tap weights and at the end of a read operation, stores the adjusted tap weights to the current tap weight memory for use during a next read operation. The sign—sign LMS products for each of the plurality of current tap weights is calculated, the sign—sign LMS products for each of the plurality of current tap weights is summed to produce a count and the count for each of the plurality of current tap weights is compared to a threshold produce a desired tap direction indicator for each of the plurality of current tap weights. The desired tap direction comprises a positive value if the count is more positive than the threshold and a negative value is if the count is more negative than the threshold. The summing further includes incrementing the count by +1 if the sign product is positive and by −1 if the sign product is negative. The constraining further includes moving odd/even taps in pairs having opposite signs so that the sum of the odd/even taps is unchanged.
摘要翻译：公开了一种用于使用于数据信道的均衡器中的抽头权重的收敛自动化的方法和装置。自动均衡方法包含在信道内，并从当前抽头权重存储器中获得多个当前抽头权重中的每一个的临时副本，确定用于修改多个当前抽头权重中的每一个的临时拷贝的方向，约束对多个当前抽头权重中的每一个的临时拷贝的修改以产生调整的抽头权重，并且在读取操作结束时，将调整的抽头权重存储到当前抽头权重存储器中以在下一次读取操作期间使用。计算多个当前抽头权重中的每一个的符号LMS乘积，将用于多个当前抽头权重中的每一个的符号LMS乘积相加以产生计数，并且对于多个当前抽头中的每个当前抽头将权重与阈值进行比较，为多个当前抽头权重中的每一个生成期望的抽头方向指示符。如果计数比阈值更正，则期望的抽头方向包括正值，并且如果计数比阈值更负的则为负值。如果符号积为正，则求和进一步包括将+1加1，如果符号乘积为负。约束还包括成对地移动具有相反符号的奇数/偶数抽头，使得奇数/偶数抽头的总和不变。

5. 发明授权

US07694205B2 Method and apparatus for providing a read channel having combined parity and non-parity post processing 有权
标题翻译：用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置
公开(公告)号：US07694205B2
公开(公告)日：2010-04-06
申请号：US11067851
申请日：2005-02-28
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： H03M13/45 , G11B20/10009 , G11B20/10055 , G11B20/1833 , G11B2020/1863 , H03M13/098 , H03M13/6343
摘要： A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.
摘要翻译：公开了一种用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置。后处理器组合奇偶校验和非奇偶校验后处理以进行奇偶校验和非奇偶校正，从而校正不能被奇偶校验检测到的错误事件。只有当它们的可能性高于设定的阈值时，才能保持非奇偶校验可检测误差事件。

6. 发明授权

US07395482B2 Data storage systems 有权
标题翻译：数据存储系统
公开(公告)号：US07395482B2
公开(公告)日：2008-07-01
申请号：US10739966
申请日：2003-12-18
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： H03M13/00
CPC分类号： G11B20/1833
摘要： A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called precoding to the modulation encoded bit stream. However, this precoding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before precoding is applied by the precoder. The decoder subsystem operates in the inverse manner.
摘要翻译：数据存储系统包括编码器子系统，包括纠错码编码器，调制编码器和预编码器，以及类似地包括检测器，逆预编码器，调制解码器和纠错码解码器的解码器子系统。误差校正编码器对输入用户比特流应用纠错码，并且调制编码器将所谓的调制或约束编码应用于纠错编码比特流。预编码器将所谓的预编码应用于调制编码比特流。然而，该预编码仅应用于位流的选定部分。还可以存在一个置换步骤，其中在由预编码器施加预编码之前，该位序列在调制编码器之后被置换。解码器子系统以相反的方式运行。

7. 发明授权

US07193802B2 Apparatus for providing dynamic equalizer optimization 失效
标题翻译：用于提供动态均衡器优化的装置
公开(公告)号：US07193802B2
公开(公告)日：2007-03-20
申请号：US10809230
申请日：2004-03-25
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning , Michael J. Ross , David J. Stanek
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning , Michael J. Ross , David J. Stanek
IPC分类号： G11B5/09 , G11B5/035 , H03K5/139
CPC分类号： G11B5/035
摘要： An apparatus for providing dynamic equalizer optimization is disclosed. The present invention solves the above-described problems by providing equalizer coefficient updates that converge towards the same solution as the direct method without having to first write a known pattern to the disk or requiring any prior knowledge of the data already written on the disk. The adaptive cosine function may be used to modify only a DFIR tap set, only the j and k parameters of a cosine equalizer or to modify both the tap set for a DFIR filter and the j and k parameters of the cosine equalizer. Another algorithm, such as the LMS algorithm, may be used to modify parameters not modified by the cosine algorithm.
摘要翻译：公开了一种用于提供动态均衡器优化的装置。本发明通过提供均衡器系数更新来解决上述问题，所述均衡器系数更新收敛于与直接方法相同的解决方案，而不必首先将已知模式写入盘或需要任何已经写入盘中的数据的任何知识。自适应余弦函数可用于仅修改DFIR抽头集，仅修改余弦均衡器的j和k参数，或者修改DFIR滤波器的抽头集合和余弦均衡器的j和k参数。可以使用诸如LMS算法的另一种算法来修改未被余弦算法修改的参数。

8. 发明授权

US08276038B2 Data storage systems 有权
标题翻译：数据存储系统
公开(公告)号：US08276038B2
公开(公告)日：2012-09-25
申请号：US11833274
申请日：2007-08-03
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： H03M7/46 , H03M13/03 , G11B20/18
CPC分类号： H03M5/145 , G11B20/1833 , G11B2020/1836 , H03M13/15 , H03M13/1515 , H03M13/27 , H03M13/6343
摘要： A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called preceding to the modulation encoded bit stream. However, this preceding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before preceding is applied by the precoder. The decoder subsystem operates in the inverse manner.
摘要翻译：数据存储系统包括编码器子系统，包括纠错码编码器，调制编码器和预编码器，以及类似地包括检测器，逆预编码器，信道解码器和纠错码解码器的解码器子系统。误差校正编码器对输入用户比特流应用纠错码，并且调制编码器将所谓的调制或约束编码应用于纠错编码比特流。预编码器将所谓的前面应用于调制编码比特流。然而，上述内容仅适用于位流的选定部分。还可以存在一个置换步骤，其中比特序列在调制编码器之前被预编码器施加之前被置换。解码器子系统以相反的方式运行。

9. 发明授权

US06625235B1 Apparatus and method for noise-predictive maximum likelihood detection 失效
标题翻译：用于噪声预测最大似然检测的装置和方法
公开(公告)号：US06625235B1
公开(公告)日：2003-09-23
申请号：US09403628
申请日：1999-11-02
申请人： Jonathan D. Coker , Richard L. Galbraith , Evangelos S. Eleftheriou , Walter Hirt
发明人： Jonathan D. Coker , Richard L. Galbraith , Evangelos S. Eleftheriou , Walter Hirt
IPC分类号： H03D100
CPC分类号： G11B20/10175 , G11B20/10009
摘要： In a maximum likelihood sequence detector for symbol sequences which were equalized in a PR4 equalizer, noise prediction means (35) are provided including infinite impulse response (IIR) filtering, which have noise-whitening capabilities and are imbedded into the maximum likelihood detection process. The resulting INPML detector (10) can be implemented in digital or analog circuit technology. In addition, a DC-notch filter (44a) and a stochastic gradient procedure can be provided for DC offset compensation and for MR head or signal asymmetry compensation.
摘要翻译：在PR4均衡器中均衡的符号序列的最大似然序列检测器中，提供具有无限脉冲响应（IIR）滤波的噪声预测装置（35），其具有噪声增白能力并被嵌入到最大似然检测过程中。所得到的INPML检测器（10）可以以数字或模拟电路技术实现。此外，可以提供DC陷波滤波器（44a）和随机梯度程序用于DC偏移补偿和用于MR头或信号不对称补偿。

10. 发明授权

US09176817B2 Data management in solid state storage devices 有权
标题翻译：固态存储设备中的数据管理
公开(公告)号：US09176817B2
公开(公告)日：2015-11-03
申请号：US13617571
申请日：2012-09-14
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
IPC分类号： G11C29/00 , G06F11/10 , H03M13/05
CPC分类号： G06F11/108 , G06F11/1008 , G06F11/1068 , H03M13/05
摘要： A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory. An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the group containing write locations in that block. The recovered data is then re-stored as new input data.
摘要翻译：提供一种用于控制固态存储装置的机构，其中固态存储器包括每个包括多个数据写入位置的可擦除块。输入数据被存储在连续的数据写入位置组中，每个组包括在固态存储器的多个逻辑分区中的每一个中的一组可擦除块中的写入位置。输入数据被纠错编码，使得每个组包含用于该组中的输入数据的纠错码。指示固态存储器中的输入数据的位置的元数据被保存在存储器中。还保持了存储在每个数据写入位置中的数据的有效性的指示。在擦除块之前，从包含该块中的写入位置的组中恢复有效的输入数据。然后将恢复的数据重新存储为新的输入数据。

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