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41. 发明申请

US20060139883A1 Electronic packages, assemblies, and systems with fluid cooling and associated methods 有权
标题翻译：具有流体冷却和相关方法的电子封装，组件和系统
公开(公告)号：US20060139883A1
公开(公告)日：2006-06-29
申请号：US11363865
申请日：2006-02-27
申请人： Chuan Hu , Ravi Mahajan
发明人： Chuan Hu , Ravi Mahajan
IPC分类号： H05K7/20 , G06F1/20
CPC分类号： H01L23/473 , H01L2924/0002 , Y10T29/4913 , H01L2924/00
摘要： To accommodate high power densities associated with high-performance integrated circuits, an integrated circuit (IC) package includes a heat-dissipating structure in which heat is dissipated from a surface of one or more dice to a heat spreader. The heat spreader has a fluid-conducting channel formed therein, and a fluid coolant may be circulated through the channel via a micropump. In an embodiment, the channel is located at or near a surface of the heat spreader, and a heat-generating IC is in thermal contact with the heat spreader. In an embodiment, the IC is a thinned die that is coupled to the heat spreader via a thinned thermal interface material. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.
摘要翻译：为了适应与高性能集成电路相关联的高功率密度，集成电路（IC）封装包括散热结构，其中热量从一个或多个骰子的表面散发到散热器。散热器具有形成在其中的导流通道，并且流体冷却剂可以经由微型泵循环通过通道。在一个实施例中，通道位于散热器的表面处或附近，并且发热IC与散热器热接触。在一个实施例中，IC是经由变薄的热界面材料耦合到散热器的薄化管芯。还描述了制造方法以及将包装应用于电子组件和电子系统。

42. 发明申请

US20060107988A1 Densely packed thermoelectric cooler 有权
公开(公告)号：US20060107988A1
公开(公告)日：2006-05-25
申请号：US10996195
申请日：2004-11-22
申请人： Chuan Hu , David Chau
发明人： Chuan Hu , David Chau
IPC分类号： H01L35/34 , H01L35/28 , H01L37/00
CPC分类号： H01L35/34 , H01L23/38 , H01L35/32 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the invention provide a thin film thermoelectric cooler. The cooler may have a high packing density that provides good cooling performance. The cooler may be formed by forming a first set of cooling elements, depositing a conformal insulating layer on the first set, then forming a second set of cooling elements between the first set of elements.

43. 发明申请

US20060073640A1 Diamond substrate formation for electronic assemblies 有权
标题翻译：用于电子组件的金刚石基底形成
公开(公告)号：US20060073640A1
公开(公告)日：2006-04-06
申请号：US10960303
申请日：2004-10-06
申请人： Chuan Hu , Gregory Chrysler , Daoqiang Lu
发明人： Chuan Hu , Gregory Chrysler , Daoqiang Lu
IPC分类号： H01L21/50
CPC分类号： H01L21/76259 , H01L23/3732 , H01L2924/0002 , Y10S148/012 , H01L2924/00
摘要： Electronic assemblies and methods for forming assemblies including a diamond substrate are described. One embodiment includes providing a diamond support and forming a porous layer of SiO2 on the diamond support. A diamond layer is formed by chemical vapor deposition on the porous layer so that the porous layer is between the diamond support and the diamond layer. A polycrystalline silicon layer is formed on the diamond layer. The polycrystalline silicon layer is polished to form a planarized surface. A semiconductor layer is coupled to the polysilicon layer. After coupling the semiconductor layer to the polysilicon layer, the diamond support is detached from the diamond layer by breaking the porous layer. The semiconductor layer on the diamond layer substrate is then further processed to form a semiconductor device.
摘要翻译：描述了包括金刚石基底的用于形成组件的电子组件和方法。一个实施方案包括提供金刚石载体并在金刚石载体上形成SiO 2的多孔层。通过化学气相沉积在多孔层上形成金刚石层，使得多孔层位于金刚石支撑体和金刚石层之间。在金刚石层上形成多晶硅层。抛光多晶硅层以形成平坦化表面。半导体层耦合到多晶硅层。在将半导体层耦合到多晶硅层之后，金刚石支撑体通过破坏多孔层从金刚石层分离。然后将金刚石层基板上的半导体层进一步处理以形成半导体器件。

44. 发明授权

US07012011B2 Wafer-level diamond spreader 失效
公开(公告)号：US07012011B2
公开(公告)日：2006-03-14
申请号：US10876511
申请日：2004-06-24
申请人： Gregory M. Chrysler , Chuan Hu
发明人： Gregory M. Chrysler , Chuan Hu
IPC分类号： H01I21/00
CPC分类号： H01L21/4882 , H01L21/78 , H01L23/3732 , H01L23/3735 , H01L2224/0401 , H01L2224/04026 , H01L2224/16225 , H01L2224/16227 , H01L2224/274 , H01L2224/73253 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/15312 , H01L2924/00
摘要： An embodiment of the present invention is a technique to heat spread at wafer level. A silicon wafer is thinned. A chemical vapor deposition diamond (CVDD) wafer processed. The CVDD wafer is bonded to the thinned silicon wafer to form a bonded wafer. Metallization is plated on back side of the CVDD wafer. The CVDD wafer is reflowed to flatten the back side.

45. 发明申请

US20050121778A1 Thinned die integrated circuit package 有权
标题翻译：薄模集成电路封装
公开(公告)号：US20050121778A1
公开(公告)日：2005-06-09
申请号：US11033325
申请日：2005-01-11
申请人： Cheng-Yi Liu , Johanna Swan , Steven Towle , Anna George , Chuan Hu
发明人： Cheng-Yi Liu , Johanna Swan , Steven Towle , Anna George , Chuan Hu
IPC分类号： H01L23/14 , H01L23/367 , H01L23/495
CPC分类号： H01L24/97 , H01L21/4871 , H01L23/142 , H01L23/36 , H01L23/367 , H01L23/49816 , H01L23/5389 , H01L24/11 , H01L24/19 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/05124 , H01L2224/05147 , H01L2224/13099 , H01L2224/16225 , H01L2224/16227 , H01L2224/20 , H01L2224/211 , H01L2224/32245 , H01L2224/73253 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15174 , H01L2924/15311 , H01L2924/3011 , H01L2224/83 , H01L2224/82 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
摘要翻译：一种方法和装置提供具有改进的散热和更容易制造的集成电路封装。集成电路封装包括使用导热材料附着到散热器的薄化半导体管芯。减薄的模头降低了模具/散热器组合的热阻，以改善从模具的热提取以及消除制造中的加工步骤。此外，薄型模具变得更加柔顺，因为它承受散热器的热/机械性能，以减少模具的应力引起的开裂。

46. 发明申请

US20140299999A1 INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A GLASS SOLDER MASK LAYER 有权
标题翻译：集成电路封装组件，包括玻璃焊盘掩模层
公开(公告)号：US20140299999A1
公开(公告)日：2014-10-09
申请号：US13859659
申请日：2013-04-09
申请人： Chuan Hu , Qing Ma , Chia-Pin Chiu
发明人： Chuan Hu , Qing Ma , Chia-Pin Chiu
IPC分类号： H01L23/48 , H01L21/56
CPC分类号： H01L23/481 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49894 , H01L24/19 , H01L24/96 , H01L25/0652 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/16235 , H01L2224/24137 , H01L2224/73209 , H01L2224/81005 , H01L2224/92133 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/181 , H01L2924/18161 , H01L2924/18162 , H01L2924/00
摘要： Embodiments of the present disclosure are directed towards techniques and configurations for integrated circuit package assemblies including a glass solder mask layer and/or bridge. In one embodiment, an apparatus includes one or more build-up layers having electrical routing features and a solder mask layer composed of a glass material, the solder mask layer being coupled with the one or more build-up layers and having openings disposed in the solder mask layer to allow coupling of package-level interconnect structures with the electrical routing features through the one or more openings. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例涉及包括玻璃焊接掩模层和/或桥的集成电路封装组件的技术和配置。在一个实施例中，一种装置包括具有电路径特征的一个或多个堆积层和由玻璃材料组成的焊接掩模层，该焊接掩模层与一个或多个堆积层耦合并且具有设置在焊接掩模层，以允许封装级互连结构与电路由特征通过一个或多个开口耦合。可以描述和/或要求保护其他实施例。

47. 发明申请

US20140167217A1 PACKAGE WITH DIELECTRIC OR ANISOTROPIC CONDUCTIVE (ACF) BUILDUP LAYER 有权
标题翻译：带电介质或异相导电（ACF）BUILDUP层的封装
公开(公告)号：US20140167217A1
公开(公告)日：2014-06-19
申请号：US13719836
申请日：2012-12-19
申请人： Chuan Hu , Dingying Xu , Yoshihiro Tomita
发明人： Chuan Hu , Dingying Xu , Yoshihiro Tomita
IPC分类号： H01L23/538 , H01L21/768
CPC分类号： H01L25/50 , H01L21/561 , H01L21/568 , H01L21/76838 , H01L23/3128 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/91 , H01L24/96 , H01L25/0655 , H01L25/16 , H01L2224/12105 , H01L2224/131 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16225 , H01L2224/16227 , H01L2224/27002 , H01L2224/27003 , H01L2224/27334 , H01L2224/2784 , H01L2224/29078 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81191 , H01L2224/81203 , H01L2224/83191 , H01L2224/83203 , H01L2224/8385 , H01L2224/83851 , H01L2224/96 , H01L2224/97 , H01L2924/12042 , H01L2924/00014 , H01L2224/27 , H01L2224/81 , H01L2224/83 , H01L2924/014 , H01L2924/0665 , H01L2924/00
摘要： Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having one or more dies connected to an integrated circuit substrate by an interface layer. In one embodiment, the interface layer may include an anisotropic portion configured to conduct electrical signals in the out-of-plane direction between one or more components, such as a die and an integrated circuit substrate. In another embodiment, the interface layer may be a dielectric or electrically insulating layer. In yet another embodiment, the interface layer may include an anisotropic portion that serves as an interconnect between two components, a dielectric or insulating portion, and one or more interconnect structures that are surrounded by the dielectric or insulating portion and serve as interconnects between the same or other components. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例涉及具有通过界面层连接到集成电路基板的一个或多个管芯的集成电路（IC）封装的技术和配置。在一个实施例中，界面层可以包括各向异性部分，其被配置为在诸如管芯和集成电路基板的一个或多个部件之间的面外方向上传导电信号。在另一个实施例中，界面层可以是介电层或电绝缘层。在另一个实施例中，界面层可以包括用作两个部件之间的互连的各向异性部分，电介质或绝缘部分，以及由电介质或绝缘部分包围并用作相互之间的互连的一个或多个互连结构或其他组件。可以描述和/或要求保护其他实施例。

48. 发明授权

US08541876B2 Microelectronic package having direct contact heat spreader and method of manufacturing same 有权
标题翻译：具有直接接触式散热器的微电子封装及其制造方法
公开(公告)号：US08541876B2
公开(公告)日：2013-09-24
申请号：US11242176
申请日：2005-09-30
申请人： Daoqiang Lu , Chuan Hu , Gilroy J. Vandentop , Shriram Ramanathan , Rajashree Baskaran , Valery M. Dubin
发明人： Daoqiang Lu , Chuan Hu , Gilroy J. Vandentop , Shriram Ramanathan , Rajashree Baskaran , Valery M. Dubin
IPC分类号： H01L23/10
CPC分类号： H01L24/83 , H01L21/4871 , H01L23/3735 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/18161 , H01L2924/19106 , H01L2924/00
摘要： A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
摘要翻译：一种制造具有直接接触散热器的微电子封装的方法，根据该方法形成的封装，根据该方法形成的模具散热器组合以及包含封装的系统。该方法包括金属化微电子管芯的背面以形成直接接触并固定到管芯背面的散热器主体，从而产生模具散热器组合。该封装包括模具散热器组合和与模具结合的衬底。

49. 发明申请

US20110147440A1 Solder in Cavity Interconnection Technology 有权
标题翻译：焊接在腔互连技术
公开(公告)号：US20110147440A1
公开(公告)日：2011-06-23
申请号：US12643084
申请日：2009-12-21
申请人： Chuan Hu
发明人： Chuan Hu
IPC分类号： B23K1/20 , B23K31/02 , B23K35/02
CPC分类号： H05K1/0271 , B23K1/0018 , B23K1/203 , B23K3/0623 , B23K2101/40 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/05647 , H01L2224/10135 , H01L2224/10145 , H01L2224/11442 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/1403 , H01L2224/16238 , H01L2224/81139 , H01L2224/81191 , H01L2224/81193 , H01L2224/81201 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/3841 , H05K1/11 , H05K13/0465 , H05K2201/10734 , Y10T428/12222 , H01L2924/00014 , H01L2924/00
摘要： An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities. Upon heating, solder balls are formed. The cavity is defined by spaced walls to keep the solder ball from bridging during a bonding process. In some embodiments, the solder bumps connected to the solder balls may have facing surfaces which are larger than the facing surfaces of the solder ball.
摘要翻译：互连技术可以使用模制焊料来限定焊球。掩模层可以被图案化以形成沉积在空腔中的空腔和焊膏。加热时，形成焊球。空腔由间隔壁限定，以在焊接过程中保持焊球不起桥接作用。在一些实施例中，连接到焊球的焊料凸块可以具有大于焊球的相对表面的相对表面。

50. 发明授权

US07682876B2 Electronic assemblies having a low processing temperature 有权
标题翻译：处理温度低的电子组件
公开(公告)号：US07682876B2
公开(公告)日：2010-03-23
申请号：US11957355
申请日：2007-12-14
申请人： Daoqiang Lu , Chuan Hu
发明人： Daoqiang Lu , Chuan Hu
IPC分类号： H01L21/00
CPC分类号： H01L24/83 , H01L23/3735 , H01L24/32 , H01L2224/04026 , H01L2224/29111 , H01L2224/32507 , H01L2224/83193 , H01L2224/83801 , H01L2224/8381 , H01L2224/83825 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/15747 , H01L2924/01028 , H01L2924/00014
摘要： Embodiments relate to electronic assemblies and methods for forming electronic assemblies. One method includes providing a die and a copper heat spreader that are to be coupled to one another through a thermal interface material. A layer of tin is formed on the copper heat spreader. The heat spreader and the die are clamped together with the tin positioned between the heat spreader and the die. The assembly is heated so that the tin melts and forms at least one intermetallic compound with copper from the heat spreader. The heat spreader is then coupled to the die through the intermetallic compound.
摘要翻译：实施例涉及用于形成电子组件的电子组件和方法。一种方法包括提供待通过热界面材料彼此耦合的管芯和铜散热器。在铜散热器上形成一层锡。散热器和模具与放置在散热器和模具之间的锡夹紧在一起。加热组件使得锡从散热器中熔化并与铜形成至少一种金属间化合物。然后通过金属间化合物将散热器耦合到管芯。

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