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41. 发明授权

US5371205A PDGF .alpha. receptor 失效
标题翻译： PDGFα受体
公开(公告)号：US5371205A
公开(公告)日：1994-12-06
申请号：US947358
申请日：1992-09-18
申请人： James D. Kelly , Mark J. Murray
发明人： James D. Kelly , Mark J. Murray
IPC分类号： C12N1/19 , C07K14/71 , C12N5/10 , C12N15/09 , C12N15/12 , G01N33/53 , C07H21/02 , A61K35/14 , C12N15/00 , C12Q1/68
CPC分类号： C07K14/71
摘要： Isolated DNA molecules that encode a novel PDGF receptor are disclosed. The receptor binds the AA, AB and BB isoforms of PDGF with high affinity. Cells transfected or transformed with the DNA molecules are also disclosed. The cells can be used within methods for detecting PDGF agonist or antagonist activity in a test compound.
摘要翻译：公开了编码新型PDGF受体的分离的DNA分子。该受体以高亲和力结合PDGF的AA，AB和BB同种型。还公开了用DNA分子转染或转化的细胞。细胞可用于在测试化合物中检测PDGF激动剂或拮抗剂活性的方法中。

42. 发明授权

US4916214A Cationic complexes of technetium-99m 失效
标题翻译：锝99m阳离子配合物
公开(公告)号：US4916214A
公开(公告)日：1990-04-10
申请号：US254082
申请日：1988-10-06
申请人： Kwok W. Chiu , James D. Kelly , Ian A. Latham , David V. Griffiths , Peter G. Edwards
发明人： Kwok W. Chiu , James D. Kelly , Ian A. Latham , David V. Griffiths , Peter G. Edwards
IPC分类号： A61K51/00 , A61K51/04 , C07F9/50 , C07F9/655 , C07F9/68 , C07F9/72 , C07F13/00
CPC分类号： C07F9/6552 , A61K51/04 , C07F13/005 , C07F9/5027 , C07F9/723 , A61K2123/00
摘要： The invention concerns cationic complexes of Technetium-99m with bidentate ligands (L), including complexes having the formulae [Tc(NO) X L.sub.2 ].sup.+ and [Tc L.sub.3 ].sup.+, which are of interest as heart imaging agents. The ligands are characterized by having the formula Y.sub.2 QZQY.sub.2, where each Q is phosphorus or arsenic, Z is a 2 or 3 carbon atom linking group, and at least one of the groups Y and Z includes at least one --COC--ether group.

43. 发明授权

US4889919A Biologically active PDGF derived A-chain homodimers 失效
标题翻译：生物活性PDGF衍生的A链同源二聚体
公开(公告)号：US4889919A
公开(公告)日：1989-12-26
申请号：US942484
申请日：1986-12-15
申请人： Mark J. Murray , James D. Kelly
发明人： Mark J. Murray , James D. Kelly
IPC分类号： A61K38/00 , C07K14/15 , C07K14/49 , C12N15/62 , C12N15/81
CPC分类号： C07K14/005 , C07K14/49 , C12N15/625 , C12N15/81 , A61K38/00 , C07K2319/036 , C07K2319/75 , C12N2740/11022
摘要： Dimeric proteins having substantially the same biological activity as PDGF are disclosed. More specifically, the protein may have two substantially identical polypeptide chains, each of the chains being substantially homologous to the A-chain of PDGF. Alternatively, the protein may have two polypeptide chains that are substantially identical to the A-chain of PDGF. In addition, proteins comprising polypeptides that are variants or derivatives of the A-chain of PDGF are also disclosed. Therapeutic compositions containing these proteins and methods for enhancing the wound-healing process in warm-blooded animals are also disclosed.
摘要翻译：公开了具有与PDGF基本相同的生物活性的二聚体蛋白质。更具体地，蛋白质可以具有两个基本相同的多肽链，每条链与PDGF的A链基本上同源。或者，蛋白质可以具有与PDGF的A链基本相同的两条多肽链。此外，还公开了包含作为PDGF的A链的变体或衍生物的多肽的蛋白质。还公开了含有这些蛋白质的治疗组合物和用于增强温血动物中伤口愈合过程的方法。

44. 发明授权

US4769328A Expression of biologically active PDGF analogs in yeast 失效
标题翻译：生物活性PDGF类似物在酵母中的表达
公开(公告)号：US4769328A
公开(公告)日：1988-09-06
申请号：US660496
申请日：1984-10-12
申请人： Mark J. Murray , James D. Kelly
发明人： Mark J. Murray , James D. Kelly
IPC分类号： A61K35/16 , A61K38/00 , C12N15/67 , C12N15/78 , C12P21/00 , C12P19/34 , C12N15/00 , C12N5/00
CPC分类号： C12N15/78 , A61K35/16 , C12N15/67 , A61K38/00 , C07K2319/00 , C07K2319/02 , C07K2319/036 , C07K2319/75 , Y10S930/12
摘要： Biologically active PDGF analogs expressed in yeast are disclosed. The analogs are produced by yeast strains transformed with an extrachromosomal element composed of a strong transcriptional promoter directing the expression of a gene which encodes a protein having substantially the same biological activity as PDGF. Suitable genes include the v-sis gene or a derivative of the v-sis gene of simian sarcoma virus or portions thereof, or the human cDNA gene for PDGF or portions thereof. A secretory signal sequence may be provided upstream of the gene, enabling secretion of the gene product from the yeast host cell. Mitogenic activity is one of the biological activities possessed by these PDGF analogs, making them useful in promoting the growth of mammalian cells.
摘要翻译：公开了在酵母中表达的生物活性PDGF类似物。类似物由通过引导表达编码具有与PDGF基本相同的生物学活性的蛋白质的基因的强转录启动子组成的染色体外元件转化的酵母菌株产生。合适的基因包括v-sis基因或猿肉瘤病毒的v-sis基因的衍生物或其部分，或用于PDGF或其部分的人cDNA基因。可以在基因的上游提供分泌信号序列，从而能够从酵母宿主细胞分泌基因产物。有丝分裂活性是这些PDGF类似物所具有的生物活性之一，可用于促进哺乳动物细胞的生长。

45. 发明授权

US08217008B2 Methods of treating inflammatory disease using a soluble IL-20 receptor 有权
标题翻译：使用可溶性IL-20受体治疗炎性疾病的方法
公开(公告)号：US08217008B2
公开(公告)日：2012-07-10
申请号：US12899700
申请日：2010-10-07
申请人： Donald C. Foster , Wenfeng Xu , Karen L. Madden , James D. Kelly , Cindy A. Sprecher , Cameron S. Brandt , Mark W. Rixon , Scott R. Presnell , Brian A. Fox
发明人： Donald C. Foster , Wenfeng Xu , Karen L. Madden , James D. Kelly , Cindy A. Sprecher , Cameron S. Brandt , Mark W. Rixon , Scott R. Presnell , Brian A. Fox
IPC分类号： A61K38/03 , A61K45/00 , C07K14/54 , C12P21/02 , A61P17/00 , C12N15/09 , C12N5/07
CPC分类号： C07K16/2866 , A61K38/00 , C07K14/7155 , C07K2319/00
摘要： A soluble receptor to IL-20 having two polypeptide subunits, IL-20RA (formerly called ZcytoR7) and IL-20RB (formerly called DIRS1). The two subunits are preferably linked together. In one embodiment one subunit is fused to the constant region of the light chain of an immunoglobulin, and the other subunit is fused to the constant region of the heavy chain of the immunoglobulin. The light chain and the heavy chain are connected via a disulfide bond.
摘要翻译：具有两个多肽亚单位IL-20RA（以前称为ZcytoR7）和IL-20RB（以前称为DIRS1）的IL-20的可溶性受体。两个亚基优选连接在一起。在一个实施方案中，一个亚基与免疫球蛋白的轻链的恒定区融合，另一个亚基与免疫球蛋白的重链的恒定区融合。轻链和重链通过二硫键连接。

46. 发明授权

US08171334B2 Apparatus and method to interface two different clock domains 有权
标题翻译：接口两个不同时钟域的设备和方法
公开(公告)号：US08171334B2
公开(公告)日：2012-05-01
申请号：US12824463
申请日：2010-06-28
申请人： James D. Kelly
发明人： James D. Kelly
IPC分类号： G06F1/00 , G06F1/12 , G06F5/06
CPC分类号： G06F5/06
摘要： A gearbox is placed between two clock domains to allow data to be transferred from one domain to the other. Although the two domains may operate at the same clock frequency, typically one domain has a faster clock speed than the other. The gearbox is disposed between the two clock domains to control timing of data transfer from one to the other, by selecting a pattern which identifies when data is made transparent for the transfer. The gearbox allows a number of clock ratios to be selected, so that a particular clock ratio between the two domains may be readily selected in the gearbox for the data transfer.
摘要翻译：齿轮箱放置在两个时钟域之间，以允许数据从一个域传输到另一个域。尽管两个域可以在相同的时钟频率下工作，但通常一个域具有比另一个更快的时钟速度。齿轮箱设置在两个时钟域之间，以通过选择识别数据何时使传输透明的模式来控制数据从一个到另一个的数据传输的定时。齿轮箱允许选择多个时钟比，使得两个域之间的特定时钟比可以容易地在用于数据传输的变速箱中选择。

47. 发明授权

US5748917A Line data architecture and bus interface circuits and methods for dual-edge clocking of data to bus-linked limited capacity devices 失效
标题翻译：线路数据架构和总线接口电路和方法，用于将数据双边缘计时到总线连接的有限容量设备
公开(公告)号：US5748917A
公开(公告)日：1998-05-05
申请号：US579884
申请日：1995-12-28
申请人： William Todd Krein , Charles M. Flaig , James D. Kelly
发明人： William Todd Krein , Charles M. Flaig , James D. Kelly
IPC分类号： G06F13/42 , G06F13/38
CPC分类号： G06F13/4217
摘要： A data system architecture and interface circuits permit slow devices having limited signal capacities to launch and receive information from a central bus. Data is clocked onto the bus with a master circuit at the leading and trailing edges of the bus clock so that portions of a large multibit signal are launched without having to wait for the initiation of a next clock cycle. Accordingly, data portions are launched during both leading and trailing edges of the clock signal. In the case of a simple bus device not able to accommodate inclusion of a slave interface circuit, the received signal packet is provided in adapted form anticipating that only a second half portion of the signal packet will actually be registered as received.
摘要翻译：数据系统架构和接口电路允许具有有限信号容量的慢速设备从中央总线发射和接收信息。在总线时钟的前沿和下降沿，数据通过主电路在总线上被计时，从而在不必等待下一个时钟周期的启动的情况下启动大量多位信号的部分。因此，数据部分在时钟信号的前沿和后沿都被启动。在简单总线装置不能容纳从属接口电路的情况下，接收的信号分组以适合的形式提供，预期信号分组的仅一半部分实际上将被注册为接收的。

48. 发明授权

US5630077A System and method for coordinating access to a bus 失效
标题翻译：用于协调访问总线的系统和方法
公开(公告)号：US5630077A
公开(公告)日：1997-05-13
申请号：US626905
申请日：1996-04-04
申请人： William T. Krein , Charles M. Flaig , James D. Kelly
发明人： William T. Krein , Charles M. Flaig , James D. Kelly
IPC分类号： G06F13/364 , G06F13/00
CPC分类号： G06F13/364
摘要： To optimize system bus utilization in a computer system, a bus coordinator is included in the computer system to coordinate the transfer of information signals on the bus. Each time a source node wishes to transfer information to a destination node, the source node sends a request to the coordinator along with the identification of the destination node. Upon receiving this request, the coordinator determines whether the destination node has capacity to receive information signals. If the destination node has capacity, then the coordinator grants control of the system bus to the source node to allow the source node to send information signals to the destination node via the system bus. Otherwise, the source node is denied control of the system bus until the destination node has capacity to receive information signals. By granting control of the system bus to a source node only when the destination node has capacity to receive information signals, the coordinator ensures that no system bus time is wasted on unsuccessful information transfers. Thus, bus utilization is optimized.
摘要翻译：为了优化计算机系统中的系统总线利用率，计算机系统中包括总线协调器，以协调总线上信息信号的传输。每当源节点希望将信息传送到目的地节点时，源节点与目的地节点的标识一起向协调器发送请求。在接收到该请求之后，协调器确定目的地节点是否具有接收信息信号的能力。如果目标节点具有容量，则协调器将系统总线的控制权授予源节点，以允许源节点通过系统总线向目的地节点发送信息信号。否则，源节点被拒绝对系统总线的控制，直到目的节点具有接收信息信号的能力。只有当目的地节点具有接收信息信号的能力时，通过将系统总线的控制权授予源节点，协调器才能确保不会在不成功的信息传输上浪费系统总线时间。因此，优化了总线利用率。

49. 发明授权

US5592631A Bus transaction reordering using side-band information signals 失效
标题翻译：使用边带信息信号对总线事务重新排序
公开(公告)号：US5592631A
公开(公告)日：1997-01-07
申请号：US432620
申请日：1995-05-02
申请人： James D. Kelly , R. Stephen Polzin
发明人： James D. Kelly , R. Stephen Polzin
IPC分类号： G06F13/364 , G06F13/366
CPC分类号： G06F13/364
摘要： The present invention, generally speaking, provides a system and method of decoupling the address and data buses of a system bus using side band information signals. A computer system with which the invention may be used has a system bus including an address bus and a data bus and has, operatively connected to said system bus, multiple master devices, including a microprocessor, and multiple slave devices. In accordance with one embodiment of the invention, the address bus and the data bus are decoupled by providing, in addition to signals carried by the system bus, first side-band signals including, for each master device besides the microprocessor, an address arbitration signal, and providing, in addition to signals carried by the system bus, second side-band signals including, for each slave device, an address termination signal, a data arbitration signal, and a read-ready signal indicating that a respective slave device has data to present on the system bus. An address arbitration vector is formed, composed of address arbitration signals for the master devices, an address termination vector is formed, composed of address termination signals for the slave devices, and a read-ready vector is formed, composed of read-ready signals for the slave devices. The address arbitration vector and the address termination vector are sampled. Using a queue structure having a front and a rear, pairs of address arbitration and address termination vectors sampled at different sampling times are queued. Given a pair of address arbitration and address termination vectors at the head of the queue structure and a subsequent, corresponding read-ready vector, a data arbitration signal is issued to one of the slave devices and one of the master devices, as a "paired data bus grant."
摘要翻译：本发明一般地提供了一种使用边带信息信号去除系统总线的地址和数据总线的系统和方法。可以使用本发明的计算机系统具有包括地址总线和数据总线的系统总线，并且具有可操作地连接到所述系统总线的多个主设备，包括微处理器和多个从设备。根据本发明的一个实施例，地址总线和数据总线除了由系统总线携带的信号之外还提供第一边带信号，除了微处理器之外还包括每个主设备的地址仲裁信号并且除了由系统总线承载的信号之外，还提供第二边带信号，包括针对每个从设备的地址终止信号，数据仲裁信号和指示相应从设备具有数据的可读准备信号在系统总线上呈现。形成地址仲裁向量，由主设备的地址仲裁信号组成，形成地址终止向量，由从设备的地址终止信号组成，并且形成就绪向量，其包括用于从设备。对地址仲裁向量和地址终止向量进行采样。使用具有前端和后端的队列结构，对在不同采样时间采样的地址仲裁和地址终止矢量进行排队。给定在队列结构的头部的一对地址仲裁和地址终止向量以及随后的对应的可读向量，向其中一个从设备和一个主设备发出数据仲裁信号作为“配对数据总线授权。

50. 发明授权

US5590130A Bus protocol using separate clocks for arbitration and data transfer 失效
标题翻译：总线协议使用单独的时钟进行仲裁和数据传输
公开(公告)号：US5590130A
公开(公告)日：1996-12-31
申请号：US510557
申请日：1995-08-02
申请人： William T. Krein , Charles M. Flaig , James D. Kelly
发明人： William T. Krein , Charles M. Flaig , James D. Kelly
IPC分类号： G06F13/364 , G06F13/42 , H04L12/417
CPC分类号： G06F13/364 , G06F13/4217
摘要： A bus system uses separate clocks for arbitration and data transfer. The arbitration clock signal is used for synchronizing bus request and grant events, and the data clock signal is used for synchronizing data transmission and reception. In particular, the data clock signal, which is generated by a bus master node without any temporal relationship to the arbitration clock signal, is transmitted by the bus master node through the bus to a slave node, where the received data signal is synchronized with the data clock signal transmitted therewith.
摘要翻译：总线系统使用单独的时钟进行仲裁和数据传输。仲裁时钟信号用于同步总线请求和授权事件，并且数据时钟信号用于同步数据发送和接收。特别地，由总线主节点生成的与仲裁时钟信号没有任何时间关系的数据时钟信号由总线主节点通过总线传输到从节点，其中所接收的数据信号与数据时钟信号。

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