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41. 发明申请

US20050017304A1 Field effect transistor and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20050017304A1
公开(公告)日：2005-01-27
申请号：US10863226
申请日：2004-06-09
申请人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
发明人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
IPC分类号： H01L21/336 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01
CPC分类号： H01L29/785 , H01L21/84 , H01L27/1203 , H01L29/66795 , H01L29/7842 , H01L29/78603 , H01L2924/0002 , H01L2924/00
摘要： There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.
摘要翻译：提供了一种场效应晶体管，包括：第一绝缘膜，形成在半导体衬底上，并且至少包括具有与半导体衬底的界面上的晶体的晶格距离不同的结晶度的金属氧化物; 形成在所述第一绝缘膜的上方的与所述半导体基板的晶格距离不同的凸状沟道区域; 源极区域和漏极区域，分别在沟道区域的侧表面上形成在第一绝缘膜的上方; 在通道区域正上方形成的第二绝缘膜; 形成在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的侧面的栅极绝缘膜; 以及在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的至少侧面上通过栅极绝缘膜形成的栅极电极。

42. 发明授权

US08723152B2 Variable resistance memory 有权
标题翻译：可变电阻记忆
公开(公告)号：US08723152B2
公开(公告)日：2014-05-13
申请号：US13425687
申请日：2012-03-21
申请人： Yoshifumi Nishi , Hidenori Miyagawa , Daisuke Matsushita , Jun Fujiki , Takeshi Imamura
发明人： Yoshifumi Nishi , Hidenori Miyagawa , Daisuke Matsushita , Jun Fujiki , Takeshi Imamura
IPC分类号： H01L47/00
CPC分类号： H01L45/085 , H01L27/2472 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/149
摘要： A variable resistance memory according to an embodiment includes: a first wiring; a second wiring intersecting with the first wiring; a first electrode provided in an intersection region between the first wiring and the second wiring, the first electrode being connected to the first wiring; a second electrode connected to the second wiring, the second electrode facing to the first electrode; a variable resistance layer provided between the first electrode and the second electrode; and one of a first insulating layer and a first semiconductor layer formed at side portions of the second electrode. The one of the first insulating layer and the first semiconductor layer, and the second electrode form voids at the side portions of the second electrode.
摘要翻译：根据实施例的可变电阻存储器包括：第一布线; 与第一布线相交的第二布线; 设置在所述第一布线和所述第二布线之间的交叉区域中的第一电极，所述第一电极连接到所述第一布线; 连接到第二布线的第二电极，第二电极面对第一电极; 设置在所述第一电极和所述第二电极之间的可变电阻层; 以及形成在第二电极的侧部的第一绝缘层和第一半导体层之一。第一绝缘层和第一半导体层中的一个，第二电极形状在第二电极的侧部空隙。

43. 发明授权

US08569823B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08569823B2
公开(公告)日：2013-10-29
申请号：US13235970
申请日：2011-09-19
申请人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
发明人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L29/513 , H01L21/28282 , H01L27/11568 , H01L29/517 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

44. 发明授权

US08559216B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US08559216B2
公开(公告)日：2013-10-15
申请号：US13560557
申请日：2012-07-27
申请人： Naoki Yasuda , Daisuke Matsushita , Koichi Muraoka
发明人： Naoki Yasuda , Daisuke Matsushita , Koichi Muraoka
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2418 , H01L27/2481
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a plurality of first interconnections arranged parallel, a plurality of second interconnections arranged parallel to intersect the first interconnections, and memory cell portions respectively arranged at intersecting portions between the first and second interconnections and each configured by laminating a variable-resistance element and a diode element. The diode element has a laminated structure having a first insulating film, a conductive fine grain layer and a second insulating film. The physical film thickness of the second insulating film is greater than the first insulating film and the dielectric constant of the second insulating film is greater than the first insulating film.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括平行布置的多个第一互连，并行布置成与第一互连相交的多个第二互连，以及分别布置在第一和第二互连之间的相交部分处的每个配置的存储单元部分通过层叠可变电阻元件和二极管元件。二极管元件具有具有第一绝缘膜，导电细晶粒层和第二绝缘膜的层叠结构。第二绝缘膜的物理膜厚度大于第一绝缘膜，并且第二绝缘膜的介电常数大于第一绝缘膜。

45. 发明授权

US08557717B2 Method for manufacturing a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US08557717B2
公开(公告)日：2013-10-15
申请号：US12801912
申请日：2010-07-01
申请人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
发明人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L27/11568 , C23C8/02 , C23C8/24 , C23C8/80 , H01L21/2652 , H01L21/28202 , H01L21/28238 , H01L21/28273 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L27/115 , H01L27/11521 , H01L29/105 , H01L29/513
摘要： It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.
摘要翻译：可以抑制成膜时的缺陷的产生。一种制造半导体器件的方法，包括：将半导体衬底放置在大气中，从而在所述半导体衬底的表面上形成氮化物膜，所述气氛包含氮化所述半导体衬底的表面的第一氮化气体和第一稀释气体实际上不与半导体衬底反应，第一稀释气体的分压和第一氮化气体的分压与第一氮化气体的分压之和的比率为5以上，气氛为40乇或更低。

46. 发明申请

US20130240825A1 NONVOLATILE VARIABLE RESISTANCE ELEMENT AND METHOD OF MANUFACTURING THE NONVOLATILE VARIABLE RESISTANCE ELEMENT 审中-公开
标题翻译：非挥发性可变电阻元件和制造非易失性电阻元件的方法
公开(公告)号：US20130240825A1
公开(公告)日：2013-09-19
申请号：US13825688
申请日：2011-02-28
申请人： Shosuke Fujii , Daisuke Matsushita , Tomoya Kawai
发明人： Shosuke Fujii , Daisuke Matsushita , Tomoya Kawai
IPC分类号： H01L45/00
CPC分类号： H01L45/128 , H01L45/085 , H01L45/148
摘要： According to one embodiment, a first electrode, a second electrode, and a variable resistance layer are provided. The variable resistance layer is arranged between the first electrode and the second electrode and contains a polycrystalline semiconductor as a main component.
摘要翻译：根据一个实施例，提供第一电极，第二电极和可变电阻层。可变电阻层设置在第一电极和第二电极之间，并且以多晶半导体为主要成分。

47. 发明申请

US20120235223A1 NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20120235223A1
公开(公告)日：2012-09-20
申请号：US13427587
申请日：2012-03-22
申请人： Ryuji OHBA , Daisuke Matsushita
发明人： Ryuji OHBA , Daisuke Matsushita
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： B82Y10/00 , G11C16/0466 , H01L21/28273 , H01L21/28282 , H01L29/42332 , H01L29/7881 , H01L29/792
摘要： According to one embodiment, a nonvolatile semiconductor memory including a first gate insulating film formed on a channel region of a semiconductor substrate, a first particle layer formed in the first gate insulating film, a charge storage part formed on the first gate insulating film, a second gate insulating film which is formed on the charge storage part, a second particle layer formed in the second gate insulating film, and a gate electrode formed on the second gate insulating film. The first particle layer includes first conductive particles that satisfy Coulomb blockade conditions. The second particle layer includes second conductive particles that satisfy Coulomb blockade conditions and differs from the first conductive particles in average particle diameter.
摘要翻译：根据一个实施例，一种非易失性半导体存储器，包括形成在半导体衬底的沟道区上的第一栅极绝缘膜，形成在第一栅极绝缘膜中的第一颗粒层，形成在第一栅极绝缘膜上的电荷存储部，形成在电荷存储部上的第二栅极绝缘膜，形成在第二栅极绝缘膜中的第二粒子层和形成在第二栅极绝缘膜上的栅电极。第一颗粒层包括满足库仑阻挡条件的第一导电颗粒。第二粒子层包含满足库仑阻挡条件的第二导电粒子，与第一导电粒子的平均粒径不同。

48. 发明申请

US20120142180A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120142180A1
公开(公告)日：2012-06-07
申请号：US13370532
申请日：2012-02-10
申请人： Daisuke MATSUSHITA , Koichi KATO , Yuichiro MITAINI
发明人： Daisuke MATSUSHITA , Koichi KATO , Yuichiro MITAINI
IPC分类号： H01L21/28
CPC分类号： H01L29/7926 , G11C16/0466 , H01L21/02164 , H01L21/02238 , H01L21/02312 , H01L21/28282 , H01L21/32105 , H01L27/11582 , H01L29/4908 , H01L29/66765 , H01L29/78678
摘要： A method of manufacturing a semiconductor device according to an embodiment, includes: forming a stack structure by alternately stacking control gate electrodes and interlayer insulating films; forming a through-hole that penetrates through the stack structure in a stacking direction of the control gate electrodes and the interlayer insulating films; forming a first insulating film that covers an inner surface of the through-hole; forming a charge storage layer that covers an inner surface of the first insulating film; forming a second insulating film that covers an inner surface of the charge storage layer; forming a semiconductor layer that covers an inner surface of the second insulating film; and oxidizing an interface between the semiconductor layer and the second insulating film by performing a heat treatment in an atmosphere containing O2 gas at a temperature of 600° C. or lower.
摘要翻译：根据实施例的制造半导体器件的方法包括：通过交替堆叠控制栅电极和层间绝缘膜形成堆叠结构; 在所述控制栅电极和所述层间绝缘膜的堆叠方向上形成穿过所述堆叠结构的通孔; 形成覆盖所述通孔的内表面的第一绝缘膜; 形成覆盖所述第一绝缘膜的内表面的电荷存储层; 形成覆盖所述电荷存储层的内表面的第二绝缘膜; 形成覆盖所述第二绝缘膜的内表面的半导体层; 在600℃以下的温度下，在含有O 2气体的气氛中进行热处理，氧化半导体层与第二绝缘膜的界面。

49. 发明申请

US20120068250A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120068250A1
公开(公告)日：2012-03-22
申请号：US13235970
申请日：2011-09-19
申请人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
发明人： Tsunehiro Ino , Masao Shingu , Shosuke Fujii , Akira Takashima , Daisuke Matsushita , Jun Fujiki , Naoki Yasuda , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L29/513 , H01L21/28282 , H01L27/11568 , H01L29/517 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film.
摘要翻译：根据一个实施例，半导体器件包括半导体区域，设置在半导体区域上的隧道绝缘膜，设置在隧道绝缘膜上并具有包含立方体区域的氧化铪的电荷存储绝缘膜，设置在电荷存储绝缘膜和设置在块绝缘膜上的控制栅电极。

50. 发明授权

US08093126B2 Nonvolatile semiconductor memory device, semiconductor device and manufacturing method of nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件，半导体器件和非易失性半导体存储器件的制造方法
公开(公告)号：US08093126B2
公开(公告)日：2012-01-10
申请号：US12659694
申请日：2010-03-17
申请人： Yuuichiro Mitani , Daisuke Matsushita , Ryuji Ooba , Isao Kamioka , Yoshio Ozawa
发明人： Yuuichiro Mitani , Daisuke Matsushita , Ryuji Ooba , Isao Kamioka , Yoshio Ozawa
IPC分类号： H01L21/336
CPC分类号： H01L29/513 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42332 , H01L29/785 , H01L29/7881
摘要： A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the substrate. The tunnel insulating film has a three-layered structure having a silicon nitride film sandwiched between silicon oxide films. The silicon nitride film is continuous in an in-plane direction and has 3-coordinate nitrogen bonds and at least one of second neighboring atoms of nitrogen is nitrogen.
摘要翻译：非易失性半导体存储器件包括通过在半导体衬底上层叠隧道绝缘膜，浮栅电极，多晶硅绝缘膜和控制栅极电极以及形成在衬底上的源极和漏极区域而形成的栅极部分。隧道绝缘膜具有夹在氧化硅膜之间的氮化硅膜的三层结构。氮化硅膜在面内方向上是连续的并且具有3-配位氮键，并且第二相邻的氮原子中的至少一个是氮。

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