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31. 发明授权

US08530874B1 Insulated phase change memory 有权
标题翻译：绝缘相变存储器
公开(公告)号：US08530874B1
公开(公告)日：2013-09-10
申请号：US12828463
申请日：2010-07-01
申请人： Enrico Varesi
发明人： Enrico Varesi
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , H01L27/2481 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/144
摘要： A phase change memory may include a plurality of thin layers covering a stack including a chalcogenide and a heater. The thin layers may form a barrier to heat loss. The thin layers may be the same or different materials. The layers may also be chemically or morphologically altered to improve the adverse affect of the interface between the layers on heat transfer.
摘要翻译：相变存储器可以包括覆盖包括硫族化物和加热器的堆叠的多个薄层。薄层可能形成热损失的障碍。薄层可以是相同或不同的材料。这些层也可以化学或形态改变，以改善热传递层之间的界面的不利影响。

32. 发明申请

US20130193402A1 PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：相变随机访问存储器件及其制造方法
公开(公告)号：US20130193402A1
公开(公告)日：2013-08-01
申请号：US13482240
申请日：2012-05-29
申请人： Choon Kun RYU
发明人： Choon Kun RYU
IPC分类号： H01L27/26 , H01L21/02
CPC分类号： H01L45/06 , H01L27/2409 , H01L45/1293
摘要： A phase-change random access memory (PCRAM) device and a method of manufacturing the same. The PCRAM device includes memory cells that each include a semiconductor substrate having a switching element, a lower electrode formed on the switching element, a phase-change layer formed on the lower electrode, and an upper electrode formed on the phase-change layer; and a porous insulating layer arranged to insulate one memory cell from another memory cell of the memory cells.
摘要翻译：相变随机存取存储器（PCRAM）装置及其制造方法。 PCRAM装置包括存储单元，每个存储单元包括具有开关元件的半导体衬底，形成在开关元件上的下电极，形成在下电极上的相变层和形成在相变层上的上电极; 以及布置成将一个存储单元与存储单元的另一存储单元绝缘的多孔绝缘层。

33. 发明授权

US08298938B2 Phase change memory cell structures and methods 有权
公开(公告)号：US08298938B2
公开(公告)日：2012-10-30
申请号：US13342172
申请日：2012-01-02
申请人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
发明人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
IPC分类号： H01L21/44
CPC分类号： H01L45/1683 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144
摘要： Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.

34. 发明授权

US08237140B2 Self-aligned, embedded phase change RAM 有权
标题翻译：自对准嵌入式相变RAM
公开(公告)号：US08237140B2
公开(公告)日：2012-08-07
申请号：US11424749
申请日：2006-06-16
申请人： Hsiang Lan Lung , Shih Hung Chen
发明人： Hsiang Lan Lung , Shih Hung Chen
IPC分类号： H01L45/00
CPC分类号： H01L27/2436 , G11C13/0004 , H01L27/2463 , H01L45/06 , H01L45/1226 , H01L45/1293 , H01L45/14 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1641 , H01L45/1675 , H01L45/1683 , H01L45/1691
摘要： An integrated circuit with an embedded memory comprises a substrate and a plurality of conductor layers arranged for interconnecting components of the integrated circuit. An intermediate layer in the plurality of conductor layers includes a first electrode having a top surface, a second electrode having a top surface, an insulating member between the first electrode and the second electrode. A bridge overlies the intermediate layer between the first and second electrodes across the insulating member, wherein the bridge comprises a programmable resistive memory material, such as a phase change material. A conductor in at least one layer in the plurality of conductor layers over said intermediate layer is connected to said bridge.
摘要翻译：具有嵌入式存储器的集成电路包括衬底和布置用于互连集成电路的部件的多个导体层。多个导体层中的中间层包括具有顶表面的第一电极，具有顶表面的第二电极，在第一电极和第二电极之间的绝缘构件。桥跨过绝缘构件覆盖在第一和第二电极之间的中间层，其中桥包括可编程电阻存储器材料，例如相变材料。在所述中间层上的多个导体层中的至少一层中的导体连接到所述桥。

35. 发明授权

US08138056B2 Thermally insulated phase change material memory cells with pillar structure 有权
标题翻译：具有柱结构的绝热相变材料记忆体
公开(公告)号：US08138056B2
公开(公告)日：2012-03-20
申请号：US12497596
申请日：2009-07-03
申请人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Bipin Rajendran , Alejandro G. Schrott , Yu Zhu
发明人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Bipin Rajendran , Alejandro G. Schrott , Yu Zhu
IPC分类号： H01L21/20 , H01L21/4763
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675 , H01L45/1683
摘要： A memory cell structure and method for forming the same. The method includes forming a pore within a dielectric layer. The pore is formed over the center of an electrically conducting bottom electrode. The method includes depositing a thermally insulating layer along at least one sidewall of the pore. The thermally insulating layer isolates heat from phase change current to the volume of the pore. In one embodiment phase change material is deposited within the pore and the volume of the thermally insulating layer. In another embodiment a pore electrode is formed within the pore and the volume of the thermally insulating layer, with the phase change material being deposited above the pore electrode. The method also includes forming an electrically conducting top electrode above the phase change material.
摘要翻译：一种存储单元结构及其形成方法。该方法包括在电介质层内形成孔。孔形成在导电底部电极的中心上方。该方法包括沿孔的至少一个侧壁沉积绝热层。绝热层将热量从相变电流隔离成孔的体积。在一个实施例中，相变材料沉积在孔隙和隔热层的体积内。在另一个实施方案中，孔隙电极形成在绝热层的孔隙和体积内，相变材料沉积在孔电极上方。该方法还包括在相变材料上形成导电顶电极。

36. 发明申请

US20120056148A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20120056148A1
公开(公告)日：2012-03-08
申请号：US13137687
申请日：2011-09-02
申请人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
发明人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
IPC分类号： H01L45/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675
摘要： A semiconductor device may include, but is not limited to: a first insulating film; a second insulating film over the first insulating film; a first memory structure between the first and second insulating films; and a third insulating film between the first and second insulating films. The first memory structure may include, but is not limited to: a heater electrode; and a phase-change memory element between the heater electrode and the second insulating film. The phase-change memory element contacts the heater electrode. The third insulating film covers at least a side surface of the phase-change memory element. Empty space is positioned adjacent to at least one of the heater electrode and the third insulating film.
摘要翻译：半导体器件可以包括但不限于：第一绝缘膜; 第一绝缘膜上的第二绝缘膜; 第一和第二绝缘膜之间的第一存储器结构; 以及在第一和第二绝缘膜之间的第三绝缘膜。第一存储器结构可以包括但不限于：加热器电极; 以及加热器电极和第二绝缘膜之间的相变存储元件。相变存储元件接触加热器电极。第三绝缘膜覆盖相变存储元件的至少一个侧面。空的空间位于与加热器电极和第三绝缘膜中的至少一个相邻的位置。

37. 发明授权

US08097487B2 Method for making a phase change memory device with vacuum cell thermal isolation 有权
标题翻译：用于制造具有真空室热隔离的相变存储器件的方法
公开(公告)号：US08097487B2
公开(公告)日：2012-01-17
申请号：US12907286
申请日：2010-10-19
申请人： Hsiang-Lan Lung
发明人： Hsiang-Lan Lung
IPC分类号： H01L21/00
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/1246 , H01L45/1293 , H01L45/144 , H01L45/1625 , H01L45/1666
摘要： A memory device with improved thermal isolation. The memory cell includes a first electrode element, having an upper surface; an insulator stack formed on the first electrode element, including first, second and third insulating members, all generally planar in form and having a central cavity formed therein and extending therethrough, wherein the second insulator member is recessed from the cavity; a phase change element, generally T-shaped in form, having a base portion extending into the cavity to make contact with the first electrode element and making contact with the first and third insulating members, and a crossbar portion extending over and in contact with the third insulating member, wherein the base portion of the phase change element, the recessed portions of the second insulating member and the surfaces of the first and third insulating members define a thermal isolation void; and a second electrode formed in contact with the phase change member.
摘要翻译：具有改善热隔离度的存储器件。存储单元包括具有上表面的第一电极元件; 形成在所述第一电极元件上的绝缘体叠层，包括第一绝缘构件，第二绝缘构件和第三绝缘构件，其全部大致为平面形状并且具有形成在其中并延伸穿过其中的中心空腔，其中所述第二绝缘构件从所述空腔凹陷; 通常为T形的相变元件，具有延伸到空腔中的基部，以与第一电极元件接触并与第一和第三绝缘构件接触;以及横截面部分，其延伸越过并与其接触第三绝缘构件，其中相变元件的基部，第二绝缘构件的凹部和第一绝缘构件和第三绝缘构件的表面限定热隔离空间; 以及形成为与所述相变元件接触的第二电极。

38. 发明申请

US20110291065A1 PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS 有权
标题翻译：相变存储器单元结构和方法
公开(公告)号：US20110291065A1
公开(公告)日：2011-12-01
申请号：US12787070
申请日：2010-05-25
申请人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
发明人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L45/1683 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144
摘要： Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.
摘要翻译：本文描述了相变存储器单元结构和方法。形成相变存储单元结构的多种方法包括在第一电极上形成电介质堆叠结构，其中形成电介质叠层结构包括在电介质叠层结构的第一区和第三区之间形成第二区，第二区域，其热导率不同于第一区域的热导率，并且不同于介电叠层的第三区域的热导率。一个或多个实施例包括通过介电堆叠结构的第一，第二和第三区域形成通孔，在通孔中沉积相变材料，以及在相变材料上形成第二电极。

39. 发明授权

US08039298B2 Phase changeable memory cell array region and method of forming the same 有权
标题翻译：相变存储单元阵列区域及其形成方法
公开(公告)号：US08039298B2
公开(公告)日：2011-10-18
申请号：US12617782
申请日：2009-11-13
申请人： Hyeong-Geun An , Hideki Horii , Sang-Yeol Kang
发明人： Hyeong-Geun An , Hideki Horii , Sang-Yeol Kang
IPC分类号： H01L21/06 , H01L21/00 , G11C11/00
CPC分类号： H01L45/144 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1293 , H01L45/165 , H01L45/1666
摘要： A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions.
摘要翻译：相变存储单元阵列区域包括设置在半导体衬底上的下层间绝缘层。该区域还包括穿过下层间绝缘层设置的多个导电插塞。所述区域还包括可操作地设置在所述下层间绝缘层上的可相变材料图案，所述相变图案覆盖所述多个导电插塞中的至少两个，其中所述相变材料图案包括多个与第多个导电插塞中的多个和插入在多个第一区域之间的至少一个第二区域，其中至少一个第二区域具有比多个第一区域更低的热导率。相变存储单元阵列区域还包括覆盖相变材料图案和下层间绝缘层中的至少一个的上层间绝缘层。该区域还包括通过上层间绝缘层设置并电连接到多个第一区域中的多个预定区域的导电图案。

40. 发明申请

US20110207286A1 Reprogrammable Fuse Structure and Method 有权
标题翻译：可编程保险丝结构与方法
公开(公告)号：US20110207286A1
公开(公告)日：2011-08-25
申请号：US13100456
申请日：2011-05-04
申请人： Geoffrey W. Burr , Chandrasekharan Kothandaraman , Chung Hon Lam , Xiao Hu Liu , Stephen M. Rossnagel , Christy S. Tyberg , Robert L. Wisnieff
发明人： Geoffrey W. Burr , Chandrasekharan Kothandaraman , Chung Hon Lam , Xiao Hu Liu , Stephen M. Rossnagel , Christy S. Tyberg , Robert L. Wisnieff
IPC分类号： H01L21/768
CPC分类号： H01L23/5256 , H01L23/5252 , H01L45/06 , H01L45/1206 , H01L45/1226 , H01L45/1286 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1683 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.
摘要翻译：集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。

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