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1. 发明授权

US08513638B2 Semiconductor device including a phase-change memory element 失效
标题翻译：包括相变存储元件的半导体器件
公开(公告)号：US08513638B2
公开(公告)日：2013-08-20
申请号：US13137687
申请日：2011-09-02
申请人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
发明人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
IPC分类号： H01L29/02
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675
摘要： A semiconductor device may include, but is not limited to: a first insulating film; a second insulating film over the first insulating film; a first memory structure between the first and second insulating films; and a third insulating film between the first and second insulating films. The first memory structure may include, but is not limited to: a heater electrode; and a phase-change memory element between the heater electrode and the second insulating film. The phase-change memory element contacts the heater electrode. The third insulating film covers at least a side surface of the phase-change memory element. Empty space is positioned adjacent to at least one of the heater electrode and the third insulating film.
摘要翻译：半导体器件可以包括但不限于：第一绝缘膜; 第一绝缘膜上的第二绝缘膜; 第一和第二绝缘膜之间的第一存储器结构; 以及在第一和第二绝缘膜之间的第三绝缘膜。第一存储器结构可以包括但不限于：加热器电极; 以及加热器电极和第二绝缘膜之间的相变存储元件。相变存储元件接触加热器电极。第三绝缘膜覆盖相变存储元件的至少一个侧面。空的空间位于与加热器电极和第三绝缘膜中的至少一个相邻的位置。

2. 发明申请

US20120056148A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20120056148A1
公开(公告)日：2012-03-08
申请号：US13137687
申请日：2011-09-02
申请人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
发明人： Tomoyasu Kakegawa , Isamu Asano , Tsuyoshi Kawagoe , Hiromi Sasaoka , Naoya Higano , Yuta Watanabe
IPC分类号： H01L45/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675
摘要： A semiconductor device may include, but is not limited to: a first insulating film; a second insulating film over the first insulating film; a first memory structure between the first and second insulating films; and a third insulating film between the first and second insulating films. The first memory structure may include, but is not limited to: a heater electrode; and a phase-change memory element between the heater electrode and the second insulating film. The phase-change memory element contacts the heater electrode. The third insulating film covers at least a side surface of the phase-change memory element. Empty space is positioned adjacent to at least one of the heater electrode and the third insulating film.
摘要翻译：半导体器件可以包括但不限于：第一绝缘膜; 第一绝缘膜上的第二绝缘膜; 第一和第二绝缘膜之间的第一存储器结构; 以及在第一和第二绝缘膜之间的第三绝缘膜。第一存储器结构可以包括但不限于：加热器电极; 以及加热器电极和第二绝缘膜之间的相变存储元件。相变存储元件接触加热器电极。第三绝缘膜覆盖相变存储元件的至少一个侧面。空的空间位于与加热器电极和第三绝缘膜中的至少一个相邻的位置。

3. 发明授权

US08026502B2 Phase-change nonvolatile memory and manufacturing method therefor 有权
标题翻译：相变非易失性存储器及其制造方法
公开(公告)号：US08026502B2
公开(公告)日：2011-09-27
申请号：US12292433
申请日：2008-11-19
申请人： Tomoyasu Kakegawa
发明人： Tomoyasu Kakegawa
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1683
摘要： A phase-change nonvolatile memory (PRAM) is constituted of a semiconductor substrate, a lower electrode, a first interlayer insulating film having a first hole, an impurity diffusion layer embedded in the first hole, a second interlayer insulating film having a second hole whose diameter is smaller than the diameter of the first hole, a phase-change recording layer, and an upper electrode. The impurity diffusion layer is constituted of two semiconductor layers having different conductivity types, wherein one semiconductor layer is constituted of a base portion and a projecting portion having a heating spot in contact with the phase-change recording layer, while the other semiconductor layer is formed to surround the projecting portion. A depletion layer is formed in proximity to the junction surface so as to reduce the diameter of the heating spot, thus reducing the current value Ireset for writing data in to the phase-change recording layer.
摘要翻译：相变非易失性存储器（PRAM）由半导体衬底，下电极，具有第一孔的第一层间绝缘膜，嵌入第一孔中的杂质扩散层，具有第二孔的第二层间绝缘膜构成直径小于第一孔，相变记录层和上电极的直径。杂质扩散层由具有不同导电类型的两个半导体层构成，其中一个半导体层由基部和具有与相变记录层接触的加热点的突出部分构成，而另一半导体层形成以围绕突出部分。在接合表面附近形成耗尽层，以便减小加热点的直径，从而减少用于将数据写入相变记录层的电流值Ireset。

4. 发明申请

US20090134379A1 Phase-change nonvolatile memory and manufacturing method therefor 有权
标题翻译：相变非易失性存储器及其制造方法
公开(公告)号：US20090134379A1
公开(公告)日：2009-05-28
申请号：US12292433
申请日：2008-11-19
申请人： Tomoyasu Kakegawa
发明人： Tomoyasu Kakegawa
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1683
摘要： A phase-change nonvolatile memory (PRAM) is constituted of a semiconductor substrate, a lower electrode, a first interlayer insulating film having a first hole, an impurity diffusion layer embedded in the first hole, a second interlayer insulating film having a second hole whose diameter is smaller than the diameter of the first hole, a phase-change recording layer, and an upper electrode. The impurity diffusion layer is constituted of two semiconductor layers having different conductivity types, wherein one semiconductor layer is constituted of a base portion and a projecting portion having a heating spot in contact with the phase-change recording layer, while the other semiconductor layer is formed to surround the projecting portion. A depletion layer is formed in proximity to the junction surface so as to reduce the diameter of the heating spot, thus reducing the current value Ireset for writing data in to the phase-change recording layer.
摘要翻译：相变非易失性存储器（PRAM）由半导体衬底，下电极，具有第一孔的第一层间绝缘膜，嵌入第一孔中的杂质扩散层，具有第二孔的第二层间绝缘膜构成直径小于第一孔，相变记录层和上电极的直径。杂质扩散层由具有不同导电类型的两个半导体层构成，其中一个半导体层由基部和具有与相变记录层接触的加热点的突出部分构成，而另一半导体层形成以围绕突出部分。在接合表面附近形成耗尽层，以便减小加热点的直径，从而减少用于将数据写入相变记录层的电流值Ireset。

5. 发明申请

US20090026435A1 Phase change random access meomory and semiconductor device 有权
标题翻译：相变随机存取和半导体器件
公开(公告)号：US20090026435A1
公开(公告)日：2009-01-29
申请号：US12219367
申请日：2008-07-21
申请人： Tomoyasu Kakegawa
发明人： Tomoyasu Kakegawa
IPC分类号： H01L47/00
CPC分类号： H01L45/126 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/16
摘要： A phase change random access memory comprises an under electrode; an interlayer insulating layer which is formed on the under electrode; an impurity diffusion layer which is embedded into a pore through the interlayer insulating layer; a phase change recording layer which is formed on the interlayer insulating layer; an upper electrode which is formed on the phase change recording layer; a side gate electrode which is located on an inner wall of the pore into which the impurity diffusion layer is embedded; and a side gate insulating layer which is located between the side gate electrode and the impurity diffusion layer, wherein the side gate electrode applies an electric field to the impurity diffusion layer via the side gate insulating lay, the impurity diffusion layer is depleted, and so that an effective diameter of the impurity diffusion layer can become smaller than the pore diameter.
摘要翻译：相变随机存取存储器包括下电极; 形成在下电极上的层间绝缘层; 杂质扩散层，其通过层间绝缘层嵌入到孔中; 形成在层间绝缘层上的相变记录层; 形成在相变记录层上的上电极; 侧栅电极，其位于所述杂质扩散层嵌入的孔的内壁上; 位于侧栅电极和杂质扩散层之间的侧栅极绝缘层，其中侧栅电极通过侧栅极绝缘层向杂质扩散层施加电场，杂质扩散层耗尽，因此杂质扩散层的有效直径可以变得小于孔径。

6. 发明授权

US08574996B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US08574996B2
公开(公告)日：2013-11-05
申请号：US13533534
申请日：2012-06-26
申请人： Tomoyasu Kakegawa
发明人： Tomoyasu Kakegawa
IPC分类号： H01L21/20
CPC分类号： H01L45/06 , H01L27/2436 , H01L27/2472 , H01L45/141
摘要： A method of manufacturing a semiconductor device comprises: forming a processing target; forming a first supporter on the processing target; forming a first mask so as to contact one side surface of the first mask with a side surface of the first supporter; patterning the processing target using, as masks, the first mask and the first supporter; forming a second supporter so as to be contacted with a side surface of the processing target exposed in first processing step and the other side surface of the first mask; removing the first supporter; and patterning the processing target using, as masks, the first mask and the second supporter.
摘要翻译：一种制造半导体器件的方法包括：形成处理目标; 形成加工对象的第一支持者; 形成第一掩模以使第一掩模的一个侧表面与第一支撑件的侧表面接触; 使用第一掩模和第一支持体作为掩模来对加工对象进行图案化; 形成第二支撑件，以便与在第一处理步骤中暴露的处理目标的侧表面和第一掩模的另一个侧表面接触; 删除第一个支持者; 并使用第一掩模和第二支持体作为掩模来对加工对象进行图案化。

7. 发明授权

US07964935B2 Phase change random access memory and semiconductor device 有权
标题翻译：相变随机存取存储器和半导体器件
公开(公告)号：US07964935B2
公开(公告)日：2011-06-21
申请号：US12219367
申请日：2008-07-21
申请人： Tomoyasu Kakegawa
发明人： Tomoyasu Kakegawa
IPC分类号： H01L29/00
CPC分类号： H01L45/126 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/16
摘要： A phase change random access memory comprises an under electrode; an interlayer insulating layer which is formed on the under electrode; an impurity diffusion layer which is embedded into a pore through the interlayer insulating layer; a phase change recording layer which is formed on the interlayer insulating layer; an upper electrode which is formed on the phase change recording layer; a side gate electrode which is located on an inner wall of the pore into which the impurity diffusion layer is embedded; and a side gate insulating layer which is located between the side gate electrode and the impurity diffusion layer, wherein the side gate electrode applies an electric field to the impurity diffusion layer via the side gate insulating lay, the impurity diffusion layer is depleted, and so that an effective diameter of the impurity diffusion layer can become smaller than the pore diameter.
摘要翻译：相变随机存取存储器包括下电极; 形成在下电极上的层间绝缘层; 杂质扩散层，其通过层间绝缘层嵌入到孔中; 形成在层间绝缘层上的相变记录层; 形成在相变记录层上的上电极; 侧栅电极，其位于所述杂质扩散层嵌入的孔的内壁上; 位于侧栅电极和杂质扩散层之间的侧栅极绝缘层，其中侧栅电极通过侧栅极绝缘层向杂质扩散层施加电场，杂质扩散层耗尽，因此杂质扩散层的有效直径可以变得小于孔径。

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