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31. 发明授权

US06960529B1 Methods for sidewall protection of metal interconnect for unlanded vias using physical vapor deposition 有权
标题翻译：使用物理气相沉积法对未上空通孔进行金属互连的侧壁保护方法
公开(公告)号：US06960529B1
公开(公告)日：2005-11-01
申请号：US10373911
申请日：2003-02-24
申请人： Mark M. Nelson , Brett N. Williams , Jagdish Prasad
发明人： Mark M. Nelson , Brett N. Williams , Jagdish Prasad
IPC分类号： H01L21/311 , H01L21/768
CPC分类号： H01L21/76852
摘要： Methods for protecting the sidewall of a metal interconnect component using Physical Vapor Deposition (PVD) processes and using a single barrier metal material. After forming the metal interconnect component, a single barrier metal is deposited on its sidewall using PVD. A subsequent anisotropic etching of the barrier metal removes the barrier metal from the horizontal surface except for some that still remains on the top surface of the metal interconnect layer. A dielectric layer is then formed over the metal interconnect component and the barrier metal. The unlanded via is etched through the dielectric layer to the metal interconnect component, and then filled with a second metal to thereby allow the metal interconnect component to electrically connect with one or more upper metal layers.
摘要翻译：使用物理气相沉积（PVD）工艺和使用单个阻挡金属材料来保护金属互连部件的侧壁的方法。在形成金属互连部件之后，使用PVD在其侧壁上沉积单个阻挡金属。阻挡金属的随后的各向异性蚀刻从水平表面除去阻挡金属，除了仍然保留在金属互连层的顶表面上的阻挡金属。然后在金属互连部件和阻挡金属上形成电介质层。通过电介质层将未经过通孔蚀刻到金属互连部件，然后用第二金属填充，从而允许金属互连部件与一个或多个上金属层电连接。

32. 发明授权

US06870398B2 Distributed memory and logic circuits 有权
标题翻译：分布式存储器和逻辑电路
公开(公告)号：US06870398B2
公开(公告)日：2005-03-22
申请号：US10422137
申请日：2003-04-24
申请人： James R. Brown , Charles A. Edmondson , Brian R. Kauffmann
发明人： James R. Brown , Charles A. Edmondson , Brian R. Kauffmann
IPC分类号： G11C5/02 , G11C5/06 , G06F9/38
CPC分类号： G11C5/025 , G11C5/063
摘要： Systems and methods are disclosed for distributing memory within one or more regions of circuitry that perform logic functions (or other types of functions that require dense interconnect structures) on an integrated circuit. The distributed memory reduces high density routing congestion, allows increased logic utilization, and provides areas for additional interconnect structure. Various techniques are also disclosed for accessing the memory.
摘要翻译：公开了用于在执行在集成电路上执行逻辑功能（或需要密集互连结构的其它类型的功能）的电路的一个或多个区域内分配存储器的系统和方法。分布式存储器降低了高密度路由拥塞，允许增加逻辑利用率，并为附加互连结构提供区域。还公开了用于访问存储器的各种技术。

33. 发明申请

US20100142714A1 METHOD AND SYSTEM FOR ACOUSTIC SHOCK PROTECTION 失效
标题翻译：震动保护方法与系统
公开(公告)号：US20100142714A1
公开(公告)日：2010-06-10
申请号：US12686948
申请日：2010-01-13
申请人： Todd SCHNEIDER , Robert L. BRENNAN , David HERMANN , Tina SOLTANI
发明人： Todd SCHNEIDER , Robert L. BRENNAN , David HERMANN , Tina SOLTANI
IPC分类号： H03G11/00
CPC分类号： H03G7/002 , A61F2011/145 , H04R3/02 , H04R25/453
摘要： An acoustic shock protection method and device are provided. A pattern analysis-based approach is taken to an input signal to perform feature extraction. A parameter space is identified, which is corresponding to, the signal space of the input signal. A rule-based decision approach is taken to the parameter space to detect an acoustic shock event. The device may be advantageously implemented using a weighted overlap-add approach to provide low group delay, high-fidelity and a high degree of protection from acoustic shock events.
摘要翻译：提供了一种声学防震方法和装置。对输入信号进行基于模式分析的方法来执行特征提取。识别与输入信号的信号空间对应的参数空间。对参数空间进行基于规则的决策方法来检测声学冲击事件。该装置可以有利地使用加权重叠方法来实现，以提供低组延迟，高保真度和高度的防止声学冲击事件的保护。

34. 发明授权

US07693294B2 Method and system for reducing audible side effects of dynamic current consumption 有权
标题翻译：降低动态电流消耗的声音副作用的方法和系统
公开(公告)号：US07693294B2
公开(公告)日：2010-04-06
申请号：US11091743
申请日：2005-03-28
申请人： Todd Schneider , Andreas Drollinger , Marc Matthey , Jakob Nielsen
发明人： Todd Schneider , Andreas Drollinger , Marc Matthey , Jakob Nielsen
IPC分类号： H04R25/00
CPC分类号： H04R25/305 , H04R3/00 , H04R2225/33 , H04R2225/49 , H04R2460/03
摘要： A method and system for reducing audible side effects of dynamic current consumption is provided. The system includes an audio subsystem, and a plurality of digital subsystems. The audio subsystem and the digital subsystem are powered by a common power supply. T he digital subsystem processes data packets including audio data packets. The processing events implemented in one or more than one digital subsystem are reorganized to change the profile for executing the events inside the subsystem(s). The dynamic current spectral properties in one or more digital subsystems are changed.
摘要翻译：提供了一种降低动态电流消耗的声音副作用的方法和系统。该系统包括音频子系统和多个数字子系统。音频子系统和数字子系统由公共电源供电。数字子系统处理数据包，包括音频数据包。在一个或多于一个数字子系统中实现的处理事件被重新组织以改变用于执行子系统内的事件的简档。一个或多个数字子系统中的动态电流光谱特性发生变化。

35. 发明申请

US20090152100A1 Thick metal interconnect with metal pad caps at selective sites and process for making the same 有权
公开(公告)号：US20090152100A1
公开(公告)日：2009-06-18
申请号：US12012120
申请日：2008-01-31
申请人： Hormazdyar Minocher Dalal , Jagdish Prasad , Hocine Bouzid Ziad
发明人： Hormazdyar Minocher Dalal , Jagdish Prasad , Hocine Bouzid Ziad
IPC分类号： C23C14/04 , C23C14/34 , C23C14/14
CPC分类号： C23C14/022 , C23C14/165 , C23C14/584 , C23C18/1605 , C23C18/1651 , C23C18/32 , C23C18/54 , C23C28/321 , C23C28/322 , C23C28/34 , C23C28/345 , C25D5/022 , H01L21/76804 , H01L21/76834 , H01L21/76837 , H01L21/76885 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/03462 , H01L2224/0347 , H01L2224/04042 , H01L2224/05005 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05144 , H01L2224/05147 , H01L2224/05184 , H01L2224/05547 , H01L2224/05548 , H01L2224/05562 , H01L2224/05567 , H01L2224/05568 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48465 , H01L2224/4847 , H01L2224/48599 , H01L2224/48644 , H01L2224/48647 , H01L2224/48699 , H01L2224/48744 , H01L2224/48747 , H01L2924/0002 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/04941 , H01L2924/1305 , H01L2924/14 , H01L2924/1461 , H01L2924/00014 , H01L2924/01022 , H01L2924/00012 , H01L2224/13147 , H01L2224/13144 , H01L2924/00 , H01L2924/00015 , H01L2224/05552
摘要： The present invention relates to a high power IC (Integrated Circuit) semiconductor device and process for making same. More particularly, the invention encompasses a high conductivity or low resistance metal stack to reduce the device R-on which is stable at high temperatures while in contact with a thick aluminum wire-bond that is required for high current carrying capability and is mechanically stable against vibration during use, and process thereof. The invention further discloses a thick metal interconnect with metal pad caps at selective sites, and process for making the same.

36. 发明申请

US20090115437A1 HIGH TEMPERATURE RANGE ELECTRICAL CIRCUIT TESTING 有权
标题翻译：高温范围电路测试
公开(公告)号：US20090115437A1
公开(公告)日：2009-05-07
申请号：US11871716
申请日：2007-10-12
申请人： Ronald W. Young , Frank G.J. De Ruyck
发明人： Ronald W. Young , Frank G.J. De Ruyck
IPC分类号： G01R31/02
CPC分类号： G01R31/2891 , G01R31/2874
摘要： An electrical circuit testing assembly that includes a mechanical reference that is relatively stationary as compared to a circuit under test. A probe support assembly is coupled to the mechanical reference and includes probes for contacting interconnect pads on the circuit under test. Optionally, the probe support structure is attached to the mechanical reference via a column that is thermally resistive. Also optionally, a testing circuitry support structure (e.g., a printed circuit board) is not rigidly attached to the mechanical reference or to the probe support structure, thereby permitting the testing circuitry support structure to float with respect to the probe support structure.
摘要翻译：一种电路测试组件，其包括与被测电路相比相对静止的机械参考。探针支撑组件与机械参考件相连，并包括用于接触被测电路上的互连焊盘的探头。可选地，探针支撑结构通过耐热性柱连接到机械参考。还可选地，测试电路支撑结构（例如，印刷电路板）不是刚性地附接到机械参考或探针支撑结构，从而允许测试电路支撑结构相对于探针支撑结构浮动。

37. 发明申请

US20090097588A1 DIGITAL DATA ENCODING AND DECODING METHOD AND SYSTEM 有权
标题翻译：数字编码和解码方法与系统
公开(公告)号：US20090097588A1
公开(公告)日：2009-04-16
申请号：US12027703
申请日：2008-02-07
申请人： Alaa El-Agha , Dustin Griesdorf
发明人： Alaa El-Agha , Dustin Griesdorf
IPC分类号： H04L27/00
CPC分类号： H04J3/0602 , H04L7/041 , H04L25/4904 , H04L25/493
摘要： Digital data encoding and decoding method and system is provided. The method for digital data communication include encoding bit stream having monitoring a specific bit pattern in the bit stream when a frame signal is received, and based on the monitoring, creating a unique encoding pattern for the frame signal in encoded data. The system for digital data communication includes an encoder having a control unit for monitoring incoming bit stream to detect a specific bit pattern at a bit position relative to a frame signal and asserting a control signal, and a mark and space unit for generating encoded data having at least one of one or more marks and one or more spaces, based on the bit stream in response to the control signal so that the frame signal is embedded into the encoded data. The method for decoding includes recovering bit stream from encoded data. The encoded data is generated using a unique encoding pattern for a frame signal in the encoded data. The recovering includes detecting at least one of mark and space. The method includes recovering a frame signal from the encoded data, including detecting a pattern associated with the unique encoding pattern based on the detection of the at least one of mark and space. The system for decoding includes a first recover for recovering bit stream from encoded data. The encoded data is generated using a unique encoding pattern for a frame signal in the encoded data. The first recover includes a circuit for detecting at least one of mark and space. The system includes a second recover for recovering a frame signal from the encoded data. The second recover includes a circuit for detecting a pattern associated with the unique encoding pattern based on the detection of the at least one of mark and space.
摘要翻译：提供数字数据编码和解码方法和系统。用于数字数据通信的方法包括：当接收到帧信号时，具有在比特流中监视特定位模式的编码位流，并且基于监视，为编码数据中的帧信号创建唯一的编码模式。用于数字数据通信的系统包括：编码器，具有控制单元，用于监视输入位流，以相对于帧信号在位位置检测特定位模式，并且断言控制信号;以及标记和空间单元，用于产生具有基于比特流响应于控制信号，使一个或多个标记和一个或多个空格中的至少一个标记和一个或多个空格，使得帧信号被嵌入到编码数据中。解码方法包括从编码数据中恢复比特流。使用用于编码数据中的帧信号的唯一编码模式来生成编码数据。恢复包括检测标记和空间中的至少一个。该方法包括从编码数据中恢复帧信号，包括基于对标记和空间中的至少一个的检测来检测与唯一编码模式相关联的模式。用于解码的系统包括用于从编码数据中恢复比特流的第一恢复。使用用于编码数据中的帧信号的唯一编码模式来生成编码数据。第一恢复包括用于检测标记和空间中的至少一个的电路。该系统包括用于从编码数据中恢复帧信号的第二恢复。第二恢复包括用于基于对标记和空间中的至少一个的检测来检测与唯一编码模式相关联的模式的电路。

38. 发明授权

US07378858B2 Padé approximant based compensation for integrated sensor modules and the like 有权
标题翻译：用于集成传感器模块的Padé近似补偿等
公开(公告)号：US07378858B2
公开(公告)日：2008-05-27
申请号：US11700475
申请日：2007-01-30
申请人： Jose Marcos Laraia , Jose G. Taveira , Robert P. Moehrke
发明人： Jose Marcos Laraia , Jose G. Taveira , Robert P. Moehrke
IPC分类号： G01R27/26
CPC分类号： G01D3/028 , G01D3/022
摘要： Methods and systems using Pade' Approximant expansion ratios provide mappings between nonlinear sensors and a more linearized output domain. In one embodiment (a) a variable gain amplifier receives a supplied input signal, the amplifier has at least a first input terminal, an output terminal, and a gain control terminal; (b) a first summer coupled to the output terminal of the variable gain amplifier adds in a first offset signal; (c) a first multiplier coupled to an output of the first summer receives a proportional feedback factor signal and correspondingly generates a multiplied feedback; (d) a second summer coupled to an output terminal of the first multiplier adds in a corresponding second offset signal; and (e) a second multiplier coupled to an output of the second summer receives a gain factor signal and generates a multiplied gain signal; where the gain control terminal of the variable gain amplifier is operatively coupled to an output terminal of the second multiplier.
摘要翻译：使用Pade'近似膨胀比的方法和系统提供非线性传感器与更线性化的输出域之间的映射。在一个实施例中（a）可变增益放大器接收提供的输入信号，放大器至少具有第一输入端，输出端和增益控制端; （b）耦合到所述可变增益放大器的输出端的第一加法器添加第一偏移信号; （c）耦合到第一加法器的输出的第一乘法器接收比例反馈因子信号并相应地产生乘法反馈; （d）耦合到所述第一乘法器的输出端的第二加法器加上相应的第二偏移信号; 和（e）耦合到第二加法器的输出的第二乘法器接收增益因子信号并产生相乘的增益信号; 其中可变增益放大器的增益控制端可操作地耦合到第二乘法器的输出端。

39. 发明申请

US20080067605A1 SINGLE WELL EXCESS CURRENT DISSIPATION CIRCUIT 有权
标题翻译：单一电流消耗电路
公开(公告)号：US20080067605A1
公开(公告)日：2008-03-20
申请号：US11532477
申请日：2006-09-15
申请人： Matthew A. Tyler , John J. Naughton
发明人： Matthew A. Tyler , John J. Naughton
IPC分类号： H01L29/94 , H01L29/76
CPC分类号： H01L27/0262 , H01L29/7436
摘要： A current dissipation circuit that dissipates excess current to or from a circuit node when that monitored circuit node experiences abnormal voltage conditions, rather than having that excess current being dissipated through other protected circuitry. The current dissipation circuit may use single well technology, and may even provide reverse voltage protection without necessarily triggering more significant current dissipation. In another embodiment, the current dissipation circuit is provided by a series connection of at least five alternating p-type and n-type regions provided between the monitored circuit node and a current source or sink.
摘要翻译：一个电流耗散电路，当该监控电路节点经历异常电压条件时，将电流消耗到电路节点或从电路节点消散，而不是通过其他受保护电路消耗过量电流。电流耗散电路可以使用单阱技术，甚至可以提供反向电压保护，而不必触发更大的电流消耗。在另一个实施例中，电流耗散电路由提供在被监视的电路节点和电流源或接收器之间的至少五个交替的p型和n型区域的串联连接提供。

40. 发明授权

US07337425B2 Structured ASIC device with configurable die size and selectable embedded functions 有权
标题翻译：结构化ASIC器件，具有可配置的管芯尺寸和可选择的嵌入式功能
公开(公告)号：US07337425B2
公开(公告)日：2008-02-26
申请号：US10860894
申请日：2004-06-04
申请人： Robert S. Kirk
发明人： Robert S. Kirk
IPC分类号： G06F17/50
CPC分类号： H03K17/693 , G03F1/50 , G06F2217/64 , H01L21/78 , H01L27/11807
摘要： One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present invention provides for a common set of base tooling from which the master/universal base is created as well as additional custom bases with customized selection and quantity of embedded Platform ASIC functions. Embodiments can utilize conventional Structured ASIC architecture and processing and are compatible with traditional probing and packaging.
摘要翻译：本发明的一个实施例提供了一种主要或通用的基础和基础工具，其满足通用结构化ASIC要求。本发明的另一个实施例提供了一组通用的基础工具，其中创建了主/通用基座以及附加的定制基础，具有定制的嵌入式平台ASIC功能的选择和数量。实施例可以利用传统的结构化ASIC架构和处理，并且与传统的探测和封装兼容。

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