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31. 发明授权

US08829177B2 Enhanced engineered native promoters and uses thereof 有权
标题翻译：增强的工程化天然促进剂及其用途
公开(公告)号：US08829177B2
公开(公告)日：2014-09-09
申请号：US13375587
申请日：2010-06-05
申请人： David B. Rhoads , Jianmin Huang , Lynne L. Levitsky
发明人： David B. Rhoads , Jianmin Huang , Lynne L. Levitsky
IPC分类号： C07H21/02
CPC分类号： C12N15/63
摘要： We describe methods and DNA constructs/engineered mammalian promoters to enhance native promoter activity while retaining inherent regulation by inserting multi-copy response elements (REs) into non-adjacent locations. Multiple copies of REs are clustered in a group forming a transcription factor response element segment. The segment is at least duplicated in tandem upstream of the ATG start codon. Spacers of 0.2-0.7 kilo base pairs are introduced between the two segments and smaller spacers of about between 9-15 bp are introduced between the copies of REs within a segment.
摘要翻译：我们描述了方法和DNA构建体/工程化的哺乳动物启动子以增强天然启动子活性，同时通过将多拷贝响应元件（RE）插入非相邻位置来保留固有的调节。 RE的多个拷贝聚集在形成转录因子响应元件片段的组中。该段至少在ATG起始密码子的上游串联复制。在两段之间引入0.2-0.7千碱基对的间隔，并且在段之间的RE的拷贝之间引入约9-15bp的较小的间隔区。

32. 发明授权

US08713380B2 Non-volatile memory and method having efficient on-chip block-copying with controlled error rate 有权
标题翻译：非易失性存储器和方法具有有效的片内块复制和受控错误率
公开(公告)号：US08713380B2
公开(公告)日：2014-04-29
申请号：US13457247
申请日：2012-04-26
申请人： Chris Nga Yee Avila , Jianmin Huang , Lee M. Gavens , Idan Alrod
发明人： Chris Nga Yee Avila , Jianmin Huang , Lee M. Gavens , Idan Alrod
IPC分类号： G06F11/00
CPC分类号： G11C16/28 , G11C29/50004 , G11C2211/5634 , G11C2211/5641
摘要： A non-volatile memory chip having SLC blocks acting as a write cache for MLC blocks for high density storage requires constant copying or folding of SLC blocks into MLC blocks. To avoid the time-consuming toggling out and in of the pages of the entire SLC block for ECC checking by a controller chip, only a small sample is checked. An optimal read point for reading the memory cells in the sample of the SLC block is dynamically determined by trying different read points so that the data is read within an error budget. Once the optimal read point is determined, it is used to read the entire SLC block without further error checking. Then the SLC block can be copied (blind folded) to the MLC block with the confidence of being within the error budget.
摘要翻译：具有作为用于高密度存储的MLC块的写高速缓存的SLC块的非易失性存储器芯片需要将SLC块复制或折叠到MLC块中。为了避免在控制器芯片进行ECC检查的整个SLC块的页面中耗费时间的切换，仅检查小样本。通过尝试不同的读取点动态地确定用于读取SLC块样本中的存储单元的最佳读取点，以便在错误预算内读取数据。一旦确定了最佳读取点，它将用于读取整个SLC块而无需进一步的错误检查。然后可以将SLC块复制（盲目折叠）到MLC块，其置信度在错误预算之内。

33. 外观设计

USD694380S1 Heater 有权
公开(公告)号：USD694380S1
公开(公告)日：2013-11-26
申请号：US29424232
申请日：2012-06-08
申请人： Matthew Crowe , Jianmin Huang , Ming Wang
设计人： Matthew Crowe , Jianmin Huang , Ming Wang

34. 发明授权

US08566671B1 Configurable accelerated post-write read to manage errors 有权
标题翻译：可配置的加速写入后读取来管理错误
公开(公告)号：US08566671B1
公开(公告)日：2013-10-22
申请号：US13538927
申请日：2012-06-29
申请人： Jia Ye , Mrinal Kochar , Jianmin Huang
发明人： Jia Ye , Mrinal Kochar , Jianmin Huang
IPC分类号： G11C29/00
CPC分类号： G06F11/1048 , G11C16/00 , G11C29/42 , G11C2029/0409 , G11C2029/0411
摘要： Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. An error management provides reading and checking the copy after copying to the second portion. If the copy has excessive error bits, it is repeated in a different location either in the second or first portion. The reading and checking of the copy is accelerated by reading only a sample of it. The sample is selected from a subset of the copy having its own ECC, where the sample selected depends on the count of erase-program cycles that a block has experienced, where different count ranges can use different samples.
摘要翻译：非易失性存储器中的数据错误不可避免地随着使用而增加，并且每个单元存储更高密度的位。存储器被配置为具有以较小误差但是较低密度存储器操作的第一部分，以及以较高密度但较不牢固的存储器操作的第二部分。错误管理在复制到第二部分后提供读取和检查副本。如果副本具有过多的错误位，则在第二或第一部分的不同位置重复该复制。通过只读取样本来读取和检查副本。从具有其自己的ECC的副本的子集中选择样本，其中所选择的样本取决于块经历的擦除 - 编程周期的计数，其中不同的计数范围可以使用不同的样本。

35. 发明申请

US20130219107A1 WRITE ABORT RECOVERY THROUGH INTERMEDIATE STATE SHIFTING 审中-公开
标题翻译：通过中间状态转换进行写入恢复
公开(公告)号：US20130219107A1
公开(公告)日：2013-08-22
申请号：US13401494
申请日：2012-02-21
申请人： Dana Lee , Pao-Ling Koh , Jianmin Huang , Gautam A. Dusija
发明人： Dana Lee , Pao-Ling Koh , Jianmin Huang , Gautam A. Dusija
IPC分类号： G06F12/02
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C2211/5621 , G11C2211/5648
摘要： A memory system or flash card may include a multi-level cell block with multiple states. Before the upper page is written, an intermediate state may be shifted to prevent or minimize overlapping of the states from the corresponding lower page. A write abort during the writing of the upper page will not result in a loss of data from the corresponding lower page.
摘要翻译：存储器系统或闪存卡可以包括具有多个状态的多级单元块。在写入上页之前，可以移动中间状态以防止或最小化来自相应下页的状态的重叠。在写入上一页时写入中止不会导致相应下页的数据丢失。

36. 发明申请

US20130170301A1 Wordline-to-Wordline Stress Configuration 有权
标题翻译： Wordline到Wordline应力配置
公开(公告)号：US20130170301A1
公开(公告)日：2013-07-04
申请号：US13340437
申请日：2011-12-29
申请人： Mrinal Kochar , Jianmin Huang , Jun Wan , Jian Chen
发明人： Mrinal Kochar , Jianmin Huang , Jun Wan , Jian Chen
IPC分类号： G11C29/00
CPC分类号： G11C29/06 , G11C16/00 , G11C2029/1202
摘要： A method and system for performing wordline-to-wordline stress routines on a storage device is disclosed. Stress routines may be performed to reduce state widening in multi-level memory cells in the storage device. However, data retention problems may result if the stress routines are performed too often. In order to perform the stress routines at the proper times, a stress control variable is used. The stress control variable may be indicative of age of the storage device (such as the number of erase cycles performed on a memory block in the storage device). The stress control variable is input to a look-up table (or other logical construct), with the output of the look-up table indicating whether to perform the wordline-to-wordline stress routine. In this way, the stress routines may be performed to reduce state widening while reducing the ill effects of data retention.
摘要翻译：公开了一种用于在存储设备上执行字线到字线应力程序的方法和系统。可以执行应力程序以减少存储设备中的多级存储器单元中的状态变宽。但是，如果压力程序太频繁地执行，则可能会导致数据保留问题。为了在适当的时候执行压力程序，使用应力控制变量。应力控制变量可以指示存储设备的年龄（例如在存储设备中的存储器块上执行的擦除周期的数量）。压力控制变量被输入到查找表（或其他逻辑结构），查找表的输出指示是否执行字线到字线应力程序。以这种方式，可以执行应力程序以减少状态扩大，同时减少数据保留的不良影响。

37. 发明授权

US09183081B2 Systems and methods for performing defect detection and data recovery in a memory system 有权
标题翻译：用于在存储器系统中执行缺陷检测和数据恢复的系统和方法
公开(公告)号：US09183081B2
公开(公告)日：2015-11-10
申请号：US13795460
申请日：2013-03-12
申请人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
发明人： Abhijeet Manohar , Chris Avila , Jianmin Huang , Daniel Edward Tuers
IPC分类号： G06F11/00 , G06F11/10 , G11C29/52 , G11C29/04
CPC分类号： G06F11/1044 , G11C29/52 , G11C2029/0401 , G11C2029/0409 , G11C2029/0411
摘要： Systems and methods for performing defect detection and data recovery within a memory system are disclosed. A controller of a memory system may receive a command to write data in a memory of the memory system; determine a physical location of the memory that is associated with the data write; write data associated with the data write to the physical location; and store the physical location of the memory that is associated with the data write in a Tag cache. The controller may further identify a data keep cache of a plurality of data keep caches that is associated with the data write based on the physical location of the memory that is associated with the data write; update an XOR sum based on the data of the data write; and store the updated XOR sum in the identified data keep cache.
摘要翻译：公开了用于在存储器系统内执行缺陷检测和数据恢复的系统和方法。存储器系统的控制器可以接收在存储器系统的存储器中写入数据的命令; 确定与数据写入相关联的存储器的物理位置; 将与数据相关联的数据写入物理位置; 并将与数据写入相关联的存储器的物理位置存储在标签高速缓存中。控制器可以基于与数据写入相关联的存储器的物理位置，进一步识别与数据写入相关联的多个数据保持高速缓存的数据保持高速缓存; 基于数据写入的数据更新XOR和; 并将更新的XOR和存储在所识别的数据保持缓存中。

38. 发明授权

US08725935B2 Balanced performance for on-chip folding of non-volatile memories 有权
标题翻译：平衡性能，用于非易失性存储器的片上折叠
公开(公告)号：US08725935B2
公开(公告)日：2014-05-13
申请号：US13491879
申请日：2012-06-08
申请人： Yichao Huang , Jianmin Huang , Gautam Ashok Dusija , Oleg Kragel
发明人： Yichao Huang , Jianmin Huang , Gautam Ashok Dusija , Oleg Kragel
IPC分类号： G06F12/00
CPC分类号： G11C16/10 , G11C7/1042 , G11C11/5628 , G11C16/0483 , G11C2211/5641
摘要： A non-volatile memory system receives and stores host data. As the memory system receives host data, it initially writes the data in a binary format and then subsequently performs an on-chip folding operation on the data, storing the data in a multi-state format. The memory system interleaves the phases of the folding operations, where the host stores data according to allocation units. The memory system also can perform the binary and subsequent on-chip folding operations on multiple memory planes in parallel, where the controller also balances the operations. When the memory system needs a memory block for the writing of data, it selects blocks from a free block list, where the free block list includes a reserve portion that is only accessible for a specified set of commands.
摘要翻译：非易失性存储器系统接收并存储主机数据。当存储器系统接收主机数据时，它首先以二进制格式写入数据，然后对数据执行片上折叠操作，以多状态格式存储数据。存储器系统交织折叠操作的阶段，其中主机根据分配单元存储数据。存储器系统还可以并行地在多个存储器平面上执行二进制和随后的片上折叠操作，其中控制器还平衡操作。当存储器系统需要用于写入数据的存储器块时，它从空闲块列表中选择块，其中空闲块列表包括仅可用于指定的一组命令的预留部分。

39. 发明申请

US20130346805A1 FLASH MEMORY WITH TARGETED READ SCRUB ALGORITHM 有权
标题翻译：具有指定读取SCRUB算法的闪存
公开(公告)号：US20130346805A1
公开(公告)日：2013-12-26
申请号：US13529522
申请日：2012-06-21
申请人： Steven T. Sprouse , Alexandra Bauche , Yichao Huang , Jian Chen , Jianmin Huang , Dana Lee
发明人： Steven T. Sprouse , Alexandra Bauche , Yichao Huang , Jian Chen , Jianmin Huang , Dana Lee
IPC分类号： G06F11/28
CPC分类号： G11C16/3418 , G11B20/18 , G11B20/1883 , G11C16/3427 , G11C16/3431
摘要： A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation.
摘要翻译：已经描述了用于抵消和校正闪速存储器块中的读取干扰效应的方法和系统。该方法可以包括存储器系统的控制器的步骤，其以期望的间隔仅在块中的一个目标字线的一部分上执行读取擦除扫描。控制器可以基于响应于每个接收的主机读取命令而计算的概率确定来计算是否需要读取擦除扫描。然后，如果在满足或超过预定阈值的目标字线中检测到多个错误，则控制器然后可以将与目标字线相关联的块放置到刷新队列中。块刷新过程可以包括在后台操作期间将数据从块复制到新块中。

40. 发明申请

US20130336059A1 BLOCK LEVEL GRADING FOR RELIABILITY AND YIELD IMPROVEMENT 有权
标题翻译：阻塞等级可靠性和成本提升
公开(公告)号：US20130336059A1
公开(公告)日：2013-12-19
申请号：US13527199
申请日：2012-06-19
申请人： Dana Lee , Jianmin Huang , Mrinal Kochar , Ashish Ghai
发明人： Dana Lee , Jianmin Huang , Mrinal Kochar , Ashish Ghai
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C16/349 , G11C29/56008 , G11C29/82 , G11C2029/4402
摘要： A system for grading blocks may be used to improve memory usage. Blocks of memory, such as on a flash card, may be graded on a sliding scale that may identify a level of “goodness” or a level of “badness” for each block rather than a binary good or bad identification. This grading system may utilize at least three tiers of grades which may improve efficiency by better utilizing each block based on the individual grades for each block. The block leveling grading system may be used for optimizing the competing needs of minimizing yield loss while minimizing testing defect escapes.
摘要翻译：可以使用用于分级块的系统来改善存储器使用。诸如闪存卡之类的存储器块可以在可以标识每个块的“良好”级别或“坏”级别的滑动标度上分级，而不是二进制好或坏标识。该分级系统可以利用至少三个等级的等级，其可以通过基于每个块的各个等级更好地利用每个块来提高效率。块调平分级系统可用于优化最小化产量损失的竞争需求，同时最小化测试缺陷逃逸。

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