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31. 发明授权

US4184927A Process and apparatus for effecting surface treatment of workpieces 失效
标题翻译：用于对工件进行表面处理的工艺和装置
公开(公告)号：US4184927A
公开(公告)日：1980-01-22
申请号：US865361
申请日：1977-12-29
申请人： Toshiro Takahashi , Masashi Ikegaya
发明人： Toshiro Takahashi , Masashi Ikegaya
IPC分类号： C25D11/04 , C25D17/28 , C25D11/16 , C25D17/06
CPC分类号： C25D17/28 , C25D11/005 , C25D11/024 , C25D11/04
摘要： Workpieces vertically suspended on carrier bars in side-by-side relation are dipped into an electrolyte bath which has a plurality of electric contact plates of alternating polarity spaced along one side. Electric energy is applied to the workpieces from the plates through the carrier bars and the successive work pieces serve as electrodes of opposite polarity, the polarities reversing as the individual carrier bars are advanced from plate to plate.
摘要翻译：将并排悬挂在承载杆上的工件浸入电解液槽中，该电解液槽具有沿着一侧隔开交替极性的多个电接触板。电能从板通过承载杆施加到工件上，并且连续的工件用作相反极性的电极，随着各个承载杆从板向前推进，极性反转。

32. 发明申请

US20080272989A1 Light Emission Panel Display Device 审中-公开
标题翻译：光发射面板显示设备
公开(公告)号：US20080272989A1
公开(公告)日：2008-11-06
申请号：US11547194
申请日：2004-03-30
申请人： Toshiro Takahashi , Atsuo Ishizuka
发明人： Toshiro Takahashi , Atsuo Ishizuka
IPC分类号： G09G3/30
CPC分类号： G09G3/3216 , G09G3/3266 , G09G3/3283 , G09G2310/0251 , G09G2320/0209
摘要： The light emission panel display device according to the present invention has a scan drive circuit (30) driving a selected scan line to a selected voltage and unselected scan lines to a non-selected voltage higher than the selected voltage in each scanning period and (3) a data drive circuit (20) supplying light-emitting drive current to the data lines respectively in the periods of light emission corresponding to display gradation. The data drive circuit (20) starts supply of the light-emitting drive current to the data lines respectively at the emission-initiation timing corresponding to the emission period in the scanning period, and terminates supply of the light-emitting drive current to the multiple data lines at the same emission-termination timing. In addition, the scan drive circuit (30) maintains the selected scan line to an emission-termination voltage higher than the selected voltage and terminates light emission of the light-emitting element connected to the selected scan line at the emission-terminating timing. It is thus possible to prevent continuous light emission of the light-emitting element emitting light by electrical charging and discharging at the emission-termination timing during light emission.
摘要翻译：根据本发明的发光面板显示装置具有扫描驱动电路（30），其将选择的扫描线驱动到所选择的电压，并将未选择的扫描线驱动到在每个扫描周期内高于所选电压的非选择电压，并且（3 ）在对应于显示灰度的发光周期中分别向数据线提供发光驱动电流的数据驱动电路（20）。数据驱动电路（20）在与扫描期间的发光期间对应的发光开始时刻分别开始向数据线供给发光驱动电流，并且终止向多个发光驱动电流的供给数据线处于相同的发射终止定时。此外，扫描驱动电路（30）将所选择的扫描线保持为高于所选择的电压的发光终止电压，并且终止在发射终止定时连接到所选择的扫描线的发光元件的发光。因此，可以防止在发光期间在发光终止时刻通过充电和放电发光的发光元件的连续发光。

33. 发明申请

US20060290277A1 Organic electroluminescent display device 审中-公开
标题翻译：有机电致发光显示装置
公开(公告)号：US20060290277A1
公开(公告)日：2006-12-28
申请号：US11441207
申请日：2006-05-26
申请人： Toshiro Takahashi , Masaya Nakayama , Tasuku Satou
发明人： Toshiro Takahashi , Masaya Nakayama , Tasuku Satou
IPC分类号： H01J17/00
CPC分类号： H01L27/3248 , H01L27/3211 , H01L51/5206 , H01L2251/5315 , H01L2251/568
摘要： The present invention provides an organic electroluminescent display device, comprising: pixels that are each divided into at least two segments; current supply lines each independently connected to each of the segments; and active elements that are provided per each pixel and control the connection between an organic electroluminescent element and a power supply line, wherein at least one connection line between a defective segment of the segments and the active element is cut.
摘要翻译：本发明提供了一种有机电致发光显示装置，其特征在于，包括：各分割成至少两个片段的像素; 电流供应线各自独立地连接到每个段; 以及每个像素提供的有源元件，并且控制有机电致发光元件和电源线之间的连接，其中切割所述片段的有缺陷片段与所述有源元件之间的至少一个连接线。

34. 发明申请

US20060209225A1 Lighting apparatus and a display apparatus therewith 有权
公开(公告)号：US20060209225A1
公开(公告)日：2006-09-21
申请号：US11156572
申请日：2005-06-21
申请人： Yoshiaki Sakamoto , Toshiro Takahashi , Masaya Nakayama
发明人： Yoshiaki Sakamoto , Toshiro Takahashi , Masaya Nakayama
IPC分类号： G02F1/1333
CPC分类号： H01L51/5203 , G02F1/133603 , G02F2001/133342 , H01L51/5209 , H01L51/5218 , H01L2251/5323
摘要： A lighting apparatus and a display apparatus therewith are disclosed. The lighting apparatus includes a first light-transmitting electrode layer, a second light-transmitting electrode layer, and a luminous layer that is sandwiched by the first and the second light-transmitting electrode layers. At least one of the first and the second light-transmitting electrode layers includes at least a first conductive member and a second conductive member. Layout patterns of the first and the second conductive members are different from each other.

35. 发明申请

US20050238920A1 1,3,6,8-Tetrasubstituted pyrene compound, organic electroluminescent element, and organic electroluminescent display 审中-公开
标题翻译： 1,3,6,8-四取代芘化合物，有机电致发光元件和有机电致发光显示器
公开(公告)号：US20050238920A1
公开(公告)日：2005-10-27
申请号：US11166692
申请日：2005-06-27
申请人： Wataru Sotoyama , Hiroyuki Sato , Azuma Matsuura , Masaru Kinoshita , Toshiro Takahashi
发明人： Wataru Sotoyama , Hiroyuki Sato , Azuma Matsuura , Masaru Kinoshita , Toshiro Takahashi
IPC分类号： C07C15/38 , C07D307/91 , C09K11/06 , H05B33/14
CPC分类号： H05B33/14 , C07C15/38 , C07C2603/50 , C07D307/91 , C09K11/06 , C09K2211/1011 , C09K2211/1014 , C09K2211/1029 , C09K2211/1048 , C09K2211/1059 , C09K2211/1088 , C09K2211/1092 , C09K2211/186 , H01L51/0054 , H01L51/0073 , H01L51/5012
摘要： The object of the present invention is to provide organic electroluminescent elements that are excellent in luminous efficiency, luminance, and color purity and exhibit long lifetime. The organic EL elements according to the present invention comprise an organic thin layer between a positive electrode and a negative electrode, and the organic thin layer comprises a 1,3,6,8-tetrasubstituted pyrene compound expressed by the formula (1) as the light emitting material, wherein R1 to R4 in the formula (1) may be identical or different each other, and are each a group expressed by the formula (2): wherein R5 to R9 in the formula (2) may be identical or different each other, are each a hydrogen atom or a substituted group; and at least one of R5 to R9 is a substituted or unsubstituted aryl group.
摘要翻译：本发明的目的是提供发光效率，亮度和色纯度优异并且寿命长的有机电致发光元件。根据本发明的有机EL元件包括在正极和负极之间的有机薄层，有机薄层包含由式（1）表示的1,3,6,8-四取代芘化合物作为式（1）中的R 1〜R 4的发光材料可以相同也可以不同，分别为式（2）表示的基团，式（2）中的R 5〜R 9可以相同或不同，分别为氢原子或取代基; R 9和R 9中的至少一个是取代或未取代的芳基。

36. 发明授权

US06423588B1 Method of manufacturing semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US06423588B1
公开(公告)日：2002-07-23
申请号：US09698165
申请日：2000-10-30
申请人： Kazuhisa Suzuki , Toshiro Takahashi , Yasunobu Yanagisawa , Yusuke Nonaka
发明人： Kazuhisa Suzuki , Toshiro Takahashi , Yasunobu Yanagisawa , Yusuke Nonaka
IPC分类号： H01L218238
CPC分类号： H01L27/0629 , Y10S438/981
摘要： A capacitive element C1 having a small leakage current is formed by utilizing a gate oxide film 9B thicker than that of a MISFET of a logic section incorporated in a CMOS gate array, without increasing the number of steps of manufacturing the CMOS gate array. The capacitive element C1 has a gate electrode 10E. A part of the gate electrode 10E is made of a polycrystalline silicon film. The polycrystalline silicon film is doped with n-type impurities, so that the may reliably operate even at a low power-supply voltage.
摘要翻译：通过利用比构成CMOS栅极阵列的逻辑部分的MISFET更厚的栅极氧化膜9B形成具有小的漏电流的电容元件C1，而不增加制造CMOS门阵列的步骤数。电容元件C1具有栅电极10E。栅电极10E的一部分由多晶硅膜制成。多晶硅膜掺杂有n型杂质，即使在低电源电压下也可以可靠地运行。

37. 发明授权

US06232819B1 Semiconductor integrated circuit device and low-amplitude signal receiving method 有权
标题翻译：半导体集成电路器件和低振幅信号接收方法
公开(公告)号：US06232819B1
公开(公告)日：2001-05-15
申请号：US09504076
申请日：2000-02-15
申请人： Toshiro Takahashi , Kazuo Koide
发明人： Toshiro Takahashi , Kazuo Koide
IPC分类号： H03K501
CPC分类号： H03K3/356121
摘要： When signal transmission is performed between two semiconductor integrated circuit devices in synchronization with a clock signal using a small signal amplitude relative to an operating voltage of the two semiconductor integrated circuit devices, a received signal is held in the receiving semiconductor integrated circuit device in synchronization with the clock signal while the small signal amplitude of the held signal is kept substantially without change. The received signal having the small signal amplitude is amplified along a signal transmission path including a combined logic circuit to a subsequent latch circuit of the receiving semiconductor integrated circuit device.
摘要翻译：当使用相对于两个半导体集成电路器件的工作电压的小的信号幅度与时钟信号同步地在两个半导体集成电路器件之间执行信号传输时，接收信号与接收半导体集成电路器件同步地保持在接收半导体集成电路器件中同时保持信号的小信号幅度基本上保持不变。具有小信号幅度的接收信号沿着包括组合逻辑电路的信号传输路径被放大到接收半导体集成电路器件的后续锁存电路。

38. 发明授权

US5652528A Transceiver circuit and method of transmitting a signal which uses an output transistor to send data and assist in pulling up a bus 失效
标题翻译：收发器电路和发送信号的方法，该信号使用输出晶体管发送数据并协助提升总线
公开(公告)号：US5652528A
公开(公告)日：1997-07-29
申请号：US560368
申请日：1995-11-17
申请人： Masaharu Kimura , Toshiro Takahashi
发明人： Masaharu Kimura , Toshiro Takahashi
IPC分类号： H03K19/017 , H03K19/0185
CPC分类号： H03K19/018507 , H03K19/01721
摘要： A semiconductor integrated circuit device having an input/output circuit for inputting and outputting data having a GTL level includes a pull-down output MOSFET (Q1) and a pull-up output MOSFET (Q2) both electrically connected to an input/output terminal and a gate drive signal generating circuit (DPG) electrically coupled to the gate of the pull-up output MOSFET (Q2). Upon data transmission, the gate drive signal generating circuit (DPG) controls the operation of the output MOSFET (Q2) so that the output MOSFETs (Q1 and Q2) are contemporarily brought into an ON or OFF state according to data to be transmitted. On the other hand, upon data reception, the gate drive signal generating circuit (DPG) forms a control pulse for temporarily turning ON one of the output MOSFETS (Q2) immediately after high-level data has been received, and supplies it to a gate terminal of the output MOSFET (Q2).
摘要翻译：具有用于输入和输出具有GTL电平的数据的输入/输出电路的半导体集成电路装置包括电连接到输入/输出端子的下拉输出MOSFET（Q1）和上拉输出MOSFET（Q2），以及电耦合到上拉输出MOSFET（Q2）的栅极的栅极驱动信号发生电路（DPG）。在数据传输时，栅极驱动信号发生电路（DPG）控制输出MOSFET（Q2）的工作，使得输出MOSFET（Q1和Q2）根据要传输的数据同时进入ON或OFF状态。另一方面，在数据接收时，栅极驱动信号生成电路（DPG）形成用于在接收到高电平数据之后立即接通输出MOSFET（Q2）中的一个的控制脉冲，并将其提供给门端子（Q2）。

39. 发明授权

US5277960A Substrate for magnetic recording medium and process of producing the same 失效
标题翻译：磁记录介质用基板及其制造方法
公开(公告)号：US5277960A
公开(公告)日：1994-01-11
申请号：US872167
申请日：1992-04-22
申请人： Noboru Tsuya , Toshiro Takahashi
发明人： Noboru Tsuya , Toshiro Takahashi
IPC分类号： G11B5/66 , G11B5/73 , G11B5/82 , G11B5/84 , B32B3/30 , B32B15/08
CPC分类号： G11B5/7315 , G11B5/7325 , G11B5/8404 , Y10S428/90 , Y10T428/24612 , Y10T428/31678
摘要： The first invention provides a substrate for a magnetic recording medium, which is prepared by forming a macro-concavo-convex pattern for improving CSS properties and a micro-concavo-convex pattern for improving magnetic properties on the surface, thereby preventing the degradation of the CSS properties brought by the enhancement in friction coefficient and the increase in the area of a protective layer of the medium in contact with a magnetic head, caused by the wearing of the protective layer of the medium.The second invention provides a process of producing a substrate for a magnetic recording medium, which forms the above macro-concavo-convex pattern and micro-concavo-convex pattern in a uniform distribution at the same time.The first invention utilizes, as the texture, protrusions 13P and 15P different in length from the substrate surface, the protrusions being prepared by packing at least two kinds of materials 13 and 15 differing in etching rate into alumite pores 14A and 14B, polishing and then etching.The second process invention comprises the steps of packing the first material into alumite pores of an aluminum alloy by means of electrolytic deposition, packing the second material having an etching rate different from that of the first material by means of dipping method, polishing the resultant surface and etching the polished surface so as to make the respective protrusion lengths of the first and the second materials within the predetermined range.
摘要翻译：第一发明提供了一种用于磁记录介质的基板，其通过形成用于改善CSS性质的宏观凹凸图案和用于改善表面上的磁性能的微凹凸图案来制备，从而防止了通过介质的保护层的磨损而引起的摩擦系数的增强和与磁头接触的介质的保护层的面积增加引起的CSS性质。第二发明提供了一种制造用于磁记录介质的衬底的方法，其同时形成均匀分布的上述宏观凹凸图案和微凹凸图案。第一发明利用了与基板表面不同长度的突起13P和15P作为纹理，通过将蚀刻速率不同的至少两种材料13和15填充到耐氧化铝孔14A和14B中来进行抛光，然后抛光蚀刻。第二工艺方法包括以下步骤：通过电解沉积将第一种材料包装到铝合金的防氧化铝孔中，通过浸渍法将具有不同于第一种材料的蚀刻速率的第二种材料包装，并且蚀刻抛光表面以使第一和第二材料的相应突出长度在预定范围内。

40. 发明授权

US5210754A Pattern synchronizing circuit 失效
标题翻译：图案同步电路
公开(公告)号：US5210754A
公开(公告)日：1993-05-11
申请号：US710522
申请日：1991-06-04
申请人： Toshiro Takahashi , Takayuki Nakajima , Tetsuo Sotome , Noboru Akiyama
发明人： Toshiro Takahashi , Takayuki Nakajima , Tetsuo Sotome , Noboru Akiyama
IPC分类号： H04L1/00 , H04J3/06 , H04L7/00
CPC分类号： H04J3/0608
摘要： An Nth one of N parallel sequences of low-speed data demultiplexed by a demultiplexer from high-speed input data in synchronization with a high-speed clock is compared by N comparators with N parallel sequences of reference patterns. The N parallel sequences of reference patterns are each generated in synchronization with a frequency divided clock obtained by frequency dividing the high-speed clock into 1/N. When any of the comparators provides a disagreement output at least once, one clock pulse is eliminated by a post-clock eliminating circuit from the divided clock so that the N sequences of reference patterns are each delayed by one bit. When a counter detects that any one of the comparators does not provide the disagreement signal for n consecutive bits, the sequence of reference patterns corresponding to this comparator and the Nth sequence of low-speed data are in synchronization with each other. Clock pulses of the number corresponding to the line position of the synchronized sequence of reference patterns are eliminated by a pre-clock eliminating circuit from the high-speed clock which is applied to the demultiplexer. By this, line positions of the N parallel sequences of low-speed data are sequentially shifted so that the Nth sequence of low-speed data assumes the same line position as that of the synchronized reference pattern, and as a result, the N parallel sequences of low-speed data are synchronized with the N parallel sequences of reference patterns, respectively.

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