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31. 发明授权

US5757865A Carrier phase control circuit 失效
标题翻译：载波相位控制电路
公开(公告)号：US5757865A
公开(公告)日：1998-05-26
申请号：US553990
申请日：1995-11-06
申请人： Takashi Kaku , Noboru Kawada , Hideo Miyazawa
发明人： Takashi Kaku , Noboru Kawada , Hideo Miyazawa
IPC分类号： H04L27/38 , H04L27/00 , H04L27/22 , H04L27/233 , H04L27/06
CPC分类号： H04L27/2332 , H04L2027/003 , H04L2027/0055
摘要： The invention provides a carrier phase control circuit which can eliminate a phase intercept fluctuation so that, when the carrier phase control circuit is applied to a very high speed modem having a communication speed of, for example, 28.8 kbps, occurrence of a communication error can be suppressed and the modem has an improved characteristic. The carrier phase control circuit is provided on a reception side of a communication apparatus and interposed between an automatic equalizer and a signal decision section. The carrier phase control circuit includes a frequency offset removal section for predicting and removing an offset of a frequency of a transmission signal based on an output of the automatic equalizer, and a phase intercept variation removal section for predicting and removing a phase intercept variation of the transmission signal based on an output of the frequency offset removal section and inputting a resulted signal as an output thereof to the signal decision section.
摘要翻译：本发明提供了一种载波相位控制电路，其可以消除相位截距波动，使得当载波相位控制电路被应用于具有例如28.8kbps的通信速度的非常高速的调制解调器时，可能发生通信错误被抑制，调制解调器具有改进的特性。载波相位控制电路设置在通信装置的接收侧，并插入在自动均衡器和信号判定部分之间。载波相位控制电路包括：频率偏移消除部分，用于基于自动均衡器的输出来预测和去除发送信号频率的偏移;相位截距变化去除部分，用于预测和去除发送信号的相位截距变化，基于频率偏移去除部的输出的发送信号，并将得到的信号作为其输出输入到信号判定部。

32. 发明授权

US5631923A Two-wire full-duplex modem 失效
标题翻译：双线全双工调制解调器
公开(公告)号：US5631923A
公开(公告)日：1997-05-20
申请号：US89190
申请日：1993-07-12
申请人： Takashi Kaku , Toyomi Obikawa
发明人： Takashi Kaku , Toyomi Obikawa
IPC分类号： H04B3/23 , H04L1/22 , H04L5/14 , H04L25/02 , H04L25/06 , H04L27/00 , H04L29/14 , H03D3/24
CPC分类号： H04L25/0262 , H04B3/23 , H04L1/22 , H04L25/068 , H04L5/143
摘要： In a modem, after scrambling data which are time-divided into main data and secondary data, a 2 W-4 W conversion circuit sends the data to the two-wire line. An estimated echo component is subtracted from a signal which is available from the 2 W-4 W conversion circuit. Following this, the signal from the 2 W-4 W conversion circuit is demodulated, descrambled and separated into main data and secondary data. A generator polynomial for scrambling is different from a generator polynomial for descrambling. The modem comprises a line-trouble-detect part which samples data of the secondary channel, by multipoint sampling, to obtain the secondary data and detects the number of inversion points in the descrambled secondary channel data per unit time period. The line-trouble-detect part outputs a line-trouble signal which indicates that there is a trouble on the line if the number of detected inversion points is more than a predetermined number.
摘要翻译：在调制解调器中，在将分组成主数据和次数据的数据进行加扰之后，2W-4W转换电路将数据发送到双线线路。从可从2 W-4 W转换电路获得的信号中减去估计的回波分量。此后，来自2W-4W转换电路的信号被解调，解扰并分离成主数据和次数据。用于扰码的生成多项式与用于解扰的生成多项式不同。调制解调器包括线路故障检测部分，其通过多点采样来对二次信道的数据进行采样，以获得二次数据，并且检测每单位时间段内解扰的次级信道数据中的反转点的数量。线路故障检测部分输出线路故障信号，如果检测到的反转点的数量大于预定数量，则该线路故障信号指示线路上存在故障。

33. 发明授权

US5583887A Transmission signal processing apparatus 失效
标题翻译：传输信号处理装置
公开(公告)号：US5583887A
公开(公告)日：1996-12-10
申请号：US31621
申请日：1993-03-15
申请人： Hiroyasu Murata , Takashi Kaku
发明人： Hiroyasu Murata , Takashi Kaku
IPC分类号： H04L27/00 , H03H17/00 , H03H17/06 , H04J1/05 , H04L25/05 , H03H7/30 , H04L27/04
CPC分类号： H03H17/0657 , H04J1/05 , H04L25/05
摘要： A roll off filter portion for an input transmission point signal executes a roll-off filtering process and an interpolation process with a multiple of two at the same time. The roll-off filtering process is adapted to form a frequency spectrum characteristic in a cosine roll-off shape for the input signal. An interpolator portion, connected to the roll-off filter portion, executes an interpolation process with a multiple of two. This process is a filtering process for forming a frequency spectrum characteristic in a cosine roll-off shape for an input signal. Depending on what multiple of the original sampling frequency a transmission point signal is interpolated, a corresponding number of the interpolator portions are connected in a cascade shape. when a plurality of channels of transmission point signals are modulated and multiplexed according to an FDM system, a corresponding number of signal processing systems are disposed according to the plurality of transmission point signals with different modulation rates.
摘要翻译：用于输入传输点信号的滚降滤波器部分同时执行滚降滤波处理和两个倍数的内插处理。滚降滤波处理适用于形成用于输入信号的余弦滚降形状的频谱特性。连接到滚降滤波器部分的内插器部分以两倍的倍数执行内插处理。该处理是用于形成用于输入信号的余弦滚降形状的频谱特性的滤波处理。根据传输点信号的原始采样频率的多少来内插，相应数量的内插器部分以级联形式连接。当根据FDM系统对多个传输点信号进行调制和复用时，根据具有不同调制速率的多个传输点信号设置相应数量的信号处理系统。

34. 发明授权

US5574737A Modulator-demodulator device capable of detecting an unsynchronized frame state based on hard and soft error values 失效
标题翻译：调制解调器能够基于硬和软错误值检测不同步的帧状态
公开(公告)号：US5574737A
公开(公告)日：1996-11-12
申请号：US53803
申请日：1993-04-29
申请人： Yasunao Mizutani , Takashi Kaku
发明人： Yasunao Mizutani , Takashi Kaku
IPC分类号： H04L7/04 , H04L27/38 , H04L1/00 , H04L7/10
CPC分类号： H04L27/38 , H04L7/048
摘要： A modulator-demodulator device includes a transmitter side having an error control coding circuit for adding redundancy to a bit sequence to be transmitted from a bit processing circuit and coding the bit sequence. A data sequence to coordinate transforming circuit transforms the bit sequence from the error control circuit into a signal point coordinate on a complex plane. A coordinate rotating circuit rotates the transformed signal point coordinates based on frame phase information from a frame phase generating circuit. In the receiver side, a coordinate rotating circuit applies rotation in a direction reverse that of the transmitter coordinate rotating circuit based on the frame phase information from the frame phase generating circuit. A second decision circuit decides the maximum likelihood signal point by utilizing the redundancy added by the error control coding circuit of the transmitter side and correcting the coordinate error of the received signal point. An unsynchronized frame state deciding circuit decides the unsynchronized frame state based on the distance between the decision point determined by the maximum likelihood signal point deciding circuit and the demodulated received signal point on the complex plane, so that the synchronized frame state is quickly detected. An evaluation value is designated for each of the transition sequence of signals, and in the receiver side, error control signal decoding is carried out so that the transition sequence of the maximum likelihood received signal is selected based on the updated evaluation value and the error in the demodulated signal is corrected, so that the error in the data transmission is corrected.
摘要翻译：调制器 - 解调器装置包括发射机侧，发射机侧具有用于将比特序列从比特处理电路发送的比特序列加上冗余的错误控制编码电路，并对该比特序列进行编码。坐标变换电路的数据序列将位序列从误差控制电路变换为复平面上的信号点坐标。坐标旋转电路基于来自帧相位产生电路的帧相位信息来旋转经变换的信号点坐标。在接收侧，基于来自帧相位产生电路的帧相位信息，坐标旋转电路沿与发送器坐标旋转电路相反的方向施加旋转。第二判定电路利用由发送器侧的误差控制编码电路所附加的冗余来校正接收信号点的坐标误差来决定最大似然信号点。不同步的帧状态决定电路基于由最大似然信号点判定电路决定的判定点与复平面上的解调接收信号点之间的距离来决定不同步的帧状态，从而快速检测同步的帧状态。针对每个信号的转换序列指定评估值，在接收机侧，执行错误控制信号解码，使得根据更新后的评估值和误差来选择最大似然接收信号的转换序列解调信号被校正，从而校正数据传输中的误差。

35. 发明授权

US5572537A Modulator-demodulator device capable of detecting an unsynchronized frame state based on hard and soft error values 失效
公开(公告)号：US5572537A
公开(公告)日：1996-11-05
申请号：US53804
申请日：1993-04-29
申请人： Yasunao Mizutani , Takashi Kaku
发明人： Yasunao Mizutani , Takashi Kaku
IPC分类号： H04L7/04 , H04L27/38 , H03M13/12
CPC分类号： H04L27/38 , H04L7/048
摘要： A modulator-demodulator device includes a transmitter side having an error control coding circuit for adding redundancy to a bit sequence to be transmitted from a bit processing circuit and coding the bit sequence. A data sequence to coordinate transforming circuit transforms the bit sequence from the error control circuit into a signal point coordinate on a complex plane. A coordinate rotating circuit rotates the transformed signal point coordinates based on frame phase information from a frame phase generating circuit. In the receiver side, a coordinate rotating circuit applies rotation in a direction reverse that of the transmitter coordinate rotating circuit based on the frame phase information from the frame phase generating circuit. A second decision circuit decides the maximum likelihood signal point by utilizing the redundancy added by the error control coding circuit of the transmitter side and correcting the coordinate error of the received signal point. An unsynchronized frame state deciding circuit decides the unsynchronized frame state based on the distance between the decision point determined by the maximum likelihood signal point deciding circuit and the demodulated received signal point on the complex plane, so that the synchronized frame state is quickly detected. An evaluation value is designated for each of the transition sequence of signals, and in the receiver side, error control signal decoding is carried out so that the transition sequence of the maximum likelihood received signal is selected based on the updated evaluation value and the error in the demodulated signal is corrected, so that the error in the data transmission is corrected.

36. 发明授权

US4799214A Two-wire full duplex frequency division multiplex modem system having echo cancellation means 失效
标题翻译：具有回波消除装置的双线全双工分频多路复用调制解调器系统
公开(公告)号：US4799214A
公开(公告)日：1989-01-17
申请号：US944508
申请日：1986-12-22
申请人： Takashi Kaku
发明人： Takashi Kaku
IPC分类号： H04B1/50 , H04B3/23 , H04L5/06 , H04L5/14 , H04B9/00
CPC分类号： H04L5/06 , H04B3/23 , H04L5/143 , H04B3/235
摘要： A two-wire full duplex frequency division multiplex (FDM) modem system having a unit for cancelling a transmission signal, taking into consideration the line distortion characteristics. The FDM modem system includes two modem units connected through the two-wire full duplex transmission line.Each modem unit includes a unit for modulating a transmission data, a unit for synthesizing the modulated transmission signal and a reception signal, a unit for adding the signal from the synthesizing unit and a signal, a unit for demodulating the reception signal, and a unit for generating the signal supplied to the adding unit cancelling a transmission echo signal included in the signal from the synthesizing unit, from the signal modulated at the modulating unit and the signal from the adding unit. The adding unit subtracts the signal generated at the echo cancellation signal generation unit from the signal from the synthesizer unit.The FDM may further include a unit, for receiving the signal from the adder unit, passing a signal having the transmission frequency band, and supplying same to the echo cancellation signal generation unit as a signal for compressing the line characteristics.
摘要翻译：考虑到线路失真特性，具有用于消除发送信号的单元的双线全双工频分复用（FDM）调制解调器系统。 FDM调制解调器系统包括通过双线全双工传输线连接的两个调制解调器单元。每个调制解调器单元包括用于调制发送数据的单元，用于合成调制的发送信号的单元和接收信号，用于将来自合成单元的信号和信号相加的单元，用于解调接收信号的单元和单元用于产生提供给加法单元的信号，从在调制单元调制的信号和来自加法单元的信号中消除来自合成单元的信号中包括的发送回波信号。加法单元从来自合成器单元的信号中减去在回波消除信号生成单元处生成的信号。 FDM还可以包括用于从加法器单元接收信号的单元，通过具有发送频带的信号，并将其作为用于压缩线路特性的信号提供给回波消除信号生成单元。

37. 发明授权

US4571733A Automatic equalization device and method of starting-up the same 失效
标题翻译：自动均衡装置及其启动方法
公开(公告)号：US4571733A
公开(公告)日：1986-02-18
申请号：US527573
申请日：1983-08-17
申请人： Takashi Kaku , Shigeyuki Unagami , Masayoshi Inoue
发明人： Takashi Kaku , Shigeyuki Unagami , Masayoshi Inoue
IPC分类号： H04B3/10 , H04L25/03 , H04B3/06
CPC分类号： H04L25/03133
摘要： An automatic equalization device used in a data communication system includes a unit for extracting a single pulse from a training signal sent from a transmitter and initializing a tap coefficient using the extracted single pulse. The automatic equalization device also includes a first equalization circuit and a second equalization circuit. In the first equalization circuit, an auto-correlation series of the signal corresponding to the single pulse is calculated to provide a symmetric single pulse. In the second equalization circuit, an inverse matrix is calculated from the symmetric single pulse using the auto-correlational series of single pulses. By these calculations, the speed of the initial setting of the tap coefficient is increased.
摘要翻译： PCT No.PCT / JP82 / 00479 Sec。 371日期1983年8月17日 102（e）日期1983年8月17日PCT申请日1982年12月28日PCT公布。公开号WO83 / 02373 日期：1983年7月7日。在数据通信系统中使用的自动均衡装置包括用于从发送器发送的训练信号中提取单个脉冲并使用提取的单个脉冲初始化抽头系数的单元。自动均衡装置还包括第一均衡电路和第二均衡电路。在第一均衡电路中，计算与单个脉冲对应的信号的自相关序列，以提供对称的单个脉冲。在第二均衡电路中，使用单个脉冲的自相关系列从对称单脉冲计算逆矩阵。通过这些计算，抽头系数的初始设定的速度增加。

38. 发明授权

US07130356B2 Data transmission method and data transmission apparatus 失效
标题翻译：数据传输方法和数据传输装置
公开(公告)号：US07130356B2
公开(公告)日：2006-10-31
申请号：US10047131
申请日：2002-01-15
申请人： Takashi Kaku , Kyoko Hirao
发明人： Takashi Kaku , Kyoko Hirao
IPC分类号： H04L27/04
CPC分类号： H04L27/2628 , H04L1/0071 , H04L27/2602 , H04L27/2614 , H04L27/265
摘要： A data transmission method includes the steps of: a) performing two-dimensional interleaving along a time axis and along a frequency axis; b) transmitting thus-obtained data by a multi-carrier transmission form; and c) producing, by channel copy operation, data which is short with respect to the required number of channels for fast inverse Fourier transform performed antecedent and subsequent to the step a).
摘要翻译：数据传输方法包括以下步骤：a）沿着时间轴和频率轴执行二维交织; b）通过多载波传输形式发送由此获得的数据; 以及c）通过信道拷贝操作产生相对于先前执行的快速傅里叶逆变换的所需数量的信道而短的数据，并且在步骤a）之后。

39. 发明授权

US07110465B2 Noise canceling method and apparatus 失效
公开(公告)号：US07110465B2
公开(公告)日：2006-09-19
申请号：US09819395
申请日：2001-03-28
申请人： Takashi Kaku , Hideo Miyazawa , Takahiro Kurakata , Hiroyasu Murata
发明人： Takashi Kaku , Hideo Miyazawa , Takahiro Kurakata , Hiroyasu Murata
IPC分类号： H04B15/00
CPC分类号： H04B1/123 , H04B1/1036 , H04L27/2647
摘要： In a noise canceling method and an apparatus therefor which notices the colored noise looked macroscopically, positively cancels the dominant noise component in the low frequency band, shifts the S/N value to plus, and can extract the reception signal buried in the low frequency band and having a comparatively high level, a signal in which a time axis, an amplitude, and a phase are specified or a zero-point signal is inserted into a transmission signal by an inserter, a noise component is interpolated by using the specified signal or the zero-point signal by a noise canceler, and an originally transmitted signal is regenerated by subtracting the noise component from the reception signal.

40. 发明授权

US06985539B2 Peak suppression method and data transmission apparatus 失效
公开(公告)号：US06985539B2
公开(公告)日：2006-01-10
申请号：US10012126
申请日：2001-10-22
申请人： Takashi Kaku , Kyoko Hirao
发明人： Takashi Kaku , Kyoko Hirao
IPC分类号： H04L25/03 , H03C3/02
CPC分类号： H04L27/2624
摘要： A peak suppression method detects a peak value exceeding a threshold value of a transmitting signal, forms a peak value prediction signal which is limited to a noise cancelling frequency band of a receiving end, based on the detected peak value of the transmitting signal, and subtracts the peak value prediction signal from the transmitting signal.

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