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31. 发明申请

US20080072085A1 Semiconductor integrated circuit device having power reduction mechanism 失效
标题翻译：具有降压机构的半导体集成电路装置
公开(公告)号：US20080072085A1
公开(公告)日：2008-03-20
申请号：US11979100
申请日：2007-10-31
申请人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
发明人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
IPC分类号： G06F1/32
CPC分类号： H01L27/0207 , G06F1/3203 , G11C5/14 , H01L27/0218 , H03K3/356113 , H03K19/0013 , H03K19/0016 , H03K19/01721
摘要： A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
摘要翻译：半导体集成电路器件由各自设置有至少两个MOS晶体管的逻辑门组成。逻辑门连接到第一电势点和第二电位点。半导体集成电路装置包括连接在逻辑门与第一电位点之间和/或逻辑门与第二电势点之间的电流控制装置，用于根据操作状态控制在逻辑门中流动的电流的值逻辑门。该电路可用于在高功耗模式和低功耗模式之间循环运行的器件，例如具有用于功率降低的操作模式和低功率备用或睡眠模式的微处理器。

32. 发明授权

US07312640B2 Semiconductor integrated circuit device having power reduction mechanism 失效
标题翻译：具有降压机构的半导体集成电路装置
公开(公告)号：US07312640B2
公开(公告)日：2007-12-25
申请号：US11131181
申请日：2005-05-18
申请人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
发明人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
IPC分类号： H03K19/20
CPC分类号： H01L27/0207 , G06F1/3203 , G11C5/14 , H01L27/0218 , H03K3/356113 , H03K19/0013 , H03K19/0016 , H03K19/01721
摘要： A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
摘要翻译：半导体集成电路器件由各自设置有至少两个MOS晶体管的逻辑门组成。逻辑门连接到第一电势点和第二电位点。半导体集成电路装置包括连接在逻辑门与第一电位点之间和/或逻辑门与第二电势点之间的电流控制装置，用于根据操作状态控制在逻辑门中流动的电流的值逻辑门。该电路可用于在高功耗模式和低功耗模式之间循环运行的器件，例如具有用于功率降低的操作模式和低功率备用或睡眠模式的微处理器。

33. 发明申请

US20050219922A1 Semiconductor device having redundancy circuit 失效
标题翻译：具有冗余电路的半导体器件
公开(公告)号：US20050219922A1
公开(公告)日：2005-10-06
申请号：US11139513
申请日：2005-05-31
申请人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Kiyoo Itoh
发明人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Kiyoo Itoh
IPC分类号： G11C5/00 , G11C7/00 , G11C8/00 , G11C29/00
CPC分类号： G11C29/80 , G11C29/785 , G11C29/808
摘要： Method for manufacturing a memory device, the memory being a memory array with a spare bit line and being provided with a defect recovery scheme featuring a redundancy circuit. The redundancy circuit includes one or more comparing circuits having programmable elements which function as a memory for storing therein a defective address existing in the memory array. The programmable elements of the redundancy circuit can be programmed in accordance with any of a number of different types of defect modes. Each comparing circuit of the redundancy circuit compares information (data) inputted therein, for example, the column and row addresses which may be under the control of an address multiplex system, with that programmed in the programmable elements of the comparing circuit. On the basis of this comparison, an appropriate defect recovery is effected.
摘要翻译：用于制造存储器件的方法，所述存储器是具有备用位线的存储器阵列，并且提供具有冗余电路的缺陷恢复方案。冗余电路包括具有可编程元件的一个或多个比较电路，其作为用于在其中存储存在于存储器阵列中的缺陷地址的存储器。冗余电路的可编程元件可以根据多种不同类型的缺陷模式中的任何一种进行编程。冗余电路的每个比较电路将在其中输入的信息（数据），例如可能在地址多路复用系统的控制下的列和行地址与在比较电路的可编程元件中编程的信息（数据）进行比较。在此比较的基础上，进行适当的缺陷恢复。

34. 发明申请

US20050213414A1 Semiconductor integrated circuit device having power reduction mechanism 失效
标题翻译：具有功率降低机构的半导体集成电路装置
公开(公告)号：US20050213414A1
公开(公告)日：2005-09-29
申请号：US11131181
申请日：2005-05-18
申请人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
发明人： Masashi Horiguchi , Kunio Uchiyama , Kiyoo Itoh , Takeshi Sakata , Masakazu Aoki , Takayuki Kawahara
IPC分类号： G11C5/00 , H01L27/02 , H03K3/356 , H03K19/00 , H03K19/0185 , H03K19/094 , H03K19/0948 , H03K19/096 , H03K19/20
CPC分类号： H01L27/0207 , G06F1/3203 , G11C5/14 , H01L27/0218 , H03K3/356113 , H03K19/0013 , H03K19/0016 , H03K19/01721
摘要： A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
摘要翻译：半导体集成电路器件由各自设置有至少两个MOS晶体管的逻辑门组成。逻辑门连接到第一电势点和第二电位点。半导体集成电路装置包括连接在逻辑门与第一电位点之间和/或逻辑门与第二电势点之间的电流控制装置，用于根据操作状态控制在逻辑门中流动的电流的值逻辑门。该电路可用于在高功耗模式和低功耗模式之间循环运行的器件，例如具有用于功率降低的操作模式和低功率备用或睡眠模式的微处理器。

35. 发明申请

US20050141114A1 Vehicle mirror device, method for manufacturing mirror device for vehicle, and vehicle 有权
标题翻译：车辆镜面装置，车辆用镜面装置及车辆的制造方法
公开(公告)号：US20050141114A1
公开(公告)日：2005-06-30
申请号：US10508419
申请日：2003-03-19
申请人： Toshinobu Mizutani , Masakazu Iwatsuki , Masakazu Aoki , Masaaki Itou , Yasunobu Okatsu
发明人： Toshinobu Mizutani , Masakazu Iwatsuki , Masakazu Aoki , Masaaki Itou , Yasunobu Okatsu
IPC分类号： B60R1/06 , G02B1/10 , G02B7/182
CPC分类号： B60R1/06
摘要： In a vehicle door mirror device (10), an outer side surface (20B), with respect to a vehicle, of a projection (20) of a door mirror stay (16) is made to be flat. Further, an angle of the outer side surface (20B) with respect to a front-rear direction of the vehicle, inward or outward with respect to the vehicle, is not more than 2 degrees. Therefore, wind arriving at the outer side surface (20B) flows rearward with respect to the vehicle with fluctuation thereof being suppressed, and its flow is straightened. Furthermore, a radius of curvature of a corner portion (20E) at an outer rear side, with respect to the vehicle, of the projection (20) is not more than 15 mm. Therefore, wind arriving at the outer side surface (20B) of the projection (20) is suppressed from flowing along the corner portion (20E), and its flow is straightened. Thus, wind noise performance of the door mirror stay (16) can be improved. In addition, wind drawn in by the door mirror stay (16) toward a mirror and toward a side window can be reduced, and impairment of visibility can be suppressed.
摘要翻译：在车辆后视镜装置（10）中，使车门后视镜（16）的突起（20）相对于车辆的外侧表面（20B）平坦。此外，外侧面（20B）相对于车辆的前后方向相对于车辆的内侧或外侧的角度不大于2度。因此，到达外侧表面（20B）的风相对于车辆后方流动，其波动被抑制，并且其流动被拉直。此外，突出部20的相对于车辆的后侧的角部的曲率半径不大于15mm。因此，能够抑制到达突起20的外侧面（20B）的风沿着角部（20E）流动，使其流动变得平坦。因此，可以提高门镜支撑件（16）的风噪声性能。此外，可以减小由车门后视镜（16）朝向镜子朝向侧视窗吸入的风，并且可以抑制可见度的损伤。

36. 发明授权

US06842597B2 Image formation apparatus including an overlap between portions of a photosensitive drum and an adjacent developer unit 失效
标题翻译：图像形成装置包括感光鼓和相邻显影剂单元的部分之间的重叠
公开(公告)号：US06842597B2
公开(公告)日：2005-01-11
申请号：US10376771
申请日：2003-02-28
申请人： Naoki Yamaguchi , Yuzo Kawano , Masakazu Aoki , Hirokazu Tasaka , Yoshihiro Mizoguchi
发明人： Naoki Yamaguchi , Yuzo Kawano , Masakazu Aoki , Hirokazu Tasaka , Yoshihiro Mizoguchi
IPC分类号： G03G15/00 , G03G15/01
CPC分类号： G03G15/0194 , G03G15/0121
摘要： A color image formation apparatus includes a plurality of stages of photosensitive drums provided for respective developing agents, the photosensitive drums arranged in a predetermined direction; and developer units which are provided for respective photosensitive drums and which develop electrostatic latent images formed on the photosensitive drums, wherein an overlap exists in the predetermined direction between a portion of each photosensitive drum and a portion of the developer unit provided so as to correspond to an adjacent photosensitive drum.
摘要翻译：彩色图像形成装置包括为各显影剂设置的多级感光鼓，感光鼓沿预定方向排列; 和显影单元，其被设置用于各个感光鼓并且显影形成在感光鼓上的静电潜像，其中在每个感光鼓的一部分和显影单元的一部分之间的预定方向上存在重叠，相邻的感光鼓。

37. 发明授权

US06595576B2 Housing for member disposed at vehicle exterior 有权
标题翻译：车辆外壳处理的房屋
公开(公告)号：US06595576B2
公开(公告)日：2003-07-22
申请号：US09824243
申请日：2001-04-03
申请人： Toshinobu Mizutani , Kiyohide Imaeda , Yoshio Ohashi , Masakazu Aoki , Masaaki Ito , Wataru Horio , Masahide Inayama , Tadayoshi Kato
发明人： Toshinobu Mizutani , Kiyohide Imaeda , Yoshio Ohashi , Masakazu Aoki , Masaaki Ito , Wataru Horio , Masahide Inayama , Tadayoshi Kato
IPC分类号： B60J120
CPC分类号： B60R1/06
摘要： A housing for a member disposed at a vehicle exterior is formed by assembling a plurality of parts substantially in a vehicle longitudinal direction. At a matching portion when the plurality of parts are assembled together substantially in the vehicle longitudinal direction, a housing outer side end portion of a matching surface substantially at a vehicle frontward side is displaced further outward than a housing outer side end portion of a matching surface substantially at a vehicle rearward side. Or, the housing outer side end portion of the matching surface substantially at the vehicle rearward side may have a curved surface or a flat surface.
摘要翻译：通过组装基本上在车辆纵向上的多个部件来形成用于设置在车辆外部的构件的壳体。在多个部件基本上在车辆前后方向组装的情况下，在匹配部分，大致在车辆前方的匹配表面的壳体外侧端部比匹配表面的壳体外侧端部更向外侧移位基本上在车辆后方。或者，匹配表面的大致在车辆后侧的壳体外侧端部可以具有弯曲表面或平坦表面。

38. 发明授权

US06461112B1 Screw compression apparatus and operation control method thereof 有权
标题翻译：螺杆压缩装置及其操作控制方法
公开(公告)号：US06461112B1
公开(公告)日：2002-10-08
申请号：US09671305
申请日：2000-09-28
申请人： Hiroshi Ohta , Masakazu Aoki , Hiroyuki Matsuda , Hitoshi Nishimura
发明人： Hiroshi Ohta , Masakazu Aoki , Hiroyuki Matsuda , Hitoshi Nishimura
IPC分类号： F04B4900
CPC分类号： F04C28/08 , F04C18/16 , F04C2240/403 , F04C2270/02 , F04C2270/18
摘要： In a capacity control method for an oil-free screw compressor, when an air consumption is larger than a set amount, a rotation frequency of a motor using an inverter to drive the compressor is set to be variable. When the air consumption is a set air amount or less, the inverter is controlled in such a manner that the rotation frequency of the motor is kept at a constant value. In this state, when an operation gas pressure of the compressor reaches an upper-limit value, an air release valve is opened to discharge the operation gas to the atmosphere. Additionally, the rotation frequency of the motor is lowered to a lower-limit value. Re-compression in the compressor can be prevented, and a compressor drive torque is lowered.
摘要翻译：在无油螺杆压缩机的容量控制方法中，当空气消耗量大于设定量时，使用变频器驱动压缩机的电动机的旋转频率被设定为可变的。当空气消耗量为设定的空气量以下时，以使电机的旋转频率保持恒定的方式来控制逆变器。在该状态下，当压缩机的运转气体压力达到上限值时，打开排气阀，将操作气体排出到大气中。此外，电动机的旋转频率降低到下限值。可以防止压缩机中的再压缩，并且压缩机驱动转矩降低。

39. 发明授权

US06450791B1 Scroll compressor 有权
公开(公告)号：US06450791B1
公开(公告)日：2002-09-17
申请号：US09908843
申请日：2001-07-20
申请人： Natsuki Kawabata , Kazuaki Shiinoki , Masakazu Aoki , Shigeru Machida , Toshiaki Yabe
发明人： Natsuki Kawabata , Kazuaki Shiinoki , Masakazu Aoki , Shigeru Machida , Toshiaki Yabe
IPC分类号： F01C102
CPC分类号： F04C18/0223 , F01C21/08 , F04C18/0253 , F04C18/0284 , F04C29/0092 , F04C29/04
摘要： In a double toothed type scroll compressor, spiral wraps are formed on both sides of an end plate of an orbiting scroll, and wraps adapted to engage with the spiral wraps are formed on a stationary scroll. A dust wrap is formed on a side diametrically outside of the wrap of the stationary scroll. Grooves are formed on ends of the respective wraps to receive therein seal members formed of a high polymer material. Electric charge of static electricity produced when the seal members slide on surfaces of the mating end plate is made to flow from a bolt provided on an end of a crankshaft to the stationary scroll through a brush, thereby preventing accumulation of electric charge in a crankshaft.

40. 发明授权

US06414530B2 Semiconductor integrated circuit device, semiconductor memory system and clock synchronous circuit 失效
标题翻译：半导体集成电路器件，半导体存储器系统和时钟同步电路
公开(公告)号：US06414530B2
公开(公告)日：2002-07-02
申请号：US09832019
申请日：2001-04-11
申请人： Hiromasa Noda , Masakazu Aoki , Hitoshi Tanaka , Hideyuki Aoki
发明人： Hiromasa Noda , Masakazu Aoki , Hitoshi Tanaka , Hideyuki Aoki
IPC分类号： H03K1126
CPC分类号： G11C7/1084 , G11C7/1078 , G11C7/22 , G11C7/222 , H03K5/133 , H03K5/135 , H03K5/1504
摘要： A lattice-like delay circuit is configured wherein a plurality of logic gate circuits which are respectively provided with impedance elements for respectively coupling two input signals inputted to first and second input terminals and respectively form output signals obtained by inverting the input signals inputted to the first and second signals, are used so as to be disposed in lattice form in a first signal transfer direction and a second signal transfer direction. Input clock signals are successively delayed in the first signal transfer direction and thereafter inputted to the respective logic gate circuits extending from the first to the last as seen in the first signal transfer direction. Output signals are obtained from output terminals of logic gate circuits placed in at least a plural-numbered stage as seen in the second signal transfer direction and arranged in the first signal transfer direction.
摘要翻译：格子状延迟电路被配置为其中分别设置有用于分别耦合输入到第一和第二输入端子的两个输入信号的阻抗元件的多个逻辑门电路，并且分别形成通过将输入到第一和第二输入端的输入信号反相而获得的输出信号和第二信号被使用以在第一信号传送方向和第二信号传送方向上以格子形式布置。输入时钟信号在第一信号传送方向上被连续地延迟，然后输入到从第一信号传输方向看到的从第一到最后的逻辑门电路。输出信号从放置在至少多个级的逻辑门电路的输出端获得，如第二信号传送方向所示，并且被布置在第一信号传送方向。

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