专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US06995088B2 Surface treatment of copper to improve interconnect formation 有权
标题翻译：铜的表面处理以改善互连形成
公开(公告)号：US06995088B2
公开(公告)日：2006-02-07
申请号：US10848219
申请日：2004-05-18
申请人： Sanjeev Aggarwal , Lindsey Hall , Trace Q. Hurd
发明人： Sanjeev Aggarwal , Lindsey Hall , Trace Q. Hurd
IPC分类号： H01L21/44
CPC分类号： H01L21/2885 , H01L21/76843 , H01L21/76855 , H01L21/76861 , H01L21/76873
摘要： The present invention provides, in one embodiment, a method of forming a copper layer (100) over a semiconductor substrate (105). The method comprises coating a copper seed layer (110) located over a semiconductor substrate with a protective agent (120) to form a protective layer (125). The method also includes placing the semiconductor substrate in an acid bath (145) to remove the protective layer. The method further includes electrochemically depositing a second copper layer (155) on the copper seed layer. Such methods and resulting conductive structures thereof may be advantageously used in methods to manufacture integrated circuits comprising copper interconnects.
摘要翻译：在一个实施例中，本发明提供了一种在半导体衬底（105）上形成铜层（100）的方法。该方法包括用保护剂（120）涂覆位于半导体衬底上的铜籽晶层（110）以形成保护层（125）。该方法还包括将半导体衬底放置在酸浴（145）中以去除保护层。该方法还包括在铜籽晶层上电化学沉积第二铜层（155）。这样的方法及其导电结构可有利地用于制造包括铜互连的集成电路的方法中。

32. 发明授权

US06730354B2 Forming ferroelectric Pb(Zr,Ti)O3 films 失效
标题翻译：形成铁电Pb（Zr，Ti）O3薄膜
公开(公告)号：US06730354B2
公开(公告)日：2004-05-04
申请号：US09925223
申请日：2001-08-08
申请人： Stephen R. Gilbert , Kaushal Singh , Sanjeev Aggarwal , Stevan Hunter
发明人： Stephen R. Gilbert , Kaushal Singh , Sanjeev Aggarwal , Stevan Hunter
IPC分类号： C23C1640
CPC分类号： C23C16/409 , H01L21/31691 , Y10S427/101
摘要： Improved methods of forming PZT thin films that are compatible with industry-standard chemical vapor deposition production techniques are described. These methods enable PZT thin films having thicknesses of 70 nm or less to be fabricated with high within-wafer uniformity, high throughput and at a relatively low deposition temperature. In one aspect, a source reagent solution comprising a mixture of a lead precursor, a titanium precursor and a zirconium precursor in a solvent medium is provided. The source reagent solution is vaporized to form a precursor vapor. The precursor vapor is introduced into a chemical vapor deposition chamber containing the substrate. In another aspect, before deposition, the substrate is preheated during a preheating period. After the preheating period, the substrate is disposed on a heated susceptor during a heating period, after which a PZT film is formed on the heated substrate.
摘要翻译：描述了与工业标准化学气相沉积生产技术相容的形成PZT薄膜的改进方法。这些方法使得厚度为70nm以下的PZT薄膜能够制造成具有高的晶片内均匀性，高产量和较低的沉积温度。一方面，提供了在溶剂介质中包含铅前体，钛前体和锆前体的混合物的源试剂溶液。源试剂溶液蒸发以形成前体蒸气。将前体蒸气引入含有基材的化学气相沉积室中。另一方面，在沉积之前，在预热期间预热衬底。在预热期间之后，在加热时间内将衬底设置在加热的基座上，之后在被加热的衬底上形成PZT膜。

33. 发明授权

US06576482B1 One step deposition process for the top electrode and hardmask in a ferroelectric memory cell 有权
标题翻译：在铁电存储器单元中的顶部电极和硬掩模的一步沉积工艺
公开(公告)号：US06576482B1
公开(公告)日：2003-06-10
申请号：US10140481
申请日：2002-05-07
申请人： Sanjeev Aggarwal , Scott R. Summerfelt , Stevan G. Hunter
发明人： Sanjeev Aggarwal , Scott R. Summerfelt , Stevan G. Hunter
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L21/28568 , H01L21/3143 , H01L28/55
摘要： One aspect of the invention relates to a one-step process for forming a transition metal aluminum oxynitride layer over a transition metal aluminum nitride layer. The transition metal aluminum nitride layer is sputter deposited using a transition metal/aluminum target in an atmosphere containing nitrogen. Subsequently, the oxygen content of the atmosphere is increased, whereby the transition metal aluminum oxynitride layer can be deposited without interrupting the process or otherwise reconditioning the target. Another aspect of the invention relates to depositing a transition metal aluminum nitride layer over a transition metal aluminum oxynitride layer by reducing the oxygen content of the atmosphere. The invention provides a one-step process for depositing a hard mask layer and upper diffusion barrier layer for the capacitor stack of a FeRAM. A top electrode, such as an Ir/IrO electrode, can be deposited as part of the one-step process.
摘要翻译：本发明的一个方面涉及在过渡金属氮化铝层上形成过渡金属铝氧氮化物层的一步法。使用过渡金属/铝靶在含氮的气氛中溅射沉积过渡金属氮化铝层。随后，气氛的氧含量增加，从而可以沉积过渡金属铝氮氧化物层，而不会中断该工艺或以其他方式修复靶。本发明的另一方面涉及通过降低大气中的氧含量在过渡金属铝氮氧化物层上沉积过渡金属氮化铝层。本发明提供了一种用于沉积FeRAM的电容器堆叠的硬掩模层和上扩散阻挡层的一步法。作为一步法的一部分，可以沉积上电极，例如Ir / IrO电极。

34. 发明授权

US06528328B1 Methods of preventing reduction of irox during PZT formation by metalorganic chemical vapor deposition or other processing 有权
标题翻译：通过金属有机化学气相沉积或其他处理防止PZT形成期间irox的还原的方法
公开(公告)号：US06528328B1
公开(公告)日：2003-03-04
申请号：US10036903
申请日：2001-12-21
申请人： Sanjeev Aggarwal , Stephen R. Gilbert , Scott R. Summerfelt
发明人： Sanjeev Aggarwal , Stephen R. Gilbert , Scott R. Summerfelt
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L27/115 , H01L27/11507 , H01L28/55 , H01L28/60
摘要： A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the decreases a reduction in a bottom electrode material during formation of the ferroelectric dielectric portion of the capacitor. In the above manner, a fatigue resistance of the ferroelectric capacitor is increased substantially.
摘要翻译：公开了一种制造铁电电容器的方法。该方法包括在形成电容器的铁电介质部分期间降低底部电极材料的减少。以上述方式，铁电电容器的耐疲劳性大幅度提高。

35. 发明授权

US06500678B1 Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing 有权
标题翻译：通过金属有机化学气相沉积或其他处理防止PZT形成期间IrOx的还原的方法
公开(公告)号：US06500678B1
公开(公告)日：2002-12-31
申请号：US10036771
申请日：2001-12-21
申请人： Sanjeev Aggarwal , Stephen R. Gilbert , Scott R. Summerfelt
发明人： Sanjeev Aggarwal , Stephen R. Gilbert , Scott R. Summerfelt
IPC分类号： H01G706
CPC分类号： H01L28/55 , C23C14/08 , C23C16/0281 , C23C16/409 , H01L27/11502 , H01L27/11507 , H01L28/60
摘要： A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the decreases a reduction in a bottom electrode material during formation of the ferroelectric dielectric portion of the capacitor. In the above manner, a fatigue resistance of the ferroelectric capacitor is increased substantially.
摘要翻译：公开了一种制造铁电电容器的方法。该方法包括在形成电容器的铁电介质部分期间降低底部电极材料的减少。以上述方式，铁电电容器的耐疲劳性大幅度提高。

36. 发明授权

US08518734B2 Process integration of a single chip three axis magnetic field sensor 有权
标题翻译：单芯片三轴磁场传感器的工艺集成
公开(公告)号：US08518734B2
公开(公告)日：2013-08-27
申请号：US12751927
申请日：2010-03-31
申请人： Renu Whig , Phillip Mather , Kenneth Smith , Sanjeev Aggarwal , Jon Slaughter , Nicholas Rizzo
发明人： Renu Whig , Phillip Mather , Kenneth Smith , Sanjeev Aggarwal , Jon Slaughter , Nicholas Rizzo
IPC分类号： H01L27/20 , H01L41/06 , G01R33/02
CPC分类号： H01L43/12 , B82Y25/00 , G01R33/0052 , G01R33/09 , G01R33/093 , G01R33/098 , H01L27/22 , H01L43/02 , H01L43/08
摘要： A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.
摘要翻译：半导体工艺集成了三个桥接电路，每个电路包括在单个芯片上作为惠斯登电桥耦合的磁阻传感器，以在三个正交方向上感测磁场。该过程包括形成磁阻传感器的各种沉积和蚀刻步骤以及在三个桥接电路中的一个上的多个通量引导器，用于将“Z”轴磁场传送到在XY平面中定向的传感器上。

37. 发明授权

US07729156B2 Cycling to mitigate imprint in ferroelectric memories 有权
标题翻译：循环以减轻铁电记忆中的印记
公开(公告)号：US07729156B2
公开(公告)日：2010-06-01
申请号：US11964223
申请日：2007-12-26
申请人： John Anthony Rodriguez , Sanjeev Aggarwal
发明人： John Anthony Rodriguez , Sanjeev Aggarwal
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , G11C29/50
摘要： The method includes storing a memory data state in the ferroelectric memory cell. An event will trigger the evaluation of signal margin on a memory cell. If the memory cell is identified to have a weak signal, the memory cell is exercised. Exercising includes either performing one or more data read/re-write events or performing one or more simulated data read and data write events of an alternating high data state and a low data state to the memory cell associated with the weak data bit. Both the lifetime retention testing and the memory data state exercising are performed in the background of normal memory operation.
摘要翻译：该方法包括将存储器数据状态存储在铁电存储单元中。事件将触发对存储器单元的信号余量的评估。如果存储器单元被识别为具有弱信号，则执行存储器单元。执行包括执行一个或多个数据读取/重写事件，或者执行交替的高数据状态和低数据状态的一个或多个模拟数据读取和数据写入事件到与弱数据位相关联的存储器单元。寿命保留测试和存储器数据状态行使都是在正常存储器操作的背景下执行的。

38. 发明申请

US20070298521A1 METHOD FOR CLEANING POST-ETCH NOBLE METAL RESIDUES 有权
标题翻译：清除后处理金属残留物的方法
公开(公告)号：US20070298521A1
公开(公告)日：2007-12-27
申请号：US11669759
申请日：2007-01-31
申请人： Yaw S. Obeng , Kezhakkedath R. Udayakumar , Scott Robert Summerfelt , Sanjeev Aggarwal , Francis Gabriel Celii , Lindsey H. Hall , Robert Kraft , Theodore S. Moise
发明人： Yaw S. Obeng , Kezhakkedath R. Udayakumar , Scott Robert Summerfelt , Sanjeev Aggarwal , Francis Gabriel Celii , Lindsey H. Hall , Robert Kraft , Theodore S. Moise
IPC分类号： H01L21/00
CPC分类号： H01L21/02071 , H01L21/02129 , H01L21/02164 , H01L21/0217 , H01L21/02175 , H01L21/022 , H01L21/02263 , H01L21/31683 , H01L28/55 , H01L28/65
摘要： A method of manufacturing a semiconductor device is presented. In one aspect, the method comprises forming conductive and ferroelectric material layers on a semiconductor substrate. The material layers are patterned to form electrodes and a ferroelectric layer of a ferroelectric capacitor, wherein a conductive noble metal-containing polymer is generated on sidewalls of the ferroelectric capacitor. The method also comprises converting the conductive noble metal-containing polymer into a non-conducting metal oxide. Converting includes forming a water-soluble metal salt from the conductive noble metal-containing polymer and reacting the water-soluble metal salt with an acqueous acidic solution to form a metal hydroxide. Converting also includes oxidizing the metal hydroxide to form the non-conducting metal oxide.
摘要翻译：提出了制造半导体器件的方法。一方面，该方法包括在半导体衬底上形成导电和铁电材料层。图案化材料层以形成铁电电容器的电极和铁电层，其中在铁电电容器的侧壁上产生导电的含贵金属的聚合物。该方法还包括将含导电贵金属的聚合物转化为非导电金属氧化物。转化包括从含导电贵金属的聚合物形成水溶性金属盐，并使水溶性金属盐与酸性水溶液反应，形成金属氢氧化物。转化还包括氧化金属氢氧化物以形成非导电金属氧化物。

39. 发明申请

US20060073613A1 Ferroelectric memory cells and methods for fabricating ferroelectric memory cells and ferroelectric capacitors thereof 审中-公开
标题翻译：铁电存储单元及其制造铁电存储单元及其铁电电容器的方法
公开(公告)号：US20060073613A1
公开(公告)日：2006-04-06
申请号：US10952987
申请日：2004-09-29
申请人： Sanjeev Aggarwal , K. Udayakumar , James Martin
发明人： Sanjeev Aggarwal , K. Udayakumar , James Martin
IPC分类号： H01L21/00 , H01L21/20 , H01L21/8242
CPC分类号： H01L28/57 , H01L27/11502 , H01L27/11507
摘要： Methods (100) are provided for fabricating a ferroelectric capacitor in a semiconductor device wafer, comprising forming (118) a lower electrode, depositing (126) PZT ferroelectric material on the lower electrode at a temperature below 450 degrees C., and forming (128) an upper electrode on the PZT. Methods are also provided for fabricating a ferroelectric memory cell in a semiconductor device wafer, comprising forming (106) a transistor in the wafer, forming (108) a nickel silicide structure on the gate or a source/drain of the transistor, forming (110) a dielectric over the transistor, forming (112) a conductive contact extending through the dielectric to the silicide structure, forming (114, 116, 118, 120) a lower electrode on at least a portion of the conductive contact, forming (126) PZT ferroelectric material above and in contact with the lower electrode at a temperature below 450 degrees C., forming (128, 132) an upper electrode above and in contact with the PZT, and patterning (134) the upper electrode, the PZT, and the lower electrode to form a patterned ferroelectric capacitor.
摘要翻译：提供了用于在半导体器件晶片中制造铁电电容器的方法（100），包括在低于450℃的温度下形成（118）下电极，在下电极上沉积（126）PZT铁电材料，以及形成（128 ）PZT上的上电极。还提供了用于在半导体器件晶片中制造铁电存储单元的方法，包括在晶片中形成（106）晶体管，在晶体管的栅极或源极/漏极上形成（108）硅化镍结构，形成（110））在所述晶体管上形成电介质，形成（112）延伸穿过所述电介质到所述硅化物结构的导电接触，在所述导电接触的至少一部分上形成（114,116,118,120）下电极， PZT铁电体材料在低于450℃的温度下方与下电极接触，在PZT上方形成（128,132）上电极并与PZT接触，并且（134）上电极，PZT和下电极形成图案化的铁电电容器。

40. 发明申请

US20050260853A1 Surface treatment of copper to improve interconnect formation 有权
标题翻译：铜的表面处理以改善互连形成
公开(公告)号：US20050260853A1
公开(公告)日：2005-11-24
申请号：US10848219
申请日：2004-05-18
申请人： Sanjeev Aggarwal , Lindsey Hall , Trace Hurd
发明人： Sanjeev Aggarwal , Lindsey Hall , Trace Hurd
IPC分类号： H01L21/288 , H01L21/4763 , H01L21/768
CPC分类号： H01L21/2885 , H01L21/76843 , H01L21/76855 , H01L21/76861 , H01L21/76873
摘要： The present invention provides, in one embodiment, a method of forming a copper layer (100) over a semiconductor substrate (105). The method comprises coating a copper seed layer (110) located over a semiconductor substrate with a protective agent (120) to form a protective layer (125). The method also includes placing the semiconductor substrate in an acid bath (145) to remove the protective layer. The method further includes electrochemically depositing a second copper layer (155) on the copper seed layer. Such methods and resulting conductive structures thereof may be advantageously used in methods to manufacture integrated circuits comprising copper interconnects.
摘要翻译：在一个实施例中，本发明提供了一种在半导体衬底（105）上形成铜层（100）的方法。该方法包括用保护剂（120）涂覆位于半导体衬底上的铜籽晶层（110）以形成保护层（125）。该方法还包括将半导体衬底放置在酸浴（145）中以去除保护层。该方法还包括在铜籽晶层上电化学沉积第二铜层（155）。这样的方法及其导电结构可有利地用于制造包括铜互连的集成电路的方法中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式