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1. 发明授权

US06576482B1 One step deposition process for the top electrode and hardmask in a ferroelectric memory cell 有权
标题翻译：在铁电存储器单元中的顶部电极和硬掩模的一步沉积工艺
公开(公告)号：US06576482B1
公开(公告)日：2003-06-10
申请号：US10140481
申请日：2002-05-07
申请人： Sanjeev Aggarwal , Scott R. Summerfelt , Stevan G. Hunter
发明人： Sanjeev Aggarwal , Scott R. Summerfelt , Stevan G. Hunter
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L21/28568 , H01L21/3143 , H01L28/55
摘要： One aspect of the invention relates to a one-step process for forming a transition metal aluminum oxynitride layer over a transition metal aluminum nitride layer. The transition metal aluminum nitride layer is sputter deposited using a transition metal/aluminum target in an atmosphere containing nitrogen. Subsequently, the oxygen content of the atmosphere is increased, whereby the transition metal aluminum oxynitride layer can be deposited without interrupting the process or otherwise reconditioning the target. Another aspect of the invention relates to depositing a transition metal aluminum nitride layer over a transition metal aluminum oxynitride layer by reducing the oxygen content of the atmosphere. The invention provides a one-step process for depositing a hard mask layer and upper diffusion barrier layer for the capacitor stack of a FeRAM. A top electrode, such as an Ir/IrO electrode, can be deposited as part of the one-step process.
摘要翻译：本发明的一个方面涉及在过渡金属氮化铝层上形成过渡金属铝氧氮化物层的一步法。使用过渡金属/铝靶在含氮的气氛中溅射沉积过渡金属氮化铝层。随后，气氛的氧含量增加，从而可以沉积过渡金属铝氮氧化物层，而不会中断该工艺或以其他方式修复靶。本发明的另一方面涉及通过降低大气中的氧含量在过渡金属铝氮氧化物层上沉积过渡金属氮化铝层。本发明提供了一种用于沉积FeRAM的电容器堆叠的硬掩模层和上扩散阻挡层的一步法。作为一步法的一部分，可以沉积上电极，例如Ir / IrO电极。

2. 发明申请

US20130154099A1 PAD OVER INTERCONNECT PAD STRUCTURE DESIGN 审中-公开
标题翻译： PAD OVER INTERCONNECT PAD STRUCTURE设计
公开(公告)号：US20130154099A1
公开(公告)日：2013-06-20
申请号：US13329105
申请日：2011-12-16
申请人： Stevan G. Hunter , Bryce A. Rasmussen , Troy L. Ruud
发明人： Stevan G. Hunter , Bryce A. Rasmussen , Troy L. Ruud
IPC分类号： H01L23/522 , G06F17/50
CPC分类号： G06F17/5068 , G06F17/5045 , G06F17/5072 , G06F17/5081 , H01L23/4951 , H01L23/49527 , H01L23/49534 , H01L23/522 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/05093 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2924/00014 , H01L2924/01047 , H01L2924/01327 , H01L2924/10253 , H01L2924/351 , H01L2924/00 , H01L2224/48
摘要： A design rule checker that performs a maximum pattern density check in a first intermediary metallization layer that underlies a top metallization layer and a pad opening in an integrated circuit. The maximum pattern density check is performed at least under some circumstances if a modulus of the primary metallization material is less than a modulus of a surrounding dielectric material. The maximum pattern density check verifies that the pattern density within the underlying portion is below a maximum pattern density that depends on the thickness of the access pad. A maximum metal width check may also be performed in this portion.
摘要翻译：一种设计规则检查器，其在第一中间金属化层中执行最大图案密度检查，所述第一中间金属化层位于集成电路中的顶部金属化层和衬垫开口的下面。至少在某些情况下，如果初级金属化材料的模量小于周围电介质材料的模量，则进行最大图案密度检查。最大图案密度检查验证底层部分内的图案密度低于取决于访问垫的厚度的最大图案密度。也可以在该部分中执行最大金属宽度检查。

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