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    • 31. 发明授权
    • Fabrication process of a semiconductor integrated circuit device having
a local interconnect pattern and a semiconductor integrated circuit
device fabricated according to such a fabrication process
    • 具有局部互连图案的半导体集成电路器件和根据这样的制造工艺制造的半导体集成电路器件的制造工艺
    • US5843841A
    • 1998-12-01
    • US661011
    • 1996-06-10
    • Tetsuo IzawaHiroshi GotoKoichi Hashimoto
    • Tetsuo IzawaHiroshi GotoKoichi Hashimoto
    • H01L21/768H01L21/441
    • H01L21/76895
    • A method for fabricating a semiconductor integrated circuit includes the steps of providing a conductor film on a substrate, providing an insulator film on the conductor film to form a layered structure, removing the insulator film selectively from a first part thereof corresponding to a conductor pattern to be formed, while remaining the insulator film on a second part thereof corresponding also to a conductor pattern to be formed, patterning the layered structure to form a conductor pattern defined by side walls, providing a side wall insulation to each of the side walls of the conductor pattern, providing a first local interconnect pattern on the first part of the conductor pattern such that the first local interconnect pattern establishes an electrical connection with the conductor pattern at the first part, and providing a second local interconnect pattern on the second part of the conductor pattern such that the second local interconnect pattern bridges across the conductor pattern at the second part, without establishing electrical connection therewith.
    • 一种制造半导体集成电路的方法包括以下步骤:在基板上提供导体膜,在导体膜上提供绝缘膜以形成层状结构,从对应于导体图案的第一部分选择性地去除绝缘膜, 形成,同时在其第二部分上保留绝缘膜,其也对应于要形成的导体图案,图案化层叠结构以形成由侧壁限定的导体图案,为侧壁的每个侧壁提供侧壁绝缘 在导体图案的第一部分上提供第一局部互连图案,使得第一局部互连图案在第一部分建立与导体图案的电连接,并且在第二部分上提供第二局部互连图案 导体图案,使得第二局部互连图案穿过导体图案 在第二部分,没有建立与其的电连接。
    • 34. 发明授权
    • Alkylenediamine derivatives
    • 烷二胺衍生物
    • US5310902A
    • 1994-05-10
    • US741590
    • 1991-08-07
    • Mitsuo MasakiMasaru SatohNaoya MoritohKoichi HashimotoToshiro KamishiroHaruhiko Shinozaki
    • Mitsuo MasakiMasaru SatohNaoya MoritohKoichi HashimotoToshiro KamishiroHaruhiko Shinozaki
    • C07D295/13C07D223/00C07D211/26
    • C07D295/13
    • Novel alkylenediamine derivatives effectively employable glutamate blockers have the formula (I) or (II): ##STR1## wherein each of R.sup.1 and R.sup.6 is an aliphatic hydrocarbon group, an alicyclic hydrocarbon group, an aryl group, or an aralkyl group; each of R.sup.2 and R.sup.7 is an aliphatic hydrocarbon group, an alkoxy group, an aliphatic hydrocarbon group containing an ester bonding, an aliphatic hydrocarbon group containing an ether bonding, or an aryloxy group; each of R.sup.3, R.sup.4, R.sup.5 R.sup.8, R.sup.9 and R.sup.10 is hydrogen, an alkyl group, an alkoxy group, an acyloxy group, an aryl group, an aralkyl group, hydroxyl, a hydroxylalkyl group, halogen, nitrile, nitro, amino, carbamoyl or alkoxycarbonyl; and each of m and n is an integer of 0-3 (m+n does not exceed 3); k is an integer of 1-4; each of p and i is an integer of 2-13; and each of q and j is an integer of 4-7.
    • 新型亚烷基二胺衍生物有效地可用的谷氨酸盐阻滞剂具有式(I)或(II):其中R 1和R 6各自为脂族烃基,脂环族烃基,芳基 ,或芳烷基; R 2和R 7各自为脂族烃基,烷氧基,含酯键的脂族烃基,含有醚键的脂族烃基或芳氧基; R 3,R 4,R 5,R 9和R 10各自为氢,烷基,烷氧基,酰氧基,芳基,芳烷基,羟基,羟基烷基,卤素,腈,硝基,氨基,氨基甲酰基 或烷氧基羰基; 并且m和n分别为0-3的整数(m + n不超过3); k是1-4的整数; p和i中的每一个是2-13的整数; 并且q和j中的每一个是4-7的整数。
    • 35. 发明授权
    • Cash processing method and system
    • 现金处理方法和制度
    • US4594664A
    • 1986-06-10
    • US427925
    • 1982-09-29
    • Koichi Hashimoto
    • Koichi Hashimoto
    • G07D9/00G07G1/00G07G1/14G07G1/12
    • G06Q30/04G06Q20/202G07G1/14
    • A cash processing method is disclosed for aggregating sales data from cash processing units. Each cash processing unit has a coin counter and bill counter for accepting coins and bills received from sales, sorting the coins, and counting the coins and bills. Each cash processing unit aggregates sales data by "lot", which is a designation for a grouping of data, where the grouping of data may be according to a particular sales department, having at least one cash register, or according to a particular cash register used for processing sales transactions from at least one sales department. The aggregated sales data is identified by identification codes associated with each lot of data. Each cash processing unit collects sales data and aggregates the sales data, identifying it with a particular code number. This data is then sent to one of the cash processing units that has been designated the master unit.
    • 披露了从现金处理单元汇总销售数据的现金处理方法。 每个现金处理单元具有用于接收从销售收到的硬币和纸币的硬币计数器和钞票计数器,对硬币进行分类以及计数硬币和纸币。 每个现金处理单元通过“批量”来汇总销售数据,“批量”是数据分组的指定,其中数据分组可以根据特定销售部门,具有至少一个收银机,或根据特定的收银机 用于处理至少一个销售部门的销售交易。 聚合销售数据由与每批数据相关联的识别代码标识。 每个现金处理单元收集销售数据并汇总销售数据,并用特定代码标识。 然后将该数据发送到已经被指定为主单元的一个现金处理单元。
    • 37. 发明授权
    • Semiconductor multilayer structure on an off-cut semiconductor substrate
    • 半导体半导体衬底上的半导体多层结构
    • US08124984B2
    • 2012-02-28
    • US12665556
    • 2009-05-11
    • Masao UchidaKazuya UtsunomiyaKoichi Hashimoto
    • Masao UchidaKazuya UtsunomiyaKoichi Hashimoto
    • H01L29/04
    • H01L29/812H01L23/544H01L29/045H01L29/0696H01L29/1608H01L29/66068H01L29/7828H01L2223/54426H01L2223/5446H01L2924/0002H01L2924/00
    • A semiconductor device is fabricated on an off-cut semiconductor substrate 11. Each unit cell 10 thereof includes: a first semiconductor layer 12 on the surface of the substrate 11; a second semiconductor layer 16 stacked on the first semiconductor layer 12 to have an opening 16e that exposes first and second conductive regions 15 and 14 at least partially; a first conductor 19 located inside the opening 16e of the second semiconductor layer 16 and having a conductive surface 19s that contacts with the first and second conductive regions 15 and 14; and a second conductor 17 arranged on the second semiconductor layer 16 and having an opening 18e corresponding to the opening 16s of the second semiconductor layer 16. In a plane that is defined parallel to the surface of the substrate 11 , the absolute value of a difference between the respective lengths of the second semiconductor layer 16 and the second conductor 18 as measured in the off-cut direction is greater than the absolute value of their difference as measured perpendicularly to the off-cut direction.
    • 半导体器件制造在截止半导体衬底11上。每个单电池10包括:在衬底11的表面上的第一半导体层12; 堆叠在第一半导体层12上以具有至少部分地暴露第一和第二导电区域15和14的开口16e的第二半导体层16; 第一导体19位于第二半导体层16的开口16e的内部,并且具有与第一和第二导电区域15和14接触的导电表面19s; 以及布置在第二半导体层16上并具有对应于第二半导体层16的开口16s的开口18e的第二导体17.在与衬底11的表面平行定义的平面中,差异的绝对值 在沿切断方向测量的第二半导体层16和第二导体18的各自长度之间的距离大于垂直于偏离方向测量的它们的差的绝对值。
    • 38. 发明申请
    • MICROSCOPE AND A FLUORESCENT OBSERVATION METHOD USING THE SAME
    • 显微镜和使用其的荧光观察方法
    • US20110242308A1
    • 2011-10-06
    • US13061705
    • 2009-06-10
    • Yasunobu IgarashiTakeshi ObaraYuki DeguchiTakeshi SuzukiKoichi Hashimoto
    • Yasunobu IgarashiTakeshi ObaraYuki DeguchiTakeshi SuzukiKoichi Hashimoto
    • H04N7/18
    • G02B21/0088G01N21/6458G02B21/0076G02B21/16G02B21/26G02B21/34
    • A microscope capable of controlling the position and fluorescent recording of an object under observation such as cells is provided with the fluorescent observation method using the microscope. The microscope 1 comprises: a stage 3 on which the object under observation 2 is placed; an illumination light source 4 for the object under observation 2; an excitation light source 5 for exciting fluorescent light F to the object under observation 2; an image information detecting part 16 for detecting the image information formed with the light T generated at the object under observation 2; a fluorescent image information detecting part 17 for detecting the fluorescent image information formed with fluorescent light F; and a control part 20, which determines the fluorescent observation area of the object under observation 2 based on the dynamic model of the object under observation 2 and its image information entered from the image information detecting part 16, and then obtains the image information of the object under observation 2 entered from the image information detecting part 16 and the fluorescent image information entered from the fluorescent image information detecting part 17 at specified interval within the fluorescent observation area.
    • 在使用显微镜的荧光观察方法中,提供能够控制诸如细胞等观察对象的位置和荧光记录的显微镜。 显微镜1包括:放置观察对象物2的台3; 用于被观察物体2的照明光源4; 用于将荧光F激励到观察对象物2的激发光源5; 用于检测由在观察对象物体2处产生的光T形成的图像信息的图像信息检测部分16; 用于检测由荧光F形成的荧光图像信息的荧光图像信息检测部17; 以及控制部20,其基于观察对象物2的动态模型及其从图像信息检测部16输入的图像信息,确定观察对象物的荧光观察区域2,然后获得图像信息 从图像信息检测部16输入的观察对象物2和从荧光图像信息检测部17输入的荧光图像信息以规定的间隔在荧光观察区域内。
    • 39. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20100295060A1
    • 2010-11-25
    • US12518483
    • 2008-10-10
    • Chiaki KudouOsamu KusumotoKoichi Hashimoto
    • Chiaki KudouOsamu KusumotoKoichi Hashimoto
    • H01L29/808H01L21/337
    • H01L29/0847H01L29/1608H01L29/42368H01L29/66068H01L29/7828
    • A semiconductor device 100 includes: a semiconductor substrate 10 of silicon carbide of a first conductivity type; a silicon carbide epitaxial layer 20 of the first conductivity type, which has been grown on the principal surface 10a of the substrate 10; well regions 22 of a second conductivity type, which form parts of the silicon carbide epitaxial layer 20; and source regions 24 of the first conductivity type, which form respective parts of the well regions 22. A channel epitaxial layer 30 of silicon carbide has been grown over the well regions 22 and source regions 24 of the silicon carbide epitaxial layer 20. A portion of the channel epitaxial layer 30 that is located over the well regions 22 functions as a channel region 40. And a dopant of the first conductivity type has been implanted into the other portions 33 and 35 of the channel epitaxial layer 30 except the channel region 40.
    • 半导体器件100包括:第一导电类型的碳化硅的半导体衬底10; 已经在衬底10的主表面10a上生长的第一导电类型的碳化硅外延层20; 第二导电类型的阱区22,其形成碳化硅外延层20的一部分; 以及形成阱区22的相应部分的第一导电类型的源极区24.已经在碳化硅外延层20的阱区22和源极区24上生长了碳化硅的沟道外延层30.一部分 位于阱区22上方的沟道外延层30用作沟道区40.第一导电类型的掺杂剂已经被注入到沟道外延层30的除了沟道区40之外的其它部分33和35中 。
    • 40. 发明申请
    • Power Device
    • 电源设备
    • US20080265260A1
    • 2008-10-30
    • US11570269
    • 2005-06-10
    • Makoto KitabatakeOsamu KusumotoMasao UchidaKunimasa TakahashiKenya YamashitaKoichi Hashimoto
    • Makoto KitabatakeOsamu KusumotoMasao UchidaKunimasa TakahashiKenya YamashitaKoichi Hashimoto
    • H01L29/24
    • H01L29/7828H01L29/0696H01L29/0847H01L29/105H01L29/1608H01L29/365
    • A power device having a transistor structure is formed by using a wide band gap semiconductor. A current path 20 of the power device includes: a JFET (junction) region 2, a drift region 3, and a substrate 4, which have ON resistances exhibiting a positive temperature dependence; and a channel region 1, which has an ON resistance exhibiting a negative temperature dependence. A temperature-induced change in the ON resistance of the entire power device is derived by allowing a temperature-induced change ΔRp in the ON resistance in the JFET (junction) region 2, the drift region 3, and the substrate 4, which have ON resistances exhibiting a positive temperature dependence, and a temperature-induced change ΔRn in the ON resistance in the channel region 1, which has an ON resistance exhibiting a negative temperature dependence, to cancel out each other. With respect to an ON resistance of the entire power device at −30° C., a ratio of change in the ON resistance of the entire power device when a temperature of the power device is varied from −30° C. to 100° C. is 50% or less.
    • 通过使用宽带隙半导体形成具有晶体管结构的功率器件。 功率器件的电流通路20包括:具有呈现正温度依赖性的导通电阻的JFET(结)区域2,漂移区域3和衬底4; 以及具有呈现负温度依赖性的导通电阻的沟道区域1。 通过使JFET(结)区域2,漂移区域3中的导通电阻中的温度感应变化ΔR

      <! - SIPO - >于高电平,导致整个功率器件的导通电阻的温度引起的变化, 并且具有呈现正温度依赖性的导通电阻的基板4和沟道区域1中的导通电阻中的温度感应变化ΔR ,其具有呈现负温度依赖性的导通电阻 ,取消对方。 关于整个功率器件在-30℃的导通电阻,当功率器件的温度从-30℃变化到100℃时,整个功率器件的导通电阻的变化率 50%以下。