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    • 34. 发明授权
    • Semiconductor memory
    • 半导体存储器
    • US07847363B2
    • 2010-12-07
    • US12370638
    • 2009-02-13
    • Kikuko SugimaeSatoshi TanakaKoji HashimotoMasayuki Ichige
    • Kikuko SugimaeSatoshi TanakaKoji HashimotoMasayuki Ichige
    • G11C5/00
    • G11C5/063G11C16/0408H01L27/0207H01L27/105H01L27/11519H01L27/11526H01L27/11531
    • Borderless contacts for word lines or via contacts for bit lines are formed using interconnect patterns, a part of which is removed. A semiconductor memory includes: a plurality of active regions AAi, AAi+1, . . . , AAn, which extend on a memory cell array along the column length; a plurality of word line patterns WL1, WL2, . . . , extend along the row length and are non-uniformly arranged; a plurality of select gate line patterns SG1, SG2, . . . , are arranged parallel to the plurality of word line patterns; borderless contacts are formed near the ends of the word line patterns on the memory cell array, and are in contact with part of an interconnect extended from the end of the memory cell array, but are not in contact with interconnects adjacent to that interconnect; and bit line contacts are formed within contact forming regions provided by removing part of the plurality of word line patterns and select gate line patterns through double exposure.
    • 用于字线的无边界触点或通过位线的触点使用互连图案形成,其中一部分被去除。 半导体存储器包括:多个有源区域AAi,AAi + 1,..., 。 。 ,AAn,其沿着列长延伸在存储单元阵列上; 多个字线图案WL1,WL2,...。 。 。 沿着行长延伸并且不均匀地布置; 多个选择栅极线图案SG1,SG2,...。 。 。 被平行于所述多个字线图形排列; 在存储单元阵列上的字线图案的端部附近形成无边界触点,并且与从存储单元阵列的端部延伸的互连部分接触,但不与与该互连件相邻的互连件接触; 并且通过去除多个字线图案的一部分而提供的接触形成区域内形成位线接触,并通过双重曝光选择栅极线图案。
    • 38. 发明申请
    • ELECTRONIC CONTROL UNIT HAVING ANALOG INPUT SIGNAL
    • 具有模拟输入信号的电子控制单元
    • US20100149007A1
    • 2010-06-17
    • US12508252
    • 2009-07-23
    • Yuji ZUSHIShinsuke SuzukiKoji Hashimoto
    • Yuji ZUSHIShinsuke SuzukiKoji Hashimoto
    • H03M1/10
    • H03M1/1028H03M1/1042H03M1/109H03M1/122
    • An analog input signal obtained from an analog sensor group 104A and first and second calibration voltages obtained by high-precision voltage-dividing resistors are successively selected by a multiplexer, digitally converted through an AD converter and then input to a microprocessor. The microprocessor calculates a collinear approximate coefficient based on the first and second calibration voltages in cooperation with a program memory, and corrects the digital conversion value to the analog input signal by using the approximate coefficient, thereby correcting a linear error of the conversion characteristic of the AD converter. In the calculation of the approximate coefficient, upper and lower limit check is executed on measurement values and calculation coefficients, and also plural calculation results are averaged to enhance the precision.
    • 从模拟传感器组104A获得的模拟输入信号和由高精度分压电阻获得的第一和第二校准电压由多路复用器连续选择,多路复用器通过AD转换器进行数字转换,然后输入到微处理器。 微处理器根据与程序存储器协作的第一校准电压和第二校准电压计算共线近似系数,并通过使用近似系数校正模拟输入信号的数字转换值,从而校正该转换特性的线性误差 AD转换器。 在近似系数的计算中,对测量值和计算系数执行上限和下限检查,并且还对多个计算结果进行平均以提高精度。