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31. 发明授权

US06967213B2 Isothiazole derivatives, process for the preparation thereof, and pharmaceutical composition including the same 有权
标题翻译：异噻唑衍生物，其制备方法和包含其的药物组合物
公开(公告)号：US06967213B2
公开(公告)日：2005-11-22
申请号：US10681919
申请日：2003-10-09
申请人： Il Hwan Cho , Dong Hyun Ko , Myeong Yun Chae , In Ki Min , Young Hoon Kim , Young Mee Chung , Hyun Jung Park , Ji Young Noh , Il Hwan Kim , Hyung Chul Ryu , Sang Wook Park , Sung Hak Jung , Jong Hoon Kim
发明人： Il Hwan Cho , Dong Hyun Ko , Myeong Yun Chae , In Ki Min , Young Hoon Kim , Young Mee Chung , Hyun Jung Park , Ji Young Noh , Il Hwan Kim , Hyung Chul Ryu , Sang Wook Park , Sung Hak Jung , Jong Hoon Kim
IPC分类号： A61P29/00 , C07D275/02 , A61K31/425
CPC分类号： C07D275/02
摘要： The present invention relates to an isothiazole derivative of the following formula 1 or nontoxic salt thereof: wherein, R1 is hydrogen, alkoxy group or halogen group; R2 is methyl or amino group. According to the present invention, isothiazole derivative or nontoxic salt thereof having antipyretic, analgesic and antiphlogistic activity and an improved side effect; process for the preparation thereof; and pharmaceutical composition including the same can be provided.
摘要翻译：本发明涉及下式1的异噻唑衍生物或其无毒盐：其中R 1是氢，烷氧基或卤素基团; R 2是甲基或氨基。根据本发明，具有解热，镇痛和消炎活性的异噻唑衍生物或其无毒盐具有改善的副作用; 制备方法; 并且可以提供包含其的药物组合物。

32. 发明授权

US06642626B2 Ball grid array IC package and manufacturing method thereof 失效
公开(公告)号：US06642626B2
公开(公告)日：2003-11-04
申请号：US10024888
申请日：2001-12-18
申请人： Sang Wook Park
发明人： Sang Wook Park
IPC分类号： H01L2348
CPC分类号： H01L24/81 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/10135 , H01L2224/1319 , H01L2224/1403 , H01L2224/16225 , H01L2224/16227 , H01L2224/17051 , H01L2224/81001 , H01L2224/81136 , H01L2224/81139 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H05K3/3436 , H05K2201/10568 , H05K2201/2036 , H05K2203/0182 , H05K2203/0465 , H05K2203/306 , Y02P70/613 , H01L2924/00012 , H01L2224/05599
摘要： A ball grid array IC package and manufacturing method thereof comprise spherical conductive balls that are changed into a shape having an hourglass type feature. A semiconductor chip having a plurality of chip pads, a substrate having ball lands, hourglass type conductive balls electrically connected to the chip pads and to the ball lands, and an interval maintaining member maintaining a uniform interval between the semiconductor chip and substrate. The method includes a heat treatment that expands the interval maintaining member to provide a uniform width between the surface of the chip and the substrate so that the conductive balls change into the hourglass shape, after which removal of the heat treatment decreases the size of the interval maintaining member so that the physical separation between the surfaces is provided by the connecting members having the hourglass shapes.

33. 发明授权

US06521526B2 Method of manufacturing flash memory 失效
公开(公告)号：US06521526B2
公开(公告)日：2003-02-18
申请号：US09998339
申请日：2001-12-03
申请人： Cha Deok Dong , Sang Wook Park , Se Ho Park
发明人： Cha Deok Dong , Sang Wook Park , Se Ho Park
IPC分类号： H01L214763
CPC分类号： H01L29/66825 , H01L21/76849 , H01L21/7685 , H01L27/11521
摘要： The present invention forms a protection layer of doped amorphous silicon or amorphous silicon on a semiconductor substrate in which a control gate is formed in a stack structure of doped poly Si and etches only a given portion of the protection layer in a subsequent process to form a contact hole. Therefore, the present invention can prevent oxidization of a given portion of WSix due to exposed WSix.

34. 发明授权

US06458693B1 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06458693B1
公开(公告)日：2002-10-01
申请号：US09328694
申请日：1999-06-09
申请人： Sang Wook Park , Min Sik Jang
发明人： Sang Wook Park , Min Sik Jang
IPC分类号： H01L2144
CPC分类号： H01L21/76886
摘要： A semiconductor device which can reduce contact resistance, is disclosed. A semiconductor device according to the present invention includes a lower conductor pattern and an upper conductor pattern. The lower conductor pattern is in contact with the upper conductor pattern. The lower conductor pattern includes a first doped polysilicon layer, a first tungsten silicide layer and a cap layer formed sequentially. Here, the cap layer is formed to a doped polysilicon layer containing a small amount of tungsten and has stoichiometrical equivalent ratio x of Si higher than the first tungsten silicide layer. The upper conductor pattern includes a second doped polysilicon layer and a second tungsten layer formed sequentially. The contact of lower conductor pattern and the upper conductor pattern is substantially formed between the cap layer and the second doped polysilicon layer. Preferably, stoichiometrical equivalent ratio x of Si for the first tungsten silicide layer is 2.3 to 2.5 and stoichiometrical equivalent ratio x of Si for the cap layer is 2.6 to 2.9.
摘要翻译：公开了能够降低接触电阻的半导体装置。根据本发明的半导体器件包括下导体图案和上导体图案。下导体图案与上导体图案接触。下导体图案包括依次形成的第一掺杂多晶硅层，第一硅化钨层和盖层。这里，盖层形成为含有少量钨的掺杂多晶硅层，并且具有高于第一硅化钨层的Si的化学计量当量比x。上导体图案包括顺序形成的第二掺杂多晶硅层和第二钨层。下导体图案和上导体图案的接触基本形成在盖层和第二掺杂多晶硅层之间。优选地，第一硅化钨层的Si的化学计量当量比x为2.3至2.5，并且用于盖层的Si的化学计量当量比x为2.6至2.9。

35. 发明授权

US06380615B1 Chip size stack package, memory module having the same, and method of fabricating the module 有权
标题翻译：芯片尺寸堆叠封装，具有相同的存储器模块以及制造该模块的方法
公开(公告)号：US06380615B1
公开(公告)日：2002-04-30
申请号：US09604091
申请日：2000-06-27
申请人： Sang Wook Park , Jae Myun Kim
发明人： Sang Wook Park , Jae Myun Kim
IPC分类号： H01L2302
CPC分类号： H01L23/3114 , H01L21/563 , H01L23/13 , H01L24/27 , H01L24/45 , H01L24/48 , H01L24/743 , H01L25/0657 , H01L2224/05001 , H01L2224/05022 , H01L2224/05548 , H01L2224/056 , H01L2224/16145 , H01L2224/32225 , H01L2224/32245 , H01L2224/451 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48463 , H01L2224/73203 , H01L2224/73215 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06524 , H01L2225/06582 , H01L2924/00014 , H01L2924/15153 , H01L2924/15165 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/3512 , H01L2924/00015 , H01L2224/05599 , H01L2224/05099 , H01L2924/00012
摘要： Disclosed are a chip size stack package, a memory module having the same and a method for fabricating the memory module. In the chip size stack package, two semiconductor chips are arranged in a manner such that their surfaces on which bonding pads are formed, are opposed to each other at a predetermined interval. Insulating layers are applied to the surfaces of the semiconductor chips on which surfaces the bonding pads are formed, in a manner such that the bonding pads are exposed. Metal traces are respectively deposited on the insulating layers and connected to the bonding pads. Solder balls electrically connect the metal traces with each other. One ends of metal wires are bonded to a side of one of the metal traces. Both sides of the semiconductor chips and a space between them are molded by an encapsulate, in a manner such that the other ends of the metal wires are exposed.
摘要翻译：公开了一种芯片尺寸的堆叠封装，具有该封装的存储器模块和用于制造存储器模块的方法。在芯片尺寸堆叠封装中，以这样的方式布置两个半导体芯片，使得它们在其上形成焊盘的表面以预定间隔彼此相对。绝缘层以这样的方式施加到其上形成有接合焊盘的表面的半导体芯片的表面上，使得焊盘被暴露。金属迹线分别沉积在绝缘层上并连接到焊盘。焊球将金属轨迹彼此电连接。金属线的一端结合在一个金属迹线的一侧。半导体芯片的两侧和它们之间的空间通过密封件模制，使得金属线的另一端露出。

36. 发明授权

US08669794B2 Circuit for detecting a voltage change using a time-to-digital converter 有权
标题翻译：用于使用时间 - 数字转换器检测电压变化的电路
公开(公告)号：US08669794B2
公开(公告)日：2014-03-11
申请号：US13401296
申请日：2012-02-21
申请人： Sang Wook Park , Ashwin Raghunathan , Marzio Pedrali-Noy
发明人： Sang Wook Park , Ashwin Raghunathan , Marzio Pedrali-Noy
IPC分类号： H03L7/06
CPC分类号： G01R19/255 , G04F10/005
摘要： A circuit for detecting a voltage change is described. The circuit includes a supply insensitive pulse generator that generates a pulse signal. The circuit also includes a time-to-digital converter coupled to the supply insensitive pulse generator. The time-to-digital converter generates a digital signal based on the pulse signal and a voltage. The circuit also includes a controller coupled to the time-to-digital converter that detects a voltage change based on the digital signal.
摘要翻译：描述用于检测电压变化的电路。电路包括产生脉冲信号的电源不敏感脉冲发生器。电路还包括耦合到不敏感脉冲发生器的时间 - 数字转换器。时间 - 数字转换器基于脉冲信号和电压产生数字信号。电路还包括耦合到时间 - 数字转换器的控制器，其基于数字信号来检测电压变化。

37. 发明授权

US08516053B2 Multimedia play apparatus and method 有权
标题翻译：多媒体播放装置及方法
公开(公告)号：US08516053B2
公开(公告)日：2013-08-20
申请号：US12832586
申请日：2010-07-08
申请人： Sang Wook Park , Noh Sam Park , Jong Hyun Jang , Kwang Roh Park
发明人： Sang Wook Park , Noh Sam Park , Jong Hyun Jang , Kwang Roh Park
IPC分类号： G06F15/16
CPC分类号： H04N5/775 , G11B27/11 , G11B2020/10537 , H04N21/242 , H04N21/4788 , H04N21/4882
摘要： Provided are a multimedia play apparatus and method. The multimedia play apparatus and method enable synchronization between an audio and a video through existing multimedia play time information, and even in a multimedia service that simultaneously provides multimedia and a message, the multimedia play apparatus and method enable synchronization between multimedia and a message that occurs by terminal characteristics between different environments and different users on the basis of existing multimedia play time information and multimedia meaning information. Moreover, by performing synchronization between multimedia and a message on the basis of the multimedia meaning information, the multimedia play apparatus and method can prevent the damage of a multimedia service that provides multimedia and a message together because of a spoiler corresponding to a malicious message.
摘要翻译：提供了一种多媒体播放装置和方法。多媒体播放装置和方法通过现有的多媒体播放时间信息实现音频和视频之间的同步，即使在同时提供多媒体和消息的多媒体服务中，多媒体播放装置和方法也可以实现多媒体与发生的消息之间的同步根据现有多媒体播放时间信息和多媒体含义信息的不同环境和不同用户之间的终端特性。此外，通过基于多媒体含义信息进行多媒体和消息之间的同步，多媒体播放装置和方法可以防止由于与恶意消息对应的扰流器而将多媒体和消息一起提供的多媒体服务的损坏。

38. 发明授权

US08120436B2 System and method for implementing an oscillator 有权
标题翻译：用于实现振荡器的系统和方法
公开(公告)号：US08120436B2
公开(公告)日：2012-02-21
申请号：US12433336
申请日：2009-04-30
申请人： Sang Wook Park , Edgar Sánchez-Sinencio
发明人： Sang Wook Park , Edgar Sánchez-Sinencio
IPC分类号： H03B5/24
CPC分类号： H03B5/24
摘要： In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.
摘要翻译：在一个实施例中，用于产生振荡信号的系统包括跨导放大器，其包括单端输出和差分输入。该系统还仅包括耦合到跨导放大器的一个反馈环路。反馈回路包括配置成接收跨导放大器的输出的低通滤波器。此外，反馈回路包括高通滤波器，其被配置为接收第一低通滤波器的输出并将信号输出到跨导放大器的差分输入的仅一个端子。

39. 发明授权

US07829934B2 Flash memory device having resistivity measurement pattern and method of forming the same 有权
标题翻译：具有电阻率测量图案的闪存器件及其形成方法
公开(公告)号：US07829934B2
公开(公告)日：2010-11-09
申请号：US12172321
申请日：2008-07-14
申请人： Ki Hong Yang , Sang Wook Park
发明人： Ki Hong Yang , Sang Wook Park
IPC分类号： H01L29/66
CPC分类号： H01L27/11541 , H01L27/105 , H01L27/11526
摘要： A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced.
摘要翻译：闪速存储器件具有电阻率测量图案及其形成方法。在自对准浮动门（SAFG）方案中的隔离膜中形成沟槽。埋入沟槽以形成电阻率测量浮栅。这允许甚至在SAFG方案中测量浮动栅极的电阻率。用于电阻率测量的触点直接连接到电阻率测量浮栅。因此，可以减少由寄生接口引起的电阻率测量值的变化。

40. 发明申请

US20100231311A1 System And Method For Implementing An Oscillator 有权
标题翻译：用于实现振荡器的系统和方法
公开(公告)号：US20100231311A1
公开(公告)日：2010-09-16
申请号：US12433336
申请日：2009-04-30
申请人： Sang Wook Park , Edgar Sanchez-Sinencio
发明人： Sang Wook Park , Edgar Sanchez-Sinencio
IPC分类号： H03B5/24
CPC分类号： H03B5/24
摘要： In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.
摘要翻译：在一个实施例中，用于产生振荡信号的系统包括跨导放大器，其包括单端输出和差分输入。该系统还仅包括耦合到跨导放大器的一个反馈环路。反馈回路包括配置成接收跨导放大器的输出的低通滤波器。此外，反馈回路包括高通滤波器，其被配置为接收第一低通滤波器的输出并将信号输出到跨导放大器的差分输入的仅一个端子。

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