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    • 35. 发明授权
    • Ferroelectric device with bismuth tantalate capping layer and method of making same
    • 具有钽酸铋盖层的铁电元件及其制造方法
    • US06437380B1
    • 2002-08-20
    • US09819542
    • 2001-03-28
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • H01L2976
    • H01L29/516H01L28/56
    • An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.
    • 集成电路器件包括厚度不超过100nm的含铋层状超晶格材料薄膜,钽酸铋覆盖层薄膜和电极。 覆盖层的厚度在3nm至30nm的范围内,并且沉积在层状超晶格材料的薄膜和电极之间以增加介电击穿电压。 优选地,封盖层相对于由平衡化学计量式BiTaO 4表示的化学计量平衡量含有过量的铋。 优选地,层状超晶格材料是铁电SBT或SBTN。 优选地,集成电路器件是非易失性铁电存储器。 用于制造包含钽酸铋覆盖层的集成电路器件的加热处理在不超过700℃的温度下进行,优选在650℃至700℃的范围内。
    • 40. 发明授权
    • Ferroelectric non-volatile memory unit
    • 铁电非易失性存储单元
    • US5523964A
    • 1996-06-04
    • US224241
    • 1994-04-07
    • Larry D. McMillanTakashi MiharaHiroyuki YoshimoriJohn W. GregoryCarlos A. Paz de Araujo
    • Larry D. McMillanTakashi MiharaHiroyuki YoshimoriJohn W. GregoryCarlos A. Paz de Araujo
    • G11C14/00G11C11/22H01L21/8242H01L21/8247H01L27/10H01L27/108H01L29/788H01L29/792
    • G11C11/22G11C11/223
    • An integrated circuit non-volatile, non-destructive read-out memory unit includes a ferroelectric capacitor having first and second electrodes, a capacitance Cf, and an area Af, and a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag and a gate capacitance Cg, a gate overlap b, and a channel depth a, with the capacitor first electrode connected to the gate of the transistor. The ferroelectric material has a dielectric constant .epsilon.f and the gate insulator has a dielectric constant .epsilon.g. A source of a constant reference voltage is connectable to the first electrode. A bit line connects to the second electrode. In one embodiment the first electrode and gate are the same conductive member. In another embodiment the second electrode and the gate are the same conductive member and the first electrode is formed by extensions of the transistor source and drains underlying the gate, with the ferroelectric material between the source and drain extensions and the gate. The memory unit has the parametric relationships: Cf
    • 集成电路非易失性非破坏性读出存储单元包括具有第一和第二电极的铁电电容器,电容Cf和区域Af,以及具有形成栅极电容器的栅极,源极和漏极的晶体管 具有面积Ag和栅极电容Cg,栅极重叠b和沟道深度a,其中电容器第一电极连接到晶体管的栅极。 铁电材料具有介电常数εf,栅极绝缘体具有介电常数εg。 恒定参考电压的源可连接到第一电极。 位线连接到第二电极。 在一个实施例中,第一电极和栅极是相同的导电构件。 在另一个实施例中,第二电极和栅极是相同的导电构件,并且第一电极由晶体管源的延伸和栅极下方的漏极形成,铁电材料在源极和漏极延伸部分之间以及栅极之间。 存储器单元具有参数关系:Cf <5xCg,Af / = 2a和epsilon g> / = epsilon f / 8。