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31. 发明授权

US08017459B2 Method of fabricating a thin film transistor array substrate 有权
标题翻译：制造薄膜晶体管阵列基板的方法
公开(公告)号：US08017459B2
公开(公告)日：2011-09-13
申请号：US12484116
申请日：2009-06-12
申请人： Dong-Ju Yang , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
发明人： Dong-Ju Yang , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Jung-Suk Bang
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.
摘要翻译：提出了制造薄膜晶体管阵列基板的方法。该方法需要在绝缘基板上形成栅极互连线，在栅极互连线上形成栅极绝缘层，在半导体层上形成半导体层和数据互连线，依次形成多个钝化层，将钝化层蚀刻到作为数据互连线的延伸线的漏电极。在该阶段暴露的漏电极的部分是漏极电极 - 像素电极接触部分的一部分。形成连接到漏电极的像素电极。两个钝化层具有相同的组成，但是在不同的温度下进行处理。还提出了以上述方式制备的薄膜晶体管。

32. 发明申请

US20100032760A1 THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20100032760A1
公开(公告)日：2010-02-11
申请号：US12508972
申请日：2009-07-24
申请人： Seung-Ha CHOI , Sang-Gab Kim , Shin-II Choi , Ki-Yeup Lee , Dong-Ju Yang , Hong-Kee Chin , Yu-Gwang Jeong
发明人： Seung-Ha CHOI , Sang-Gab Kim , Shin-II Choi , Ki-Yeup Lee , Dong-Ju Yang , Hong-Kee Chin , Yu-Gwang Jeong
IPC分类号： H01L29/786 , H01L21/20
CPC分类号： H01L29/458 , H01L27/124 , H01L27/1288
摘要： The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less.
摘要翻译：本发明提供了可以简单且成本低廉地制造的薄膜晶体管（TFT）基板，以及制造TFT基板的方法。 TFT基板包括：绝缘基板; 在第一方向上在绝缘基板上延伸的栅极布线; 数据布线，其在第二方向上在栅极布线上延伸，并且包括下层和上层; 以及配置在数据配线下方的半导体图形，并且具有与除了沟道区域以外的数据布线基本相同的形状，其中数据布线的顶面的均方根粗糙度为3nm以下。

33. 发明申请

US20090191655A1 METHOD OF ETCHING AMORPHOUS SILICON LAYER AND METHOD OF MANUFACTURING LIQUID CRYSTAL DISPLAY USING THE SAME 审中-公开
标题翻译：蚀刻非晶硅层的方法和使用其制造液晶显示的方法
公开(公告)号：US20090191655A1
公开(公告)日：2009-07-30
申请号：US12200430
申请日：2008-08-28
申请人： Shin-Il Choi , Sang-Gab Kim , Seung-Ha Choi , Gon-Ho Kim , Min-Seik Oh , Hong-Kee Chin , Yu-Gwang Jeong
发明人： Shin-Il Choi , Sang-Gab Kim , Seung-Ha Choi , Gon-Ho Kim , Min-Seik Oh , Hong-Kee Chin , Yu-Gwang Jeong
IPC分类号： H01L21/3065 , H01L33/00
CPC分类号： H01L21/32137 , H01J37/32825 , H01L27/1214 , H01L27/1259
摘要： A method of etching an amorphous silicon layer includes providing a substrate with an amorphous silicon layer formed thereon into an atmospheric pressure plasma etching device, providing a plasma generation gas and etching gas to a plasma generator of the atmospheric pressure plasma etching device and generating an atmospheric pressure plasma gas between two electrodes provided in the plasma generator in which the two electrodes face each other. The method further includes repeatedly passing the substrate through the plasma generator at a predetermined speed, thereby etching the amorphous silicon layer on the substrate by using the atmospheric pressure plasma gas generated from the plasma generator.
摘要翻译：蚀刻非晶硅层的方法包括：将形成有非晶硅层的基板提供到大气压等离子体蚀刻装置中，为大气压等离子体蚀刻装置的等离子体发生器提供等离子体产生气体和蚀刻气体，并产生大气在等离子体发生器中设置的两个电极之间的两个电极之间的压力等离子体气体，其中两个电极彼此面对。该方法还包括以预定速度重复地使衬底通过等离子体发生器，从而通过使用从等离子体发生器产生的大气压等离子体气体来蚀刻衬底上的非晶硅层。

34. 发明申请

US20080106685A1 Method of manufacturing liquid crystal display 有权
标题翻译：制造液晶显示器的方法
公开(公告)号：US20080106685A1
公开(公告)日：2008-05-08
申请号：US11897769
申请日：2007-08-31
申请人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Jae-Ho Choi , Yu-Gwang Jeong
发明人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Jae-Ho Choi , Yu-Gwang Jeong
IPC分类号： G02F1/133
CPC分类号： G02F1/1362 , G02F1/13458 , G02F1/136227 , G02F2001/136231 , G02F2001/136236 , G02F2001/136295 , H01L27/124 , H01L27/1288
摘要： A method for forming a liquid crystal display device includes several regions. After forming a gate line layer, a gate insulator, a semiconductor layer, a data layer and a photoresist layer, a mask is used to define a plurality of regions in the photoresist layer. Certain of the regions have different thickness of the photoresist layer after developing. While exposing the gate pad and data pad, etching process is applied over both the gate pad and data pad at the same time. Then, a passivation layer is deposited over the gate pad and the data pad which are exposed via contact hole. While forming the other contact hole in the coating layer, both the data pad and the gate pad can be exposed to etching process within the same time period.
摘要翻译：一种形成液晶显示装置的方法包括几个区域。在形成栅极线层，栅极绝缘体，半导体层，数据层和光致抗蚀剂层之后，使用掩模来限定光致抗蚀剂层中的多个区域。某些区域在显影后具有不同的光致抗蚀剂层的厚度。在暴露栅极焊盘和数据焊盘的同时，在栅极焊盘和数据焊盘上同时施加蚀刻工艺。然后，钝化层沉积在通过接触孔暴露的栅极焊盘和数据焊盘上。同时在涂层中形成另一个接触孔，数据焊盘和栅极焊盘都可以在同一时间段内暴露于蚀刻过程。

35. 发明授权

US07868958B2 Manufacturing liquid crystal display with incremental removal of an insulating layer 有权
标题翻译：制造液晶显示屏，增加去除绝缘层
公开(公告)号：US07868958B2
公开(公告)日：2011-01-11
申请号：US11897769
申请日：2007-08-31
申请人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Jae-Ho Choi , Yu-Gwang Jeong
发明人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Jae-Ho Choi , Yu-Gwang Jeong
IPC分类号： G02F1/136
CPC分类号： G02F1/1362 , G02F1/13458 , G02F1/136227 , G02F2001/136231 , G02F2001/136236 , G02F2001/136295 , H01L27/124 , H01L27/1288
摘要： A method for forming a liquid crystal display device includes incremental removal of a gate insulator. After forming a gate line layer, a gate insulator, a semiconductor layer, a data layer and a photoresist layer, a mask is used to define a plurality of regions in the photoresist layer through selective development. The developed portions of the photoresist layer are removed and parts of the underlying layers are etched in a plurality of steps using the photoresist layer as a mask. The gate insulator is partially removed during the etching of the data layer and completely removed during formation of source and drain electrodes.
摘要翻译：一种用于形成液晶显示装置的方法包括增加去除栅极绝缘体。在形成栅极线层，栅极绝缘体，半导体层，数据层和光致抗蚀剂层之后，使用掩模通过选择性显影在光致抗蚀剂层中限定多个区域。去除光致抗蚀剂层的显影部分，并使用光致抗蚀剂层作为掩模以多个步骤蚀刻部分下面的层。栅极绝缘体在蚀刻数据层期间被部分去除，并且在形成源极和漏极期间被完全去除。

36. 发明授权

US08298877B2 Array substrate and method for manufacturing the array substrate 有权
标题翻译：阵列基板和阵列基板的制造方法
公开(公告)号：US08298877B2
公开(公告)日：2012-10-30
申请号：US12777347
申请日：2010-05-11
申请人： Shin-Il Choi , Sang-Gab Kim , Yu-Gwang Jeong , Hong-Kee Chin
发明人： Shin-Il Choi , Sang-Gab Kim , Yu-Gwang Jeong , Hong-Kee Chin
IPC分类号： H01L21/44 , H01L21/84
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1288 , H01L29/42384 , H01L29/78696
摘要： An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed on the gate insulation layer in the first region, an end portion of the semiconductor pattern having a stepped portion with respect to the gate insulation layer; an ohmic contact pattern disposed on the semiconductor pattern, an end portion of the ohmic contact pattern opposite to a channel portion being aligned with the end portion of the semiconductor pattern; and source and drain electrodes disposed on the ohmic contact pattern, the source and drain electrodes spaced apart from each other and including first and second thin-film transistor patterns.
摘要翻译：一种阵列基板，包括：栅极电极和栅极绝缘层，其设置在基底基板上，所述栅极绝缘层在第一区域具有第一厚度，在第二区域具有第二厚度，所述第一厚度大于所述第二厚度; 所述半导体图案设置在所述第一区域中的所述栅极绝缘层上，所述半导体图案的端部相对于所述栅极绝缘层具有阶梯部分; 设置在所述半导体图案上的欧姆接触图案，所述欧姆接触图案的与沟道部分相对的端部与所述半导体图案的端部对准; 以及设置在欧姆接触图案上的源极和漏极，源极和漏极彼此间隔开并且包括第一和第二薄膜晶体管图案。

37. 发明授权

US09229283B2 Display substrate including organic layer and method of manufacturing the same 有权
标题翻译：显示基板包括有机层及其制造方法
公开(公告)号：US09229283B2
公开(公告)日：2016-01-05
申请号：US13488733
申请日：2012-06-05
申请人： Yun-Jong Yeo , Yu-Gwang Jeong , Hong-Kee Chin , Sang-Gab Kim , Jeong-Min Park , Ji-Young Park
发明人： Yun-Jong Yeo , Yu-Gwang Jeong , Hong-Kee Chin , Sang-Gab Kim , Jeong-Min Park , Ji-Young Park
IPC分类号： H01L27/00 , G02F1/1343 , H01L27/12
CPC分类号： G02F1/134363 , H01L27/124 , H01L27/1244 , H01L27/1248 , H01L27/1288
摘要： A display substrate includes a base substrate, a switching element, a protecting layer, an organic layer, a first pixel electrode and a second pixel electrode. The switching element is on the base substrate, and includes a gate electrode, a source electrode and a drain electrode. The protecting layer is on the switching element, and includes a first hole exposing the drain electrode. The organic layer is on the protecting layer, and includes a second hole which exposes a side surface of the protecting layer which defines the first hole and exposes a top surface of the protecting layer which is adjacent to the side surface of the protecting layer. The first pixel electrode is on the organic layer. The second pixel electrode overlaps the first pixel electrode, and is electrically connected to the drain electrode via the first and second holes.
摘要翻译：显示基板包括基底基板，开关元件，保护层，有机层，第一像素电极和第二像素电极。开关元件在基底基板上，并且包括栅电极，源电极和漏电极。保护层位于开关元件上，并且包括暴露漏电极的第一孔。有机层位于保护层上，并且包括第二孔，其露出限定第一孔的保护层的侧表面，并露出与保护层的侧表面相邻的保护层的顶表面。第一像素电极在有机层上。第二像素电极与第一像素电极重叠，并且经由第一和第二孔电连接到漏电极。

38. 发明申请

US20090184319A1 DISPLAY SUBSTRATE AND A METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 审中-公开
标题翻译：显示基板和制造显示基板的方法
公开(公告)号：US20090184319A1
公开(公告)日：2009-07-23
申请号：US12328487
申请日：2008-12-04
申请人： Sang-Gab Kim , Min-Seok Oh , Yu-Gwang Jeong , Hong-Sick Park , Shi-Yul Kim , Jang-Soo Kim , Shin-Il Choi
发明人： Sang-Gab Kim , Min-Seok Oh , Yu-Gwang Jeong , Hong-Sick Park , Shi-Yul Kim , Jang-Soo Kim , Shin-Il Choi
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： G02F1/136286 , G02F2001/136295 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A method of manufacturing a display substrate is described. In the method, a gate line and a gate electrode are formed on a base substrate. A source metal layer is formed on the base substrate having the gate line and the gate electrode. A data line, a source electrode and a drain electrode are formed by etching the source metal layer by using an etching gas. An additive gas is provided to the base substrate having the drain electrode so that the additive gas reacts with an etching component of the etching gas to remove a by-product formed at an exposed portion of the data line, the source electrode and drain electrode. Thus, corrosion of the fine pattern due to an etching gas may be prevented and/or reduced.
摘要翻译：对制造显示基板的方法进行说明。在该方法中，在基底基板上形成栅极线和栅电极。在具有栅极线和栅电极的基底基板上形成源极金属层。通过使用蚀刻气体蚀刻源极金属层来形成数据线，源电极和漏电极。向具有漏电极的基底基板提供添加气体，使得添加气体与蚀刻气体的蚀刻部件反应，以除去在数据线，源电极和漏电极的暴露部分形成的副产物。因此，可以防止和/或减少由蚀刻气体引起的精细图案的腐蚀。

39. 发明授权

US08608971B2 Method of manufacturing a display substrate 失效
标题翻译：制造显示基板的方法
公开(公告)号：US08608971B2
公开(公告)日：2013-12-17
申请号：US12862580
申请日：2010-08-24
申请人： Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
发明人： Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
IPC分类号： B29D11/00 , C30B33/00
CPC分类号： H01L27/1288 , G02F1/136204 , H01L27/1244
摘要： A method of manufacturing a display substrate includes forming a first metallic pattern including gate and storage conductors and a gate electrode of a switching device on a base substrate, forming a gate insulation layer, forming a second metallic pattern and a channel portion including a source line, source and drain electrodes of the switching device, forming a passivation layer and a photoresist film on the second metallic pattern, patterning the photoresist film to form a first pattern portion corresponding to the gate and source conductors and the switching device, and a second pattern portion formed on the storage line, etching the passivation layer and the gate insulation layer, and forming a pixel electrode using the first pattern portion. Therefore, excessive etching of the stepped portion may be prevented, so that a short-circuit defect between a metallic pattern and a pixel electrode may be prevented
摘要翻译：一种制造显示基板的方法包括在基底基板上形成包括栅极和存储导体的第一金属图案和开关器件的栅电极，形成栅极绝缘层，形成第二金属图案和包括源极线的沟道部分开关器件的源极和漏极，在第二金属图案上形成钝化层和光致抗蚀剂膜，图案化光致抗蚀剂膜以形成对应于栅极和源极导体和开关器件的第一图案部分，以及第二图案形成在存储线上的部分，蚀刻钝化层和栅极绝缘层，以及使用第一图案部分形成像素电极。因此，可以防止阶梯部分的过度蚀刻，从而可以防止金属图案和像素电极之间的短路缺陷

40. 发明授权

US07405425B2 Thin film transistor, method of manufacturing the same, display apparatus having the same and method of manufacturing the display apparatus 有权
标题翻译：薄膜晶体管，其制造方法，具有该薄膜晶体管的显示装置和制造该显示装置的方法
公开(公告)号：US07405425B2
公开(公告)日：2008-07-29
申请号：US11232306
申请日：2005-09-20
申请人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
发明人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
IPC分类号： H01L29/04
CPC分类号： H01L29/66765 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L29/458
摘要： A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.
摘要翻译：薄膜晶体管包括衬底上的栅电极，衬底上的栅极绝缘层，沟道图案，源电极和漏电极。沟道图案包括形成在栅电极上并覆盖栅电极的半导体图案以及形成在半导体图案上并彼此间隔开的第一和第二导电粘合剂图案。源电极包括顺序地形成在第一导电粘合剂图案上的第一阻挡图案，源图案和第一封盖图案。漏电极包括顺序地形成在第二导电粘合剂图案上的第二阻挡图案，漏极图案和第二封盖图案。第一和第二导电粘合剂图案的蚀刻部分具有基本垂直的轮廓，以防止源极和漏极的暴露，从而改善薄膜晶体管的特性。

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