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31. 发明授权

US5851367A Differential copper deposition on integrated circuit surfaces and method for same 失效
标题翻译：集成电路表面上的差分铜沉积及其相同的方法
公开(公告)号：US5851367A
公开(公告)日：1998-12-22
申请号：US731258
申请日：1996-10-11
申请人： Tue Nguyen , Lawrence J. Charneski , Sheng Teng Hsu
发明人： Tue Nguyen , Lawrence J. Charneski , Sheng Teng Hsu
IPC分类号： C23C16/02 , C23C16/04 , H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/532 , H01L21/302
CPC分类号： C23C16/04 , C23C16/0245 , H01L21/28562 , H01L21/76801 , H01L21/76825 , H01L21/76838 , H01L23/53238 , H01L21/28568 , H01L2924/0002 , H01L2924/3011 , Y10S438/906 , Y10S438/974
摘要： A method for selectively applying CVD copper to metallic surfaces, that are co-located with non-metallic surfaces, is provided. The method prepares both the metal and non-metallic surfaces with a low energy ion etch of an inert gas through the use of an ion gun. The etching promotes the growth of copper on the metallic surface, and inhibits the growth on the non-metallic surface. Following an application of CVD copper, the surfaces are etched again to clean any residual copper from the non-metallic surface, and to again prepare the surfaces for another deposition of copper. Through repeated cycles of etching and copper deposition, the copper overlying the metallic surface is accumulated to achieve the desired thickness, while the non-metallic surface remains free of copper. A method is also provided for the selective deposition of copper on metallic surfaces to fill interconnects in damascene IC structures. An IC with a copper layer overlying a metallic surface, co-located with a non-metallic surface, where the copper layer is grown through repeated cycles of ion etching and copper deposition, is also provided.
摘要翻译：提供了一种用于将CVD铜选择性地应用于与非金属表面共位的金属表面的方法。该方法通过使用离子枪以惰性气体的低能量离子蚀刻来准备金属和非金属表面。蚀刻促进金属表面上的铜的生长，并且抑制非金属表面上的生长。在应用CVD铜之后，再次蚀刻表面以从非金属表面清除任何残留的铜，并再次准备用于另外沉积铜的表面。通过重复的蚀刻和铜沉积循环，覆盖金属表面的铜被积聚以达到所需的厚度，同时非金属表面保持不含铜。还提供了一种用于在金属表面上选择性沉积铜以填充镶嵌IC结构中的互连的方法。还提供了具有覆盖金属表面的铜层的IC，其与非金属表面共同定位，其中铜层通过重复的离子蚀刻和铜沉积循环而生长。

32. 发明授权

US5744192A Method of using water vapor to increase the conductivity of cooper desposited with cu(hfac)TMVS 失效
标题翻译：使用水蒸气增加铜（hfac）TMVS沉积铜的电导率的方法
公开(公告)号：US5744192A
公开(公告)日：1998-04-28
申请号：US745562
申请日：1996-11-08
申请人： Tue Nguyen , Yoshihide Senzaki , Masato Kobayashi , Lawrence J. Charneski , Sheng Teng Hsu
发明人： Tue Nguyen , Yoshihide Senzaki , Masato Kobayashi , Lawrence J. Charneski , Sheng Teng Hsu
IPC分类号： C01G3/00 , C23C16/18 , C23C16/448 , C23C16/52 , H01L21/28 , H01L21/285 , H01L21/60 , B05D5/12 , C23C16/04
CPC分类号： C23C16/4481 , C23C16/18 , H01L2924/0002
摘要： A method of blending water vapor with volatile Cu(hfac)TMVS (copper hexafluoroacetylacetonate trimethylvinylsilane) is provided which improves the deposition rate of Cu, without degrading the resistivity of the Cu deposited upon an integrated circuit surface. The method of the present invention uses a relatively small amount of water vapor, approximately 0.3 to 3% of the total pressure of the system in which chemical vapor deposition (CVD) Cu is applied. The method specifies the flow rates of the liquid precursor, carrier gas, and liquid water. The method also specifies the pressures of the vaporized precursor, vaporized precursor blend including carrier gas and water vapor. In addition, the temperatures of the vaporizers, chamber walls, and IC surfaces are disclosed. A Cu precursor blend is also provided comprising vaporized Cu(hfac)TMVS and water vapor. The ratio of water vapor pressure to vaporized precursor is approximately 0.5 to 5%. Further, an IC surface covered with Cu applied with a Cu precursor blend including vaporized Cu(hfac)TMVS and water vapor, with the above mentioned ratio of water vapor pressure to volatile Cu(hfac)TMVS pressure, is provided.
摘要翻译：提供了将水蒸汽与挥发性Cu（hfac）TMVS（六氟乙酰丙酮酸铜三甲基乙烯基硅烷）共混的方法，其改善了Cu的沉积速率，而不降低沉积在集成电路表面上的Cu的电阻率。本发明的方法使用相对少量的水蒸气，其中施加化学气相沉积（CVD）Cu的系统的总压力的大约0.3至3％。该方法规定了液体前体，载气和液态水的流量。该方法还规定了蒸发的前体，蒸发的前体共混物包括载气和水蒸气的压力。此外，公开了蒸发器，室壁和IC表面的温度。还提供了包含蒸发的Cu（hfac）TMVS和水蒸气的Cu前体共混物。水蒸气压与汽化前体的比率约为0.5〜5％。此外，提供了用Cu涂覆Cu包含蒸发的Cu（hfac）TMVS和水蒸气的Cu前体共混物的IC表面，具有上述的水蒸气压与挥发性Cu（hfac）TMVS压力的比率。

33. 发明申请

US20090024182A1 IrOx Nanostructure Electrode Neural Interface Optical Device 有权
标题翻译： IrOx纳米结构电极神经界面光学器件
公开(公告)号：US20090024182A1
公开(公告)日：2009-01-22
申请号：US12240501
申请日：2008-09-29
申请人： Fengyan Zhang , Sheng Teng Hsu
发明人： Fengyan Zhang , Sheng Teng Hsu
IPC分类号： A61N1/36
CPC分类号： C30B25/00 , A61N1/0543 , B82Y5/00 , B82Y10/00 , B82Y30/00 , C30B29/16 , C30B29/605 , Y10S977/811 , Y10S977/904 , Y10S977/932
摘要： An optical device with an iridium oxide (IrOx) electrode neural interface, and a corresponding fabrication method are provided. The method provides a substrate and forms a first conductive electrode overlying the substrate. A photovoltaic device having a first electrical interface is connected to the first electrode. A second electrical interface of the photovoltaic device is connected to a second conductive electrode formed overlying the photovoltaic device. An array of neural interface single-crystal IrOx nanostructures are formed overlying the second electrode, where x≦4. The IrOx nanostructures can be partially coated with an electrical insulator, such as SiO2, SiN, TiO2, or spin on glass (SOG), leaving the IrOx distal ends exposed. In one aspect, a buffer layer is formed overlying the second electrode surface, made from a material such as LiNbO3, LiTaO3, or SA, for the purpose of orienting the growth direction of the IrOx nanostructures.
摘要翻译：提供了具有氧化铱（IrOx）电极神经接口的光学器件及相应的制造方法。该方法提供了一个衬底并且形成了覆盖衬底的第一导电电极。具有第一电接口的光电器件连接到第一电极。光电器件的第二电接口连接到形成在光伏器件上的第二导电电极。形成了覆盖第二电极的神经界面单晶IrOx纳米结构阵列，其中x <= 4。 IrOx纳米结构可以部分地涂覆有电绝缘体，例如SiO 2，SiN，TiO 2或旋转玻璃（SOG），留下IrOx远端暴露。在一个方面，为了定向IrOx纳米结构的生长方向，形成了由诸如LiNbO 3，LiTaO 3或SA的材料制成的第二电极表面上的缓冲层。

34. 发明授权

US07446014B2 Nanoelectrochemical cell 失效
公开(公告)号：US07446014B2
公开(公告)日：2008-11-04
申请号：US11580623
申请日：2006-10-12
申请人： Fengyan Zhang , David R. Evans , Sheng Teng Hsu
发明人： Fengyan Zhang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21/20
CPC分类号： H01G9/07 , Y10S977/762 , Y10T29/417
摘要： A method is provided for forming a NanoElectroChemical (NEC) cell. The method provides a bottom electrode with a top surface. Nanowire shells are formed. Each nanowire shell has a nanowire and a sleeve, with the nanowire connected to the bottom electrode top surface. A top electrode is formed overlying the nanowire shells. A main cavity is formed between the top electrode and bottom electrodes, partially displaced by a first plurality of nanowire shells. Electrolyte cavities are formed between the sleeves and nanowires by etching the first sacrificial layer. In one aspect, electrolyte cavities are formed between the bottom electrode top surface and a shell coating layer joining the sleeve bottom openings. Then, the main and electrolyte cavities are filled with either a liquid or gas phase electrolyte. In a different aspect, the first sacrificial layer is a solid phase electrolyte that is not etched away.

35. 发明授权

US07255745B2 Iridium oxide nanowires and method for forming same 失效
标题翻译：氧化铱纳米线及其形成方法
公开(公告)号：US07255745B2
公开(公告)日：2007-08-14
申请号：US10971330
申请日：2004-10-21
申请人： Fengyan Zhang , Robert A. Barrowcliff , Sheng Teng Hsu
发明人： Fengyan Zhang , Robert A. Barrowcliff , Sheng Teng Hsu
IPC分类号： C30B29/62
CPC分类号： H01L24/48 , C30B25/005 , C30B29/16 , C30B29/62 , H01L24/45 , H01L24/49 , H01L2224/05644 , H01L2224/05655 , H01L2224/05669 , H01L2224/43827 , H01L2224/45015 , H01L2224/45144 , H01L2224/45155 , H01L2224/45157 , H01L2224/45166 , H01L2224/45169 , H01L2224/45178 , H01L2224/45181 , H01L2224/45565 , H01L2224/45599 , H01L2224/45688 , H01L2224/48011 , H01L2224/48091 , H01L2224/4813 , H01L2224/48463 , H01L2224/4847 , H01L2224/48599 , H01L2224/49111 , H01L2224/49175 , H01L2924/00011 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01032 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/10271 , H01L2924/1033 , H01L2924/10335 , H01L2924/14 , H01L2924/20751 , Y10S977/762 , Y10S977/763 , Y10S977/811 , H01L2924/00014 , H01L2924/20651 , H01L2924/00 , H01L2924/01006
摘要： Iridium oxide (IrOx) nanowires and a method forming the nanowires are provided. The method comprises: providing a growth promotion film with non-continuous surfaces, having a thickness in the range of 0.5 to 5 nanometers (nm), and made from a material such as Ti, Co, Ni, Au, Ta, polycrystalline silicon (poly-Si), SiGe, Pt, Ir, TiN, or TaN; establishing a substrate temperature in the range of 200 to 600 degrees C.; introducing oxygen as a precursor reaction gas; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx nanowires from the growth promotion film surfaces. The IrOx nanowires have a diameter in the range of 100 to 1000 Å, a length in the range of 1000 Å to 2 microns, an aspect ratio (length to width) of greater than 50:1. Further, the nanowires include single-crystal nanowire cores covered with an amorphous layer having a thickness of less than 10 Å.
摘要翻译：提供氧化铱（IrOx）纳米线和形成纳米线的方法。该方法包括：提供具有0.5至5纳米（nm）范围内的厚度的非连续表面的生长促进膜，并由诸如Ti，Co，Ni，Au，Ta，多晶硅多晶硅），SiGe，Pt，Ir，TiN或TaN; 建立200〜600℃的基板温度。引入氧气作为前体反应气体; 引入（甲基环戊二烯基）（1,5-环辛二烯）铱（I）前体; 使用金属有机化学气相沉积（MOCVD）工艺，从生长促进膜表面生长IrOx纳米线。 IrOx纳米线的直径在100至1000埃的范围内，长度在1000埃至2微米之间，纵横比（长宽比）大于50:1。此外，纳米线包括覆盖有厚度小于Å的非晶层的单晶纳米线芯。

36. 发明授权

US07053403B1 Iridium oxide nanostructure 有权
标题翻译：氧化铱纳米结构
公开(公告)号：US07053403B1
公开(公告)日：2006-05-30
申请号：US11339876
申请日：2006-01-26
申请人： Fengyan Zhang , Gregory M. Stecker , Robert A. Barrowcliff , Sheng Teng Hsu
发明人： Fengyan Zhang , Gregory M. Stecker , Robert A. Barrowcliff , Sheng Teng Hsu
IPC分类号： H01L29/10 , H01L29/12
CPC分类号： H01L21/31111 , B81C1/00111 , B82Y10/00
摘要： A method is provided for patterning iridium oxide (IrOx) nanostructures. The method comprises: forming a substrate first region adjacent a second region; growing IrOx nanostructures from a continuous IrOx film overlying the first region; simultaneously growing IrOx nanostructures from a non-continuous IrOx film overlying the second region; selectively etching areas of the second region exposed by the non-continuous IrOx film; and, lifting off the IrOx nanostructures overlying the second region. Typically, the first region is formed from a first material and the second region from a second material, different than the first material. For example, the first material can be a refractory metal, or refractory metal oxide. The second material can be SiOx. The step of selectively etching areas of the second region exposed by the non-continuous IrOx film includes exposing the substrate to an etchant that is more reactive with the second material than the IrOx.
摘要翻译：提供了用于构图氧化铱（IrOx）纳米结构的方法。该方法包括：在第二区域附近形成衬底第一区域; 从覆盖第一区域的连续IrOx膜生长IrOx纳米结构; 同时从覆盖第二区域的非连续IrOx膜生长IrOx纳米结构; 选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域; 并提升覆盖第二区域的IrOx纳米结构。通常，第一区域由第一材料形成，第二区域由不同于第一材料的第二材料形成。例如，第一种材料可以是难熔金属或难熔金属氧化物。第二种材料可以是SiOx。选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域的步骤包括将衬底暴露于与IrOx比第二材料更具反应性的蚀刻剂。

37. 发明授权

US07022621B1 Iridium oxide nanostructure patterning 有权
标题翻译：氧化铱纳米结构图案
公开(公告)号：US07022621B1
公开(公告)日：2006-04-04
申请号：US11013804
申请日：2004-12-15
申请人： Fengyan Zhang , Gregory M. Stecker , Robert A. Barrowcliff , Sheng Teng Hsu
发明人： Fengyan Zhang , Gregory M. Stecker , Robert A. Barrowcliff , Sheng Teng Hsu
IPC分类号： H01L21/461
CPC分类号： H01L21/31111 , B81C1/00111 , B82Y10/00
摘要： A method is provided for patterning iridium oxide (IrOx) nanostructures. The method comprises: forming a substrate first region adjacent a second region; growing IrOx nanostructures from a continuous IrOx film overlying the first region; simultaneously growing IrOx nanostructures from a non-continuous IrOx film overlying the second region; selectively etching areas of the second region exposed by the non-continuous IrOx film; and, lifting off the IrOx nanostructures overlying the second region. Typically, the first region is formed from a first material and the second region from a second material, different than the first material. For example, the first material can be a refractory metal, or refractory metal oxide. The second material can be SiOx. The step of selectively etching areas of the second region exposed by the non-continuous IrOx film includes exposing the substrate to an etchant that is more reactive with the second material than the IrOx.
摘要翻译：提供了用于构图氧化铱（IrOx）纳米结构的方法。该方法包括：在第二区域附近形成衬底第一区域; 从覆盖第一区域的连续IrOx膜生长IrOx纳米结构; 同时从覆盖第二区域的非连续IrOx膜生长IrOx纳米结构; 选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域; 并提升覆盖第二区域的IrOx纳米结构。通常，第一区域由第一材料形成，第二区域由不同于第一材料的第二材料形成。例如，第一种材料可以是难熔金属或难熔金属氧化物。第二种材料可以是SiOx。选择性地蚀刻由非连续IrOx膜暴露的第二区域的区域的步骤包括将衬底暴露于与IrOx比第二材料更具反应性的蚀刻剂。

38. 发明授权

US06897074B1 Method for making single-phase c-axis doped PGO ferroelectric thin films 失效
标题翻译：制备单相c轴掺杂PGO铁电薄膜的方法
公开(公告)号：US06897074B1
公开(公告)日：2005-05-24
申请号：US10794736
申请日：2004-03-03
申请人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Teng Hsu
发明人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Teng Hsu
IPC分类号： H01L21/00 , H01L21/02 , H01L21/316 , H01L41/22
CPC分类号： H01L21/31691 , H01L28/55 , H01L41/317
摘要： A method for forming a doped PGO ferroelectric thin film, and related doped PGO thin film structures are described. The method comprising: forming either an electrically conductive or electrically insulating substrate; forming a doped PGO film overlying the substrate; annealing; crystallizing; and, forming a single-phase c-axis doped PGO thin film overlying the substrate, having a Curie temperature of greater than 200 degrees C. Forming a doped PGO film overlying the substrate includes depositing a doped precursor in the range between 0.1N and 0.5N, with a molecular formula of Pby-xMxGe3O11, where: M is a doping element; y=4.5 to 6; and, x=0.1 to 1. The element M can be Sn, Ba, Sr, Cd, Ca, Pr, Ho, La, Sb, Zr, or Sm.
摘要翻译：描述了用于形成掺杂的PGO铁电薄膜的方法以及相关的掺杂PGO薄膜结构。该方法包括：形成导电或电绝缘的衬底; 在衬底上形成掺杂的PGO膜; 退火; 结晶并且形成覆盖在衬底上的单相c轴掺杂的PGO薄膜，其居里温度大于200℃。形成覆盖在衬底上的掺杂PGO膜包括沉积在0.1N和0.5之间的掺杂前体 N，具有分子式为Pb x Si x N x N x O 11，其中：M是掺杂物元件; y = 4.5〜6; x = 0.1〜1。元素M可以是Sn，Ba，Sr，Cd，Ca，Pr，Ho，La，Sb，Zr或Sm。

39. 发明授权

US06833572B2 Electrode materials with improved hydrogen degradation resistance 失效
标题翻译：具有改善耐氢降解性的电极材料
公开(公告)号：US06833572B2
公开(公告)日：2004-12-21
申请号：US10229603
申请日：2002-08-27
申请人： Fengyan Zhang , Tingkai Li , Hong Ying , Yoshi Ono , Sheng Teng Hsu
发明人： Fengyan Zhang , Tingkai Li , Hong Ying , Yoshi Ono , Sheng Teng Hsu
IPC分类号： H01L2976
CPC分类号： H01L28/75 , H01L21/31604 , H01L21/31683 , H01L28/55
摘要： An electrode for use in a ferroelectric device includes a bottom electrode; a ferroelectric layer; and a top electrode formed on the ferroelectric layer and formed of a combination of metals, including a first metal take from the group of metals consisting of platinum and iridium, and a second metal taken from the group of metals consisting of aluminum and titanium; wherein the top electrode acts as a passivation layer and wherein the top electrode remains conductive following high temperature annealing in a hydrogen atmosphere. A method of forming a hydrogen-resistant electrode in a ferroelectric device includes forming a bottom electrode; forming a ferroelectric layer on the bottom electrode; depositing a top electrode on the ferroelectric layer; including depositing, simultaneously, a first metal taken from the group of metals consisting of platinum and iridium; and a second metal taken from the group of metals consisting of aluminum and titanium; and forming a passivation layer by annealing the structure in an oxygen atmosphere to form an oxide passivation layer on the top electrode.
摘要翻译：用于铁电体器件的电极包括底部电极; 铁电层以及形成在强电介质层上并由金属组合形成的顶部电极，其包括从由铂和铱组成的金属组中的第一金属取得的金属和从由铝和钛组成的金属组中的第二金属; 其中所述顶部电极用作钝化层，并且其中所述顶部电极在氢气氛中的高温退火之后保持导电。在铁电体器件中形成耐氢电极的方法包括形成底电极; 在底部电极上形成铁电层; 在铁电层上沉积顶部电极; 包括同时从由铂和铱组成的金属组中取出的第一金属; 和从由铝和钛组成的金属组中获取的第二金属; 以及通过在氧气氛中对所述结构退火以在所述顶部电极上形成氧化物钝化层来形成钝化层。

40. 发明授权

US06537361B2 Method of the synthesis and control of PGO spin-coating precursor solutions 失效
公开(公告)号：US06537361B2
公开(公告)日：2003-03-25
申请号：US09822637
申请日：2001-03-30
申请人： Wei-Wei Zhuang , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
发明人： Wei-Wei Zhuang , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L2122
CPC分类号： H01L21/02197 , C01G21/00 , C01P2002/86 , H01L21/02112 , H01L21/02175 , H01L21/02282 , H01L21/31604 , H01L21/31691
摘要： A method of synthesizing a PGO spin-coating precursor solution includes utilizing the starting materials of lead acetate trihydrate (Pb(OAc)2•3H2O) and germanium alkoxide (Ge(OR)4(R=C2H5 and CH(CH3)2)). The organic solvent is di(ethylene glycol) ethyl ether. The mixed solution of lead and di(ethylene glycol) ethyl ether is heated in an atmosphere of air at a temperature no greater than 185° C., and preferably no greater than 190° C. for a time period in a range of thirty minutes to four hours. During the heating step the color of the solution is monitored to determine when the reaction is complete and when decomposition of the desired product begins to take place. The solution is then added to germanium di(ethylene glycol) ethyl ether to make the PGO spin-coating solution. This second step also entails heating the solution to a temperature no greater than 190° C. for a time period in a range of 0.5 to 2.0 hours. The process results in a PGO precursor solution suitable for use in spin-coating.

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