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    • 32. 发明授权
    • Method for improvement of gap filling capability of electrochemical deposition of copper
    • 改进铜电化学沉积间隙填充能力的方法
    • US06224737B1
    • 2001-05-01
    • US09377540
    • 1999-08-19
    • Ming-Hsing TsaiWen-Jye TsaiShau-Lin ShueChen-Hua Yu
    • Ming-Hsing TsaiWen-Jye TsaiShau-Lin ShueChen-Hua Yu
    • C25D502
    • H01L21/76877C25D3/38C25D5/48C25D7/123H01L21/2885H01L23/53238H01L2924/0002H01L2924/00
    • A semiconductor structure having a trench formed therein is provided. The semiconductor structure may be a substrate with an overlying interlevel metal dielectric layer having the trench. A voltage is applied to the trenched semiconductor inducing a bias field where there is a first field proximate the trench bottom and a second field, greater than the first field, proximate the trench's upper side walls and the semiconductor upper surface proximate the trench. The semiconductor structure is placed into an electroplating solution containing a predetermined concentration of brighteners and levelers. Because of the induced bias field, the brightener concentration is greater proximate the trench bottom and the leveler concentration is greater the trench's upper side walls and the semiconductor upper surface proximate the trench. A copper layer having a predetermined thickness is then electrolytically deposited within the trench in a “bottom-up” fashion and blanket fills the upper surface of the semiconductor structure. The structure may then be planarized by CMP to create a planarized copper filled trench.
    • 提供具有形成在其中的沟槽的半导体结构。 半导体结构可以是具有具有沟槽的上覆层间金属介电层的衬底。 电压被施加到沟槽半导体,其诱导偏置场,其中存在靠近沟槽底部的第一场和大于第一场,接近沟槽的上侧壁和靠近沟槽的半导体上表面的第二场。 将半导体结构放入含有预定浓度的增白剂和矫直剂的电镀溶液中。 由于感应偏压场,光滑剂浓度在沟槽底部附近较大,并且矫直剂浓度大于沟槽的上侧壁和接近沟槽的半导体上表面。 然后将具有预定厚度的铜层以“自下而上”的方式电解沉积在沟槽内,并且覆盖填充半导体结构的上表面。 然后可以通过CMP平面化该结构以产生平坦化的铜填充沟槽。
    • 36. 发明授权
    • Method for forming dual damascene structures with tapered via portions and improved performance
    • 用于形成具有锥形通孔部分的双镶嵌结构和改进的性能的方法
    • US07354856B2
    • 2008-04-08
    • US11071104
    • 2005-03-04
    • Ming-Shih YehMing-Hsing TsaiShau-Lin ShueChen-Hua Yu
    • Ming-Shih YehMing-Hsing TsaiShau-Lin ShueChen-Hua Yu
    • H01L21/44
    • H01L21/76804H01L21/31144H01L21/314H01L21/76808Y10S438/978
    • The manufacture of damascene structures having improved performance, particularly, but not by way of limitation, dual damascene structures is provided. In one embodiment, a substrate having a conductive layer is formed in a first insulating layer. A protective layer is formed above the conductive layer. An etching stop layer is formed above the protective layer and the first insulating layer. A second insulating layer is formed above the etching stop layer. A first patterned photoresist layer is formed above the second insulating layer, the first patterned photoresist layer having a first pattern. The first pattern is etched into the second insulating layer and the etching stop layer to form a first opening. A via plug is filled at least partially in the first opening. An anti-reflective coating (ARC) layer is formed above the second insulating layer. A second patterned photoresist layer is formed above the ARC layer, the second photoresist layer having a second pattern. The second pattern is etched into portions of the via plug, second insulation layer, and the ARC layer to form a second opening, wherein a substantially tapered sidewall portion is formed at the interface of the first and second openings.
    • 提供了具有改进的性能,特别但非限制性的双镶嵌结构的镶嵌结构的制造。 在一个实施例中,具有导电层的衬底形成在第一绝缘层中。 在导电层上形成保护层。 在保护层和第一绝缘层上方形成蚀刻停止层。 在蚀刻停止层上形成第二绝缘层。 第一图案化光致抗蚀剂层形成在第二绝缘层之上,第一图案化光致抗蚀剂层具有第一图案。 将第一图案蚀刻到第二绝缘层和蚀刻停止层中以形成第一开口。 通孔塞至少部分地填充在第一开口中。 在第二绝缘层上方形成抗反射涂层(ARC)层。 第二图案化光致抗蚀剂层形成在ARC层上方,第二光致抗蚀剂层具有第二图案。 第二图案被蚀刻到通孔塞,第二绝缘层和ARC层的部分中以形成第二开口,其中在第一和第二开口的界面处形成大致锥形的侧壁部分。
    • 40. 发明授权
    • Method of fabricating barrier adhesion to low-k dielectric layers in a copper damascene process
    • 在铜镶嵌工艺中制造对低k电介质层的屏障粘附的方法
    • US06342448B1
    • 2002-01-29
    • US09583401
    • 2000-05-31
    • Jing-Cheng LinShau-Lin ShueChen-Hua Yu
    • Jing-Cheng LinShau-Lin ShueChen-Hua Yu
    • H01L2144
    • H01L21/76846H01L21/28568H01L21/76807H01L21/76873
    • A method for forming an improved TaN copper barrier for a copper damascene process is described which has improved adhesion to low-k dielectric layers and also improves the wetting of a copper seed layer deposited over it thereby improving the structure of the copper seed layer which is critical to achieving uniform, high quality electrochemical copper deposition. The copper barrier is a composite structure having an lower thin Ta rich TaN portion which mixes into and reacts with the surface of the low-k dielectric layer, forming a strongly bonded transition layer between the low-k material and the remaining portion of the barrier layer. The presence of the transition layer causes compressive film stress rather than tensile stress as found in the conventional TaN barrier. As a result, the barrier layer does not delaminate from the low-k layer during subsequent processing. A second thick central portion of the barrier layer is formed of stoichiometric TaN which benefits subsequent CMP of the copper damascene structure. An upper thin Ta portion improves barrier wetting to the copper seed layer. The three sections of the laminar barrier are sequentially deposited in a single pumpdown operation by IMP sputtering from a Ta target.
    • 描述了一种用于形成用于铜镶嵌工艺的改进的TaN铜阻挡层的方法,其具有改善的对低k电介质层的粘附性,并且还改善了沉积在其上的铜籽晶层的润湿,从而改善了铜籽晶层的结构, 对于实现均匀,高质量的电化学铜沉积至关重要。 铜屏障是具有较低的Ta Ta薄部分的复合结构,其混合并与低k电介质层的表面反应,在低k材料与阻挡层的剩余部分之间形成牢固结合的过渡层 层。 过渡层的存在导致压缩膜应力而不是常规TaN阻挡层中的拉伸应力。 结果,在随后的处理期间,阻挡层不会从低k层分层。 阻挡层的第二厚中心部分由化学计量的TaN形成,这有利于铜镶嵌结构的后续CMP。 上部薄的Ta部分改善了对铜种子层的屏障润湿。 层状阻挡层的三个部分通过来自Ta靶的IMP溅射在单次抽运操作中依次沉积。