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    • 31. 发明授权
    • Portable data storage device and method of accessing data thereof
    • 便携式数据存储装置及其访问方法
    • US07401195B2
    • 2008-07-15
    • US10966801
    • 2004-10-18
    • Chi-Tung ChangShih-Hsieng YangHung-Chou TsaiChing-Wen Wang
    • Chi-Tung ChangShih-Hsieng YangHung-Chou TsaiChing-Wen Wang
    • G06F12/14
    • G06F12/1458G06F21/6227G06F2221/2141
    • A portable data storage device includes a control unit coupled via a predetermined interface with a computer having an operating system with user authority limits, and a memory divided into a segment I for storing related applications, a public segment II for temporarily storing instructions and data, and a hidden segment III for saving client data. In a method of accessing data via the portable data storage device, when the computer is to write data into or read data from the segment III, the data to be written or read is first temporarily stored in the segment II, and specific read or write instructions for a read/write level application interface are written into the segment II by the applications in the segment I and executed, so as to complete data exchange and access between the portable data storage device and the computer.
    • 便携式数据存储装置包括经由预定接口与具有用户权限限制的操作系统的计算机耦合的控制单元,以及被划分成用于存储相关应用的段I的存储器,用于临时存储指令和数据的公共段II, 以及用于保存客户端数据的隐藏段III。 在通过便携式数据存储装置访问数据的方法中,当计算机将数据写入或从数据段III读取数据时,要写入或读取的数据首先临时存储在段II中,并且进行特定的读或写 读/写级应用接口的指令由段I中的应用程序写入段II,并执行,以便完成便携式数据存储设备与计算机之间的数据交换和访问。
    • 34. 发明授权
    • Logic circuit using hardware to process keyboard scanning
    • 使用硬件处理键盘扫描的逻辑电路
    • US06980135B2
    • 2005-12-27
    • US10042331
    • 2002-01-11
    • Chi-Tung ChangDon Chang
    • Chi-Tung ChangDon Chang
    • H03M11/00H03M11/20
    • H03M11/20H03M11/003
    • A logic circuit uses hardware to process keyboard scanning, more especially, a microprocessing system inputs the signal through a pressed key into a control circuit for conducting operation; since the column input end has electric resistance with higher driving ability than that of the row output/input end, a higher electric potential status is thereby obtained and conducted with the circuit through a pressed key to make the high and the lower electric potentials approach in accordance with each other and generate electric potential change, or through a converting method of automatically driving electric potential, the innovative effect of the present invention is achieved.
    • 逻辑电路使用硬件来处理键盘扫描,更具体地说,微处理系统通过按下的键将信号输入到用于进行操作的控制电路中; 由于列输入端具有比行输出/输入端更高的驱动能力的电阻,所以通过按压键使电路获得并进行更高的电位状态,使得高电位和低电位接近 根据彼此产生电位变化,或者通过自动驱动电位的转换方法,实现了本发明的创新效果。
    • 36. 发明申请
    • I2C/SPI CONTROL INTERFACE CIRCUITRY, INTEGRATED CIRCUIT STRUCTURE, AND BUS STRUCTURE THEREOF
    • I2C / SPI控制接口电路,集成电路结构及总线结构
    • US20110161545A1
    • 2011-06-30
    • US12776473
    • 2010-05-10
    • Chi-Tung ChangHsiu Ming FanChuan-Ching Tsai
    • Chi-Tung ChangHsiu Ming FanChuan-Ching Tsai
    • G06F13/40
    • G06F13/4068G06F13/4022G06F2213/0016
    • An I2C/SPI control interface circuitry, an integrated circuit structure, and a bus structure thereof are provided. The I2C/SPI control interface circuitry includes an I2C control module and a SPI control module. The I2C control module has an I2C clock port and an I2C data port, and the SPI control module has a SPI clock port, a SPI data input port, a SPI data output port, and a SPI chip enable port. The I2C clock port is electrically connected with the SPI chip enable port to become an I2C clock/SPI chip enable input/output end. The I2C data port is electrically connected with the SPI data input port and the SPI data output port to become an I2C/SPI data input/output end. The SPI clock port is the SPI clock output end. The I2C and SPI control module are alternative to be enabled to avoid signal interference and lower the cost of the package and the manufacture of the integrated circuit.
    • 提供了I2C / SPI控制接口电路,集成电路结构及其总线结构。 I2C / SPI控制接口电路包括I2C控制模块和SPI控制模块。 I2C控制模块具有I2C时钟端口和I2C数据端口,SPI控制模块具有SPI时钟端口,SPI数据输入端口,SPI数据输出端口和SPI芯片使能端口。 I2C时钟端口与SPI芯片使能端口电连接,成为I2C时钟/ SPI芯片使能输入/输出端。 I2C数据端口与SPI数据输入端口和SPI数据输出端口电连接,成为I2C / SPI数据输入/输出端。 SPI时钟端口是SPI时钟输出端。 I2C和SPI控制模块是可以避免信号干扰的替代方案,降低了封装的成本和集成电路的制造。
    • 37. 发明申请
    • Apparatus and method for estimating and compensating sampling frequency offset
    • 用于估计和补偿采样频率偏移的装置和方法
    • US20090135978A1
    • 2009-05-28
    • US12073819
    • 2008-03-11
    • Chi-Tung ChangTzu-Wen SungChuen-Heng WangYu-Ling Chen
    • Chi-Tung ChangTzu-Wen SungChuen-Heng WangYu-Ling Chen
    • H04L7/00H04L25/00
    • H04L27/2657H04L27/0014H04L27/2675H04L2027/0067
    • An apparatus and method for estimating and compensating sampling frequency offset are disclosed. Particularly, a linear mathematical scheme is employed to calculate the related phase difference for saving use of multipliers and storage circuit used for sampling frequency offset estimation and compensation in the conventional art. The preferred embodiment of the invention has a first step to receive signals by the offset estimating circuit. Next, the phase value for each signal is calculated, and the pilot signal therein is retrieved. Next, a phase difference is obtained by subtraction operation between the received symbols and the delayed pilot symbols. And a circuit for storing the phase differences is incorporated. Next, a phase difference between the adjacent symbols is obtained by accumulating the phases and processing the least-error-sum-of-squares operation. Therefore, an estimation value of the sampling frequency offset of a communication system is obtained, and further to compensate the offset.
    • 公开了一种用于估计和补偿采样频率偏移的装置和方法。 特别地,采用线性数学方案来计算用于节省使用乘法器的相关相位差和用于采样频率偏移估计和补偿的存储电路。 本发明的优选实施例具有通过偏移估计电路接收信号的第一步骤。 接下来,计算每个信号的相位值,并且检索其中的导频信号。 接下来,通过在接收到的符号和延迟的导频符号之间的减法运算获得相位差。 并且并入存储相位差的电路。 接下来,相邻符号之间的相位差通过累积相位和处理最小二乘方差运算来获得。 因此,获得通信系统的采样频率偏移的估计值,并进一步补偿偏移。
    • 38. 发明授权
    • Method for loading configuration data onto a non-volatile memory and a device using the same
    • 将配置数据加载到非易失性存储器和使用其的设备的方法
    • US07516316B2
    • 2009-04-07
    • US11280319
    • 2005-11-17
    • Chi-Tung ChangHung-Chun ChenChing-Wen Wang
    • Chi-Tung ChangHung-Chun ChenChing-Wen Wang
    • G06F9/00
    • G11C16/20
    • A method for loading configuration data onto a non-volatile memory and the device using the same is provided. A non-volatile memory block is preloaded with a certain compatible memory configuration data in advance when the memory device is being manufactured. The memory configuration data comprises plural parameters corresponding to the non-volatile memory. When readying the memory device, the preloaded configuration data is loaded onto a random-access memory thereof so as to save the space in a read-only memory used for storing the memory's identification and its specification. Additionally, means for loading the configuration data from the preload zone onto the random-access memory is introduced to update the firmware.
    • 提供了一种用于将配置数据加载到非易失性存储器上的方法和使用其的设备。 当制造存储器件时,非易失性存储器块预先装载有一些兼容的存储器配置数据。 存储器配置数据包括对应于非易失性存储器的多个参数。 当准备存储器件时,将预加载的配置数据加载到随机存取存储器中,以便将空间保存在用于存储存储器标识及其规范的只读存储器中。 此外,引入用于将配置数据从预载区域加载到随机存取存储器上的装置来更新固件。
    • 39. 发明申请
    • FREQUENCY SYNTHESIZER APPLIED TO FREQUENCY HOPPING SYSTEM
    • 频率合成器适用于频率控制系统
    • US20080285625A1
    • 2008-11-20
    • US11773963
    • 2007-07-06
    • Chi-Tung ChangChih-Hao LaiChieh-Tsao Hwang
    • Chi-Tung ChangChih-Hao LaiChieh-Tsao Hwang
    • H04B1/00
    • H03L7/183H03B21/025
    • A frequency synthesizer applied to a frequency hopping system includes a voltage controlled oscillator (VCO), a phase lock loop (PLL) system, a second frequency divider, a first SSB mixer, a second SSB mixer, and a multiplexer. The VCO generates an oscillating frequency. The PLL system includes a first frequency divider and divides the oscillating frequency by 10 to generate a first dividing signal. The second frequency divider divides the oscillating frequency by 2 to generate a second dividing signal and further divides the second dividing signal by 2 to generate a third dividing signal. The first SSB mixer mixes frequencies of the second and third dividing signals to generate a first mixing signal. The second SSB mixer mixes frequencies of the first mixing signal and the first dividing signal to generate a second mixing signal. The Multiplexer determines to output the first mixing signal or the second mixing signal.
    • 应用于跳频系统的频率合成器包括压控振荡器(VCO),锁相环(PLL)系统,第二分频器,第一SSB混频器,第二SSB混频器和多路复用器。 VCO产生振荡频率。 PLL系统包括第一分频器,并将振荡频率除以10以产生第一分频信号。 第二分频器将振荡频率除以2以产生第二分频信号,并将第二分频信号除以2,以产生第三分频信号。 第一SSB混频器混合第二和第三分频信号的频率以产生第一混频信号。 第二SSB混频器混合第一混频信号和第一分频信号的频率以产生第二混频信号。 多路复用器确定输出第一混频信号或第二混频信号。
    • 40. 发明申请
    • Method of executing a default instruction set of a stroage device
    • 执行频率设备的默认指令集的方法
    • US20080126731A1
    • 2008-05-29
    • US11447415
    • 2006-06-06
    • Hung-Chou TsaiShih-Hsien YangChi-Tung Chang
    • Hung-Chou TsaiShih-Hsien YangChi-Tung Chang
    • G06F12/00
    • G06F9/4411
    • A method of executing a default instruction set of a storage device for conveniently connecting the storage device to a computer includes the following steps: connecting a USB interface of the storage device to a USB interface of the computer; the computer using interface commands to determine a device class of the storage device; a controller of the storage device actuating a built-in Auto Dispatch program and returning a message to the computer that the connected device is a keyboard; the controller sending specific serial keyboard commands to the computer via the Auto Dispatch program; the controller resetting an interface class code setting thereof when the computer has received the specific serial keyboard commands; the computer using the interface commands to check the interface class code setting to identify the storage device; and the controller returning a message to the computer that the connected device is a mass storage device.
    • 执行用于方便地将存储设备连接到计算机的存储设备的默认指令集的方法包括以下步骤:将存储设备的USB接口连接到计算机的USB接口; 所述计算机使用接口命令来确定所述存储设备的设备类; 所述存储装置的控制器启动内置的自动调度程序并将连接的设备作为键盘的消息返回到所述计算机; 控制器通过自动调度程序向计算机发送特定的串行键盘命令; 当计算机接收到特定的串行键盘命令时,控制器复位其接口类代码设置; 计算机使用接口命令检查接口类代码设置来识别存储设备; 并且控制器向计算机返回连接的设备是大容量存储设备的消息。