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1. 发明授权

US08350819B2 Method for determining touch points on touch panel and system thereof 有权
标题翻译：用于确定触摸面板上的触摸点的方法及其系统
公开(公告)号：US08350819B2
公开(公告)日：2013-01-08
申请号：US12821212
申请日：2010-06-23
申请人： Chi-Tung Chang , Chuen-Heng Wang
发明人： Chi-Tung Chang , Chuen-Heng Wang
IPC分类号： G06F3/041
CPC分类号： G06F3/0416
摘要： The present invention discloses a method for determining touch points on a touch panel and a system thereof. The method includes the following steps: sampling, calculating a difference, comparing the difference, sampling a determinative area, and calculating a barycenter. The barycenter position from the said steps is a touch point position. The present invention can overcome the problem of the ghost point in traditional touch panels and also be applicable for touch panels of various types.
摘要翻译：本发明公开了一种用于确定触摸面板上的接触点的方法及其系统。该方法包括以下步骤：采样，计算差值，比较差异，采样确定区域以及计算重心。所述步骤的重心位置是触摸点位置。本发明可以克服传统触控面板中的鬼点问题，也适用于各种类型的触控面板。

2. 发明申请

US20110202692A1 COMPUTER PERIPHERAL APPARATUS 审中-公开
标题翻译：电脑外围设备
公开(公告)号：US20110202692A1
公开(公告)日：2011-08-18
申请号：US12758821
申请日：2010-04-13
申请人： Chi-Tung Chang , I-Chieh Lin
发明人： Chi-Tung Chang , I-Chieh Lin
IPC分类号： G06F3/00
CPC分类号： G06F1/1632 , G06F2213/0038
摘要： The present invention discloses a computer peripheral apparatus. The computer peripheral apparatus includes an USB hub, at least one build-in card reader, and a controller. Each build-in card reader is electrically connected to one built-in downstream port of the USB hub. The controller connects to the USB hub and the build-in card reader to monitor the connection requirement of the build-in card reader. When the controller determines the build-in card reader does not need to be kept connected, the controller sets the status of its corresponding built-in downstream port as a “first status,” which defines the corresponding built-in downstream port is not connected. Thus, the computer system is informed that the built-in downstream port is not connected. Therefore, if there are no USB devices connecting to other downstream ports of the USB hub, the entire computer peripheral apparatus can enter into hibernation mode, thereby lowering the power consumption
摘要翻译：本发明公开了一种计算机外围设备。计算机外围设备包括USB集线器，至少一个内置读卡器和控制器。每个内置读卡器电连接到USB集线器的一个内置下游端口。控制器连接到USB集线器和内置读卡器，以监控内置读卡器的连接要求。当控制器确定内置读卡器不需要保持连接时，控制器将其对应的内置下行端口的状态设置为“第一状态”，定义相应的内置下行端口未连接。因此，通知计算机系统内置下游端口未连接。因此，如果没有USB设备连接到USB集线器的其他下游端口，则整个计算机外围设备可以进入休眠模式，从而降低功耗

3. 发明申请

US20110138203A1 UNIVERSAL SERIAL BUS APPARATUS FOR LOWERING POWER CONSUMPTION 审中-公开
标题翻译：通用串行总线设备降低功耗
公开(公告)号：US20110138203A1
公开(公告)日：2011-06-09
申请号：US12754629
申请日：2010-04-06
申请人： Chi-Tung Chang , Cheng-Kun Chen , Chien-Chiang Chiang
发明人： Chi-Tung Chang , Cheng-Kun Chen , Chien-Chiang Chiang
IPC分类号： G06F1/32 , G06F1/06
CPC分类号： G06F1/3253 , Y02D10/151
摘要： A universal serial bus (USB) apparatus for lowering power consumption is provided. The universal serial bus apparatus includes a universal serial bus circuitry, a monitor unit, and a system duty clock generator. The monitor unit is used to monitor a start of frame (SOF) packet generated by the universal serial bus circuitry and generates a clock control signal accordingly. The system duty clock generator receives the clock control signal and a reference clock signal to generate a system duty clock signal. The enable or disable status of the system duty clock signal can be determined according to the SOF packet monitored by the monitor unit so as to make the universal serial bus apparatus enter into runtime idle mode to lower the power consumption.
摘要翻译：提供了一种用于降低功耗的通用串行总线（USB）设备。通用串行总线装置包括通用串行总线电路，监视器单元和系统占空比时钟发生器。监视器单元用于监视由通用串行总线电路产生的帧起始帧（SOF）分组，并相应地产生时钟控制信号。系统占空比时钟发生器接收时钟控制信号和参考时钟信号以产生系统占空时钟信号。可以根据由监视器单元监视的SOF分组来确定系统占空时钟信号的使能或禁止状态，以使通用串行总线装置进入运行时空闲模式以降低功耗。

4. 发明申请

US20090296723A1 Multi-computer switch with function of transmitting data between computers 审中-公开
标题翻译：具有在计算机之间传输数据功能的多计算机交换机
公开(公告)号：US20090296723A1
公开(公告)日：2009-12-03
申请号：US12219558
申请日：2008-07-24
申请人： Chi-Tung Chang , Chien-Han Huang , Shih-Min Lan
发明人： Chi-Tung Chang , Chien-Han Huang , Shih-Min Lan
IPC分类号： H04L12/28
CPC分类号： H04L12/4625
摘要： A multi-computer switch with a function of transmitting data between computers includes a multiple of hub units, at least one data transmission control unit and a switching interface control unit. Each hub unit includes an upstream port and a multiple of downstream ports. The upstream port is connected to a computer system, and each downstream port further includes at least one first downstream port and at least one second downstream port. The data transmission control unit is bridged to a first downstream port of any two hub units for transmitting data between computer systems connected to the two hub units according to a data exchange signal. The switching interface control unit switches and connects at least one first common peripheral to the second downstream port of one of the hub units to achieve the effect of timely transmitting data in different computers.
摘要翻译：具有在计算机之间传输数据功能的多计算机交换机包括多个集线器单元，至少一个数据传输控制单元和切换接口控制单元。每个集线器单元包括上游端口和多个下游端口。上游端口连接到计算机系统，并且每个下游端口还包括至少一个第一下游端口和至少一个第二下游端口。数据传输控制单元桥接到任何两个集线器单元的第一下游端口，用于根据数据交换信号在连接到两个集线器单元的计算机系统之间传输数据。交换接口控制单元将至少一个第一公共外设切换并连接到一个集线器单元的第二下游端口，以实现在不同计算机中及时发送数据的效果。

5. 发明申请

US20090014521A1 CARD READER 审中-公开
标题翻译：读卡器
公开(公告)号：US20090014521A1
公开(公告)日：2009-01-15
申请号：US11775992
申请日：2007-07-11
申请人： CHI-TUNG CHANG , SHIH-MIN LAN , I-CHIEH LIN
发明人： CHI-TUNG CHANG , SHIH-MIN LAN , I-CHIEH LIN
IPC分类号： G06K7/06
CPC分类号： G06K7/0013
摘要： A card reader that can enhance the efficiency of the application system is embedded in the application system. The application system has an external memory drive. The card reader includes at least one memory card connector, a flash memory, and a control unit. The memory card connector is used for being plugged with a memory card. The flash memory is driven and integrated by the external memory drive. The control unit is electrically connected with the memory card connector and the flash memory and is used for transmitting data between the memory card and the flash memory and the application system via the control unit. Thereby, the flash memory can be used as an extended memory of the application system. The total memory of the application system increases, and the efficiency of the application system is enhanced.
摘要翻译：可以提高应用系统效率的读卡器嵌入在应用系统中。应用系统具有外部存储器驱动器。读卡器包括至少一个存储卡连接器，闪存和控制单元。存储卡连接器用于插入存储卡。闪存由外部存储器驱动并集成。控制单元与存储卡连接器和闪速存储器电连接，并用于通过控制单元在存储卡与闪存和应用系统之间传输数据。因此，闪存可以用作应用系统的扩展存储器。应用系统的总内存增加，提高了应用系统的效率。

6. 发明申请

US20080298266A1 METHOD AND SYSTEM FOR ASSESSING STATUSES OF CHANNELS 审中-公开
标题翻译：用于评估通道状态的方法和系统
公开(公告)号：US20080298266A1
公开(公告)日：2008-12-04
申请号：US11833532
申请日：2007-08-03
申请人： CHI-TUNG CHANG , CHUN-YI WU , TZU-WEN SUNG , YU-LING CHEN
发明人： CHI-TUNG CHANG , CHUN-YI WU , TZU-WEN SUNG , YU-LING CHEN
IPC分类号： G06F11/00
CPC分类号： H04B17/336
摘要： An assessment system classifies a plurality of channels to several channel groups according to the characteristics of the channel groups and assesses the status of each channel by a corresponding method, such as a period comparison method or a SNR comparison method, defined based on the channel groups. Hence, the present invention allows simpler computations to be made and a simpler circuit structure to be used.
摘要翻译：评估系统根据信道组的特性将多个信道分组到多个信道组，并且通过基于信道组定义的相应方法（诸如周期比较方法或SNR比较方法）来评估每个信道的状态。因此，本发明允许进行更简单的计算，并且使用更简单的电路结构。

7. 发明申请

US20080278212A1 DC OFFSET CANCELING CIRCUIT 失效
标题翻译：直流偏移取消电路
公开(公告)号：US20080278212A1
公开(公告)日：2008-11-13
申请号：US11745456
申请日：2007-05-08
申请人： CHI-TUNG CHANG , CHUEN-HENG WANG , YU-LING CHEN
发明人： CHI-TUNG CHANG , CHUEN-HENG WANG , YU-LING CHEN
IPC分类号： H03L5/00
CPC分类号： H03F3/21 , H03F2200/375
摘要： The present invention provides a circuit for canceling DC offset, comprising: a first circuit accumulating a first square value of a plurality of signal values in a time period; a second circuit calculation a second square value of an accumulation of said signal values in said time period, wherein said square value is divided by a quantity of said signal values in said time period to generate a DC offset value; and a third circuit, connected to said first circuit and second circuit, calculating a difference between said first square value and said DC offset value.
摘要翻译：本发明提供一种消除DC偏移的电路，包括：在一段时间内累积多个信号值的第一平方值的第一电路; 第二电路计算所述时间段内的所述信号值的累积的第二平方值，其中所述平方值除以所述时间段内的所述信号值的量，以产生DC偏移值; 以及连接到所述第一电路和第二电路的第三电路，计算所述第一平方值和所述DC偏移值之间的差。

8. 发明申请

US20080126656A1 Silicon storage apparatus and its controller, and operating method thereof 审中-公开
标题翻译：硅储存装置及其控制器及其操作方法
公开(公告)号：US20080126656A1
公开(公告)日：2008-05-29
申请号：US11524459
申请日：2006-09-21
申请人： Chi-Tung Chang , Shih-Min Lan , Hungchou Tsai
发明人： Chi-Tung Chang , Shih-Min Lan , Hungchou Tsai
IPC分类号： G06F13/00
CPC分类号： G06F13/385
摘要： A silicon storage apparatus is adapted to a processor base system and comprises a plurality of storage media interfaces and a controller. The storage media interfaces are separately used to contain and connect a storage medium and the controller is electrically connected with the storage media interfaces for providing a data transmission channel to the storage media according to a detecting signal, and outputting an indicating message to the processor base system when another detecting signal produced. Whereby, the sizes of the silicon storage apparatus and the controller can be reduced substantially.
摘要翻译：硅存储装置适用于处理器基础系统，并且包括多个存储介质接口和控制器。存储介质接口分别用于容纳和连接存储介质，并且控制器与存储介质接口电连接，用于根据检测信号向存储介质提供数据传输通道，并将指示消息输出到处理器基座系统当产生另一个检测信号时。由此，可以大幅度减小硅存储装置和控制器的尺寸。

9. 发明申请

US20080075198A1 Method for I/Q signal adjustment 审中-公开
标题翻译： I / Q信号调整方法
公开(公告)号：US20080075198A1
公开(公告)日：2008-03-27
申请号：US11613177
申请日：2006-12-19
申请人： Chi-Tung Chang , Chieh-Tsao Hwang , Chih-Hao Lai
发明人： Chi-Tung Chang , Chieh-Tsao Hwang , Chih-Hao Lai
IPC分类号： H04L27/20
CPC分类号： H04L27/364 , H03D3/009
摘要： A method for I/Q adjustment is disclosed. The method includes delaying phases of an in-phase signal and a quadrature signal with a predetermined angle for generating an in-phase delay signal and a quadrature delay signal; adjusting magnitudes of the in-phase signal, the quadrature signal, the in-phase delay signal, and the quadrature delay signal according to a magnitude difference signal and a phase control signal; adding the adjusted in-phase signal and the adjusted in-phase delay signal; and adding the adjusted quadrature signal and the adjusted quadrature delay signal.
摘要翻译：公开了一种I / Q调整方法。该方法包括以预定角度延迟同相信号和正交信号的相位，以产生同相延迟信号和正交延迟信号; 根据幅度差信号和相位控制信号调整同相信号，正交信号，同相延迟信号和正交延迟信号的幅度; 添加经调整的同相信号和调整的同相延迟信号; 并将调整后的正交信号和调整后的正交延迟信号相加。

10. 发明申请

US20080005421A1 Switching Device of Input and Output Interfaces of Computer Systems 审中-公开
标题翻译：计算机系统输入输出接口切换装置
公开(公告)号：US20080005421A1
公开(公告)日：2008-01-03
申请号：US11459027
申请日：2006-07-21
申请人： Chi-Tung Chang , Wen-Chih Chen
发明人： Chi-Tung Chang , Wen-Chih Chen
IPC分类号： G06F13/38
CPC分类号： G06F3/023
摘要： A switching device of input and output interfaces of computer systems includes a plurality of primary ports for electrically connecting transmission interfaces of the plurality of the computer systems, a plurality of secondary port for electrically connecting transmission interfaces of a plurality of input devices, a hub device coupled between the plurality of primary ports and the plurality of secondary ports, an audio decoding unit coupled to the hub device, for decoding audio signals, a control unit coupled to the hub device, for controlling the hub device, so as to couple a primary port of the plurality of primary ports to the plurality of secondary ports and the audio decoding unit, and an audio output port coupled to the audio decoding unit, for outputting decoded results of the audio decoding unit.
摘要翻译：计算机系统的输入和输出接口的切换装置包括用于电连接多个计算机系统的传输接口的多个主端口，用于电连接多个输入设备的传输接口的多个辅助端口，集线器设备耦合在所述多个初级端口和所述多个辅助端口之间;耦合到所述集线器设备的音频解码单元，用于解码音频信号;耦合到所述集线器设备的控制单元，用于控制所述集线器设备，以便耦合主设备多个主要端口的端口到多个次要端口和音频解码单元，以及耦合到音频解码单元的音频输出端口，用于输出音频解码单元的解码结果。

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