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    • 34. 发明授权
    • Data recovery device and method
    • 数据恢复装置及方法
    • US07310400B2
    • 2007-12-18
    • US10117046
    • 2002-04-08
    • Yi-Shu Chang
    • Yi-Shu Chang
    • H03D3/24H04L7/02H04L7/00H04J3/06
    • H04L7/0337H03L7/06
    • A data recovery device. The device adjusts a digital signal according to a pulse signal output by a phase-locked loop circuit. The sampling circuit samples each bit of the digital signal five times to generate a first sampled signal. The data delay buffer decides a sampling range of the first sampled signal and outputs a second sampled signal. The sampling range selector picks a part of bits of the second sampled signal and outputs output data. The weighted detecting module outputs a phase shifting signal responding to the output data. The first loop filter outputs a first adjusting signal. The first sampling window module outputs a phase selecting signal. The second loop filter outputs the recovery signal and a second adjusting signal. The second sampling window module outputs the first phase checking signal and the second phase checking signal. The phase picking module outputs the output data.
    • 数据恢复装置。 该装置根据由锁相环电路输出的脉冲信号调整数字信号。 采样电路对数字信号的每一位进行五次采样以产生第一采样信号。 数据延迟缓冲器决定第一采样信号的采样范围并输出第二采样信号。 采样范围选择器选择第二采样信号的一部分位并输出输出数据。 加权检测模块响应于输出数据输出相移信号。 第一个环路滤波器输出第一个调整信号。 第一采样窗口模块输出相位选择信号。 第二环路滤波器输出恢复信号和第二调整信号。 第二采样窗口模块输出第一相位检测信号和第二相位检测信号。 相位选择模块输出输出数据。
    • 35. 发明授权
    • Clock generating device and method for executing overclocking operation
    • 用于执行超频操作的时钟产生装置和方法
    • US07249275B2
    • 2007-07-24
    • US10933896
    • 2004-09-03
    • Wen-Shiung WengChi-Kung KuanSheng-Kai ChenMing-Chun ChangYi-Shu Chang
    • Wen-Shiung WengChi-Kung KuanSheng-Kai ChenMing-Chun ChangYi-Shu Chang
    • G06F1/10
    • G06F1/08
    • A clock tuning device and method for executing overclocking operations on plural elements disposed on a motherboard. The clock tuning device includes a phase-locked loop for outputting a plurality of clock signals to the elements, and a control circuit for controlling the phase-locked loop to adjust the frequencies of the clock signals, so as to execute the overclocking operations on the elements, respectively. The method includes the steps of: increasing the frequency of a first clock signal until one of the elements can't work normally due to an utmost frequency of the first clock signal; resetting all the elements and operating the element corresponding to the first signal according to a safe frequency of the first clock signal; and repeating the above steps to perform overclocking operation on each of the other elements.
    • 一种用于对设置在母板上的多个元件执行超频操作的时钟调谐装置和方法。 时钟调谐装置包括用于向元件输出多个时钟信号的锁相环,以及用于控制锁相环以调整时钟信号的频率的控制电路,以便对该时钟信号执行超频操作 元素。 该方法包括以下步骤:增加第一时钟信号的频率,直到其中一个元件由于第一时钟信号的最大频率而不能正常工作; 根据第一时钟信号的安全频率,复位所有元件并对与第一信号相对应的元件进行操作; 并重复上述步骤对每个其他元件执行超频操作。